Hardware Framework Research Articles

A generic FPGA-based hardware architecture for recursive least mean p-power extreme learning machine

Recursive least mean p-power extreme learning machine (RLMP-ELM) is a newly proposed online machine learning algorithm and is able to provide a robust online prediction of the datasets with noises of different statistics. To further explore the proposed RLMP-ELM to be used in real-world embedded systems, a generic serial FPGA-based hardware architecture of RLMP-ELM is presented in this paper. The entire hardware architecture of RLMP-ELM includes three serial processing modules, which are implemented parameterizably and can be adapted for different application requirements. The hardware framework is in a serial fashion, but parallelization efforts are focused on the processes with high computing complexity by analysis of potential inter-task dependency. To overcome the limitation of memory bandwidth, the block RAM and ping-pong on-chip buffer are applied to improve the computational throughput. The validation experiments are performed through five datasets with different p values. Accuracy results show that our implementation on FPGA could achieve similar accuracy compared to 64-bit floating-point software implementation. We also report and compare hardware performance of our proposed architecture with other existing implementations. The results show that our hardware architecture offers the excellent balance among accuracy, logic occupation and hardware performance.

The Vicarios Virtual Reality Interface for Remote Robotic Teleoperation

Intuitive interaction is the cornerstone of accurate and effective performance in remote robotic teleoperation. It requires high-fidelity in control actions as well as perception (vision, haptic, and other sensory feedback) of the remote environment. This paper presents Vicarios, a Virtual Reality (VR) based interface with the aim of facilitating intuitive real-time remote teleoperation, while utilizing the inherent benefits of VR, including immersive visualization, freedom of user viewpoint selection, and fluidity of interaction through natural action interfaces. Vicarios aims to enhance the situational awareness, using the concept of viewpoint-independent mapping between the operator and the remote scene, thereby giving the operator better control in the perception-action loop. The article describes the overall system of Vicarios, with its software, hardware, and communication framework. A comparative user study quantifies the impact of the interface and its features, including immersion and instantaneous user viewpoint changes, termed “teleporting”, on users’ performance. The results show that users’ performance with the VR-based interface was either similar to or better than the baseline condition of traditional stereo video feedback, approving the realistic nature of the Vicarios interface. Furthermore, including the teleporting feature in VR significantly improved participants’ performance and their appreciation for it, which was evident in the post-questionnaire results. Vicarios capitalizes on the intuitiveness and flexibility of VR to improve accuracy in remote teleoperation.

Distributed Virtual Environment Basketball Equipment Embedded Systems’ Research and Development

With the development of social economy and the improvement of material level, people are paying more and more attention to their own health, and they are also constantly improving their fitness awareness. As far as the current sports equipment is concerned, the boring exercise methods can no longer satisfy people’s pursuit of higher quality fitness exercises. The embedding of the distributed virtual environment can incorporate its perceptual, immersive, and interactive characteristics, which increases the realization of multiuser interactive behavior in the field of sports equipment in the virtual scene. Therefore, this paper proposes the research and development of basketball sports equipment embedded system based on distributed virtual environment. First of all, this article adopts the literature method to learn the application of distributed virtual environment and embedded system in depth and, secondly, designs the embedded system architecture of basketball sports equipment suitable for distributed virtual environment and the software and hardware framework of the embedded system. Finally, the performance, delay comparison, system optimization test, and other aspects of the embedded system are analyzed. The average delay of interactive functions of embedded systems based on distributed virtual environment is 1.4 min, which saves 4 min compared with traditional interactive methods. And, the throughput rate of the system has also been greatly improved. The research on the embedded system of sports equipment based on the distributed virtual environment proposed in this paper will be beneficial to the development of society and economy, and it can also help more people to enrich the way of sports and enhance the fun of sports.

Robust Target Recognition and Tracking of Self-Driving Cars With Radar and Camera Information Fusion Under Severe Weather Conditions

Radar and camera information fusion sensing methods are used to solve the inherent shortcomings of the single sensor in severe weather. Our fusion scheme uses radar as the main hardware and camera as the auxiliary hardware framework. At the same time, the Mahalanobis distance is used to match the observed values of the target sequence. Data fusion based on the joint probability function method. Moreover, the algorithm was tested using actual sensor data collected from a vehicle, performing real-time environment perception. The test results show that radar and camera fusion algorithms perform better than single sensor environmental perception in severe weather, which can effectively reduce the missed detection rate of autonomous vehicle environment perception in severe weather. The fusion algorithm improves the robustness of the environment perception system and provides accurate environment perception information for the decision-making system and control system of autonomous vehicles.

A device employing a neural network for blood pressure estimation from the oscillatory pressure pulse wave and PPG signal

Purpose Wrist-cuff oscillometric blood pressure monitors are very popular in the portable medical device market. However, its accuracy has always been controversial. In addition to the oscillatory pressure pulse wave, the finger photoplethysmography (PPG) can provide information on blood pressure changes. A blood pressure measurement system integrating the information of pressure pulse wave and the finger PPG may improve measurement accuracy. Additionally, a neural network can synthesize the information of different types of signals and approximate the complex nonlinear relationship between inputs and outputs. The purpose of this study is to verify the hypothesis that a wrist-cuff device using a neural network for blood pressure estimation from both the oscillatory pressure pulse wave and PPG signal may improve the accuracy. Design/methodology/approach A PPG sensor was integrated into a wrist blood pressure monitor, so the finger PPG and the oscillatory pressure wave could be detected at the same time during the measurement. After the peak detection, curves were fitted to the data of pressure pulse amplitude and PPG pulse amplitude versus time. A genetic algorithm-back propagation neural network was constructed. Parameters of the curves were inputted into the neural network, the outputs of which were the measurement values of blood pressure. Blood pressure measurements of 145 subjects were obtained using a mercury sphygmomanometer, the developed device with the neural network algorithm and an Omron HEM-6111 blood pressure monitor for comparison. Findings For the systolic blood pressure (SBP), the difference between the proposed device and the mercury sphygmomanometer is 0.0062 ± 2.55 mmHg (mean ± SD) and the difference between the Omron device and the mercury sphygmomanometer is 1.13 ± 9.48 mmHg. The difference in diastolic blood pressure between the mercury sphygmomanometer and the proposed device was 0.28 ± 2.99 mmHg. The difference in diastolic blood pressure between the mercury sphygmomanometer and Omron HEM-6111 was −3.37 ± 7.53 mmHg. Originality/value Although the difference in the SBP error between the proposed device and Omron HEM-6111 was not remarkable, there was a significant difference between the proposed device and Omron HEM-6111 in the diastolic blood pressure error. The developed device showed an improved performance. This study was an attempt to enhance the accuracy of wrist-cuff oscillometric blood pressure monitors by using the finger PPG and the neural network. The hardware framework constructed in this study can improve the conventional wrist oscillometric sphygmomanometer and may be used for continuous measurement of blood pressure.

MPI hardware framework for many-core based embedded systems

This paper presents an investigation and evaluation of the services and infrastructure performance of a software and hardware implementation subset of the message passing interface (MPI) standard. The proposal for an efficient MPI Hardware and MPI Software models, along with the presentation and evaluation of its queuing model, aims at giving the system design a framework to assist. Comparative results are presented between MPI in hardware and software such as silicon consumption, processing time and transfer rate of the system related to the size of buffers. Tests in an environment consisting of an MPSoC model integrated on a network-on-chip (NoC) were performed, including classical algorithms such as PI calculation and the Dining Philosophers problem, to evaluate the proposed model functionality. Experimental results demonstrated the effectiveness of the proposed approach and the resulting implementation, although this comes at the cost of increased use of silicon in hardware implementation.

MPI hardware framework for many-core based embedded systems

This paper presents an investigation and evaluation of the services and infrastructure performance of a software and hardware implementation subset of the message passing interface (MPI) standard. The proposal for an efficient MPI Hardware and MPI Software models, along with the presentation and evaluation of its queuing model, aims at giving the system design a framework to assist. Comparative results are presented between MPI in hardware and software such as silicon consumption, processing time and transfer rate of the system related to the size of buffers. Tests in an environment consisting of an MPSoC model integrated on a network-on-chip (NoC) were performed, including classical algorithms such as PI calculation and the Dining Philosophers problem, to evaluate the proposed model functionality. Experimental results demonstrated the effectiveness of the proposed approach and the resulting implementation, although this comes at the cost of increased use of silicon in hardware implementation.

Energy-Efficient Image Recognition System for Marine Life

This article focuses on designing an energy-efficient image recognition system for marine monitoring. One of the main challenges of an underwater imaging system is the strict power consumption constraints due to the limited on-site resources. Considering the need for continuous operation in different water turbidity levels and background illumination conditions, an energy-efficient approach is needed for the effective utilization of the resources. In this work, we propose a recognition framework that will adaptively adjust the system parameters, such as camera frame rate and LED illumination level, based on the environmental conditions to optimize the energy consumption while ensuring a high recognition accuracy. The first part of the proposed decision system contains the convolutional neural network (CNN)-based animal recognition block which is used for obtaining the confidence level for a single frame. The second part is the adaptive decision block that dynamically changes the system parameters and combines the results of the recognition block for multiple frames based on the environmental conditions. In our experiments, we have used nearly 8000 underwater images for training and testing the single frame recognition block and used nearly 200 different video sequences for training and testing the adaptive decision block. Based on measurements of a hardware framework composed of a Raspberry Pi 3 Model B, a Pi NoIR Camera v2.1, and 850 nm LEDs, the proposed system achieves up to 92.7% energy savings with a comparable recognition performance by dynamically changing the frame rate and emitted light intensity based on water turbidity and background illumination level.

Multi-stage Threshold Method for Liver Tumor Segmentation in CT Scan Images and Its Implementation for FPGA

Medical Imaging is a sub-field of scientific imaging. Medical image segmentation is a challenging task due to poor contrast and noise in the medical images. Medical image segmentation is applied for liver tumor detection in CT scan images in this paper. Liver tumor is pathological disorder that affects human metabolic activity. The early identification and diagnosis of liver tumor is important for curing liver cancer. In this paper a comprehensive overview of liver tumor detection using Multi stage Threshold Method is provided. It is developed using MATLAB, Xilinx System Generator (XSG) and synthesized for Spartan-6 (xc6slx16-2csg324) FPGA. The key objective is implementing liver tumor segmentation in CT scan image for an FPGA implementation with minimum device utilization and low compilation and execution time to be suitable for real-time medical applications. This paper describes in detail about hardware framework of Multi stage Threshold Method which is modeled by XSG design models (basic as well as Mcode blocks). Finally, a comparison is made in terms of power, delay and resource utilization for the implementations based on both basic and Mcode blocks. The results show reduction in resource utilized and power with slightly increase in delay using Mcode blocks compared to basic blocks.

Design and Development of Fast Protection and Fast Monitoring Module Compatible With NI Compact RIO System for ITER-India Gyrotron Test Facility

The ITER electron cyclotron (EC) system will have gyrotron sources used for plasma heating and current drive applications. During gyrotron operation, different faults may be encountered and in the case of critical faults, the High Voltage Power Supplies (HVPS) should be switched off in $ time scale, which otherwise could damage the internal components of a gyrotron tube. Also during the operation, the main operating parameters need to be acquired on fast time scales (~5 Msps) to know the gyrotron output characteristics. A solution is required catering to both the requirements, which should be cost-effective, and also comply with recommended hardware and software framework. In this context, a custom prototype module compatible with NI-CompactRIO (NI-cRIO) system is under development for ITER-India Gyrotron Test Facility (IIGTF). The module has protection and monitoring functions both in parallel in a single unit. It has a transmitter (TX) and receiver (RX) card connected optically to complete the link. The TX has fast sampling analog-to-digital converter (ADC), fast comparator, field-programmable gate array (FPGA), and an optical transmitter. The TX sends monitoring and trip information optically to the RX. The RX card has an optical receiver, FPGA, and digital-to-analog converter (DAC), which generates back the original signals. The heart of the module is FPGA logic, which performs encoding and decoding (as per 8b10b standard) of ADC serial data, thereby eliminating the use of any serial converter ICs. The module can be plugged into the cRIO chassis and also can be used as a standalone module. This article discusses the concept, design, development, and test results of fast protection and fast signal monitoring module

Neural network-based hardware classifier using CORDIC algorithm

This paper designs a novel classification hardware framework based on neural network (NN). It utilizes COordinate Rotation DIgital Computer (CORDIC) algorithm to implement the activation function of NNs. The training was performed through software using an error back-propagation algorithm (EBPA) implemented in C++, then the final weights were loaded to the implemented hardware framework to perform classification. The hardware framework is developed in Xilinx 9.2i environment using VHDL as programming languages. Classification tests are performed on benchmark datasets obtained from UCI machine learning data repository. The results are compared with competitive classification approaches by considering the same datasets. Extensive analysis reveals that the proposed hardware framework provides more efficient results as compared to the existing classifiers.

Cone-beam CT for imaging of the head/brain: Development and assessment of scanner prototype and reconstruction algorithms.

Our aim was to develop a high-quality, mobile cone-beam computed tomography (CBCT) scanner for point-of-care detection and monitoring of low-contrast, soft-tissue abnormalities in the head/brain, such as acute intracranial hemorrhage (ICH). This work presents an integrated framework of hardware and algorithmic advances for improving soft-tissue contrast resolution and evaluation of its technical performance with human subjects. Four configurations of a CBCT scanner prototype were designed and implemented to investigate key aspects of hardware (including system geometry, antiscatter grid, bowtie filter) and technique protocols. An integrated software pipeline (c.f., a serial cascade of algorithms) was developed for artifact correction (image lag, glare, beam hardening and x-ray scatter), motion compensation, and three-dimensional image (3D) reconstruction [penalized weighted least squares (PWLS), with a hardware-specific statistical noise model]. The PWLS method was extended in this work to accommodate multiple, independently moving regions with different resolution (to address both motion compensation and image truncation). Imaging performance was evaluated quantitatively and qualitatively with 41 human subjects in the neurosciences critical care unit (NCCU) at our institution. The progression of four scanner configurations exhibited systematic improvement in the quality of raw data by variations in system geometry (source-detector distance), antiscatter grid, and bowtie filter. Quantitative assessment of CBCT images in 41 subjects demonstrated: ~70% reduction in image nonuniformity with artifact correction methods (lag, glare, beam hardening, and scatter); ~40% reduction in motion-induced streak artifacts via the multi-motion compensation method; and ~15% improvement in soft-tissue contrast-to-noise ratio (CNR) for PWLS compared to filtered backprojection (FBP) at matched resolution. Each of these components was important to improve contrast resolution for point-of-care cranial imaging. This work presents the first application of a high-quality, point-of-care CBCT system for imaging of the head/ brain in a neurological critical care setting. Hardware configuration iterations and an integrated software pipeline for artifacts correction and PWLS reconstruction mitigated artifacts and noise to achieve image quality that could be valuable for point-of-care detection and monitoring of a variety of intracranial abnormalities, including ICH and hydrocephalus.

A Virtualization-Assisted Full-System Simulation Approach for the Verification of System Intercomponent Interactions

We propose in this article a near-real-time performance full-system simulation approach with hardware acceleration using virtualization techniques. Traditional acceleration approaches generally cannot capture intercomponent interactions due to unpredictable component simulation progress. Our approach leverages existing hardware virtualization framework and devises three key implementation techniques to achieve fast and accurate full-system simulations. First, our approach utilizes the virtualization framework trap mechanism and precisely intercepts intercomponent interactions with no need to check every data access, but effectively maintains deterministic chronological orders of intercomponent interactions. Second, VIRA provides very accurate system performance estimation for early system-level designs through effective integration of component timing models, interrupt effects, and bus contention analysis. Third, VIRA achieves near-real-time performance by having software and hardware simulated components executed on the same host machine to minimize the overhead of intercomponent data exchange. We implement the proposed approach on a virtualization-enabled off-the-shelf system-on-chip board to demonstrate the effectiveness of our idea. The experiments show that VIRA always produces deterministic results while running 58–625 times faster than a commercial tool, and the system performance estimation is only 3%–6% from real systems. Moreover, our deterministic full-system simulator is also verified to carry as little as 2%–57% overhead compared to ideal native executions on the same host hardware devices.

Theory-anchored conceptual framework for managing environmental sanitation in developing countries: Literature review

Abstract The phenomenon of poor environmental sanitation, which is a global challenge, but most so in developing countries, requires that the solution to it be both conceptually and theoretically sound and clear enough for translation into practice. The purpose of this paper was to develop a theory-anchored conceptual framework to guide Environmental Sanitation Management (ESM) in developing countries. Data were obtained from scholarly databases such as Scopus, PubMed, and Google Scholar as well as grey literature through predetermined material selection and screening processes, and analysed qualitatively using the narrative, configurative synthesis approach. The review revealed that, among the key conceptual issues in ESM are environmental sanitation education (software), regulation (software) and infrastructure (hardware), which are managed by the government and private sector stakeholders, using various frameworks. However, while the existing frameworks recognise important concepts and variables, the frameworks are unclear regarding the theories underpinning the concepts and the relationships among the variables, thus, making it difficult for one to establish the synergies among the issues to be translated into practice. Arguing that inadequate application of systems thinking, participatory processes and behavioural change mechanisms is the key missing link in the previous ESM frameworks, a theory-anchored ESM framework is developed to fill this gap. It is recommended that conceptualisation and implementation of ESM programmes in developing countries be driven by a framework of hardware and software solutions that are underpinned by the systems, behavioural change and participation theories in order to comprehensively address the complexities of ESM in developing countries for sustainable development.

Robot vision application on embedded vision implementation with digital signal processor

The great development of robot vision represented by deep learning places urgent demands on embedded vision implementation. This article introduces a hardware framework for implementation of embedded vision based on digital signal processor, which can be widely used in robot vision applications. Firstly, the article discusses implementation of a pretrained typical convolutional neural network on the digital signal processor embedded system for real-time handwritten digit recognition. Then, the article introduces the migration of OpenCV software packages to digital signal processor embedded system and the implementation flow of face detection algorithms with OpenCV on digital signal processor. The experimental results are remarkable with convolutional neural networks for handwritten digit recognition. This article provides a convenient and feasible design scheme of digital signal processor system for implementation of embedded vision.

Orderly Charging Control Module Design

This paper introduces the design of an orderly charging module. This paper analyzes the system structure of the orderly charging module, the embedded software architecture and business implementation mode of the orderly charging module, and introduces the hardware framework and implementation method of the orderly charging module. This design is mainly used in the charging pile of electric vehicle, which is used to realize intelligent and orderly charging, optimize energy management, provide various forms of Internet of things access scheme, and provide the software and hardware technology foundation for the reasonable management of energy.

Wireless sensor network for estimating building performance

Accurate building energy assessments are often limited by inaccurate assumptions about the buildings' properties and occupant behavior. Many assessment methods use assumptions instead of measured data because it is cumbersome, time-intensive, and cost-intensive to acquire up-to-date, on-site measured data. This work bridges this gap by presenting the design of an open-source, wireless sensor network (WSN) that is easy to program, manufacture, modify, and deploy. The version of the WSN presented here measures air temperature, relative humidity, supply and return temperature of hot water from the heating system and the radiators, heat flux through the walls and the windows, luminosity, oil flow, electricity, window opening times, and CO2-concentration. The modularity of the WSN allows it to be extended with the addition of new types of sensors to the existing hardware framework. The data is streamed to an online database, allowing monitoring of the measurements in near real-time. The cost and performance of the sensor network are intended to be as good as or better than the existing solutions. The current cost for one temperature sensor node starts at 116 USD. The observed battery lifetime reaches up to a year for a five-minute sampling interval. The average installation time for a sensor node is 7 min. We describe the hardware architecture, software architecture, cost of the WSN, along with results from co-location tests, and a deployment in an occupied building.

Research and Design of Wireless Communication Module Based on Single Chip Microcomputer

This paper studies a wireless communication control module with AT89S52 microcontroller as the control core. The basic principle, main circuit, hardware framework and software framework of the system are described in detail. The whole system adopts modular design, which mainly includes wireless communication control circuit between single-chip microcomputer and lower-level computer, and communication interface circuit between wireless communication module and 51 single-chip microcomputer. The communication control system communicates with the nRF2401 through the SPI of the 51 single chip microcomputer, thereby forming a connection with the lower computer through the wireless communication control module, controlling the lower machine motion controller, and saving the data received by the communication into the extended memory. The communication method of this module is simple, in addition to remote real-time control, it can also be widely used in industrial monitoring and data acquisition systems.

Design Space Exploration of Hardware Spiking Neurons for Embedded Artificial Intelligence

Machine learning is yielding unprecedented interest in research and industry, due to recent success in many applied contexts such as image classification and object recognition. However, the deployment of these systems requires huge computing capabilities, thus making them unsuitable for embedded systems. To deal with this limitation, many researchers are investigating brain-inspired computing, which would be a perfect alternative to the conventional Von Neumann architecture based computers (CPU/GPU) that meet the requirements for computing performance, but not for energy-efficiency. Therefore, neuromorphic hardware circuits that are adaptable for both parallel and distributed computations need to be designed. In this paper, we focus on Spiking Neural Networks (SNNs) with a comprehensive study of neural coding methods and hardware exploration. In this context, we propose a framework for neuromorphic hardware design space exploration, which allows to define a suitable architecture based on application-specific constraints and starting from a wide variety of possible architectural choices. For this framework, we have developed a behavioral level simulator for neuromorphic hardware architectural exploration named NAXT. Moreover, we propose modified versions of the standard Rate Coding technique to make trade-offs with the Time Coding paradigm, which is characterized by the low number of spikes propagating in the network. Thus, we are able to reduce the number of spikes while keeping the same neuron’s model, which results in an SNN with fewer events to process. By doing so, we seek to reduce the amount of power consumed by the hardware. Furthermore, we present three neuromorphic hardware architectures in order to quantitatively study the implementation of SNNs. One of these architectures integrates a novel hybrid structure: a highly-parallel computation core for most solicited layers, and time-multiplexed computation units for deeper layers. These architectures are derived from a novel funnel-like Design Space Exploration framework for neuromorphic hardware.

Formula omitted]-Hub: Large-scale video learning, storage, and retrieval on heterogeneous hardware platforms

The burgeoning of Internet of Things (IoT) and camera-equipped mobile devices contributes a tremendous amount of video data generated at the edge of the network. At the same time, we have witnessed the fast deployment of many video-based application services, such as plate recognition for public safety, intelligent transportation, Industry 4.0 and so on. The success of these services, in turn, requires large-scale video data being learned, stored, and retrieved in a more efficient way. A generic software and hardware framework for large-scale IoT video analysis and service support is still missing. To address this challenge, we present π-Hub, PerceptIn’s robotic cloud solution which supports large-scale video data analysis, storage, and query by implementing the learn-store-retrieve paradigm. Interestingly, we found that among the learning, storage, and retrieval services each of them stresses one type of resources on heterogeneous computing servers, i.e., GPU, CPU, and Memory, respectively, therefore it is extremely cost-efficient to co-locate these services together to fully utilize the resources. In addition, several optimization techniques for data writing, reading, and data reduction are proposed and evaluated. The evaluation results show that these techniques improve the performance of the learning, storage and retrieval services significantly as well as notably reduce the cost of the system. We also verify π-Hub’s scalability by reliably running a 1000-machine deployment to support up to one million users. Finally, we conclude the paper by discussing several lessons learned from this study and future work.