A Virtualization-Assisted Full-System Simulation Approach for the Verification of System Intercomponent Interactions

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We propose in this article a near-real-time performance full-system simulation approach with hardware acceleration using virtualization techniques. Traditional acceleration approaches generally cannot capture intercomponent interactions due to unpredictable component simulation progress. Our approach leverages existing hardware virtualization framework and devises three key implementation techniques to achieve fast and accurate full-system simulations. First, our approach utilizes the virtualization framework trap mechanism and precisely intercepts intercomponent interactions with no need to check every data access, but effectively maintains deterministic chronological orders of intercomponent interactions. Second, VIRA provides very accurate system performance estimation for early system-level designs through effective integration of component timing models, interrupt effects, and bus contention analysis. Third, VIRA achieves near-real-time performance by having software and hardware simulated components executed on the same host machine to minimize the overhead of intercomponent data exchange. We implement the proposed approach on a virtualization-enabled off-the-shelf system-on-chip board to demonstrate the effectiveness of our idea. The experiments show that VIRA always produces deterministic results while running 58–625 times faster than a commercial tool, and the system performance estimation is only 3%–6% from real systems. Moreover, our deterministic full-system simulator is also verified to carry as little as 2%–57% overhead compared to ideal native executions on the same host hardware devices.