Hardware Framework Research Articles

A PUF-based unified identity verification framework for secure IoT hardware via device authentication

In the era of Internet-of-Things (IoTs), millions of smart devices are interconnected and communicated through networks. To guarantee the security and reliability of data transmission in IoT, the underlying hardware of these devices must first be secure and trusted. However, due to the inherent mobility nature of current embedded devices, IoT hardware could be vulnerable to diverse security threats from multiple malicious participants. Among them, device theft is becoming one of the most challenging security issues that have incurred a serious impact on copyright. To effectively alleviate this threat, silicon physical unclonable function (PUF) has been presented and considered to be a reliable anti-piracy solution to complete the device authentication and key storage. However, current PUF solutions are mostly focused on chip-level verification and cannot provide systematic identification and authentication. To this end, this article proposes a unified identity verification framework which can provide fine-grained protection for embedded devices against theft attacks from the system level. This framework is established on a series of PUF circuits that have been implanted into each individual chip of the devices. We first improve the configurable ring oscillator (CRO) PUFs with the latch structure. Therefore, a unique sub-digital signature of each chip can be generated by performing the challenge-response strategy. We then reassemble all the sub-digital signatures and encode them to acquire the unique fingerprint of each embedded device, so as to achieve system-level device identification and authentication. Any substitution of an individual or all chips in the devices will result in the inconsistencies of the system-level fingerprint. We implement and verify the proposed scheme on the field programmable gate array (FPGA) platforms. Experimental results illustrate that the proposed framework can uniquely and accurately identify any or all of the thefts to the embedded system hardware at low silicon overhead.

BlueIO

In safety-critical systems, time predictability is vital. This extends to I/O operations that require predictability, timing-accuracy, parallel access, scalability, and isolation. Currently, existing approaches cannot achieve all these requirements at the same time. In this article, we propose a framework of hardware framework for real-time I/O virtualization—termed BlueIO —to meet all these requirements simultaneously. BlueIO integrates the functionalities of I/O virtualization, low-layer I/O drivers, and a clock cycle level timing-accurate I/O controller (using the GPIOCP [36]). BlueIO provides this functionality in the hardware layer, supporting abstract virtualized access to I/O from the software domain. The hardware implementation includes I/O virtualization and I/O drivers, provides isolation and parallel (concurrent) access to I/O operations, and improves I/O performance. Furthermore, the approach includes the previously proposed GPIOCP to guarantee that I/O operations will occur at a specific clock cycle (i.e., be timing-accurate and predictable). In this article, we present a hardware consumption analysis of BlueIO to show that it linearly scales with the number of CPUs and I/O devices, which is evidenced by our implementation in VLSI and FPGA. We also describe the design and implementation of BlueIO and demonstrate how a BlueIO-based system can be exploited to meet real-time requirements with significant improvements in I/O performance and a low running cost on different OSs.

Online droplet monitoring in inkjet 3D printing using catadioptric stereo system

Inkjet 3D printing is becoming one of the most disruptive additive manufacturing technologies, due to its unique capability of precisely depositing micro-droplets of multi-functional materials. It has found widespread industrial applications in aerospace, energy and health areas by processing multi-functional metal-materials, nano-materials, and bio-materials. However, the current inkjet 3D printing system still suffers from a low production quality issue, due to low process reliability caused by the complex and dynamic droplet dispensing behavior. Due to the challenges in terms of efficiency, accuracy, and versatility, robust droplet monitoring and process inspection tools are still largely unavailable. To this end, a novel catadioptric stereo system is proposed for online droplet monitoring in an inkjet 3D printing process. In this system, a regular industrial CCD camera is coupled with a flat mirror and magnification lens system to capture the tiny droplet images to detect the droplet location in 3D space. A mathematical model is formulated to calculate the droplet location in 3D world space from 2D image space. A holistic hardware and software framework is constructed to evaluate the performance of the proposed system in terms of resolution, accuracy, efficiency, and versatility, both theoretically and experimentally. The results show that the proposed catadioptric stereo system can achieve single micron resolution and accuracy, which is one-order-of-magnitude higher than the 3D printing system itself. The proposed droplet location detection algorithm has low time complexity, and the detection efficiency can meet the online monitoring requirement. Multi-facet features including the droplet location and speed can be effectively detected by the presented technique. The proposed catadioptric stereo system is a promising online droplet monitoring tool and has tremendous potential to enable trustworthy quality assurance in inkjet 3D printing.

V-Matrix-Based Scalable Data Aggregation Scheme in WSN

Data aggregation is one of the most important functions provided by wireless sensor networks (WSNs). Among a variety of data aggregation schemes, the coding-based approaches (such as Compressive sensing (CS) and other similar programs) can significantly reduce traffic quantity by encoding the raw sensed data using weight vectors. The critical feature to design a coding-based data aggregation protocol is to construct a weight/measurement matrix for the application scenario. After that, the sink node assigns the column of the matrix, which is treated as the weight vector during the encoding process, to each sensor node respectively. However, for a dynamic scenario where the number of sensor nodes changes frequently, the existing approaches have to reconfigure the network by regenerating the measurement matrix and allocating the new weight vectors for all the existing nodes, which causes a considerable energy consumption and affects the regular monitoring tasks. To solve this problem, we propose a Vandermonde matrix-based scalable data aggregation protocol (VSDA) , which preserves the advantages of coding-based schemes and addresses the issues mentioned above. In VSDA , as new nodes join into the scaled-up network, the original weight vectors owned by the original nodes do not need to regenerate the weight vectors entirely but add some new entries by itself at all. It outperforms the existing schemes by saving the energy in network scaling-up. Besides, we propose a concise hardware framework to quantify the data encoding process of VSDA , which provides a performance analysis process that is closer to practical application. The numeric tests validate the performance of VSDA compared with the existing schemes in several aspects, such as, the number of transmissions, energy consumption, and storage space showing the outperformance of VSDA scheme.

PHAX: Physical Characteristics Aware <italic>Ex-Situ</italic> Training Framework for Inverter-Based Memristive Neuromorphic Circuits

In this paper, we propose a training framework for an inverter-based memristive neuromorphic hardware. The framework, which is called PHAX, is a physical characteristics aware one relying on an ex-situ training approach. The considered neuromorphic circuit is highly energy efficient hybrid CMOS-memristive implementation of neuromorphic circuits. To solve the problem of high sensitivity of the training to the mismatches between the high-level mathematical modeling of the neurons and the corresponding physical characteristics, an approach for analytical yet accurate modeling of the memristive crossbar and neuron circuits is suggested. The approach, which is based on SPICE simulations, models the inverter-based neurons using a hyperbolic tangent function. To increase the training efficacy, the backpropagation training algorithm is modified by considering some constraints based on the physical characteristics of the memristive circuit. This modification along with the accurate back-annotation of the physical characteristics considerably improve the effectiveness of the ex-situ training method of the neuromorphic circuit. The results of this paper show an average reduction of $1805{\times }$ in the training runtime compared to that of the in-situ training approach. Furthermore, the results of applying the approach on the kernels of some applications such as image recognition, image processing, and financial analysis reveal that the designed neuromorphic circuits provide an average power saving (speed up) of $1478{\times }$ ( $5.2{\times }$ ) over the ASIC implementation in a 90-nm CMOS technology.

Assessment of building structure using data from dynamic monitoring

The problem on diagnosis and assessment of building constructions on the basis of information of complex dynamic monitoring is considered. Determining factors are divided in accordance with the acting regulatory documents for the diagnostics of structures material properties, the presence of defects in elements and the response parameters of structures subjected to dynamic impact. As a hardware framework for dynamic analysis of the construction response characteristics the 12-channel vibration measuring setup with highly sensitive accelerometers of the seismic range is used. The obtained regularities for changes in the primary factors and their influence on the structure properties are used for the learning of the system for recognition of dynamic signals on the basis of neural networks.

FPGA Prototyping of Micro-Blaze soft-processor based Multi-core System on Chip

The increased demand for processor-level parallelism has many-folded the challenges for SoC designers to design, simulate and verify/validate today’s Multi-core System-On-Chip (SoC) due to the increased system complexity. There is also a need to reduce the design cycle time to produce a complex multi-core SOC system thereby the product can be brought into the market within an affordable time. The Computer-Aided Design (CAD) tools and Field Programmable Gate Arrays (FPGAs) provide a solution for rapidly prototyping and validating the system. This paper presents an implementation of multi-core SoC consisting of 6 Xilinx Micro-Blaze soft-core processors integrated to the Zynq Processing System (PS) using IP Integrator and these cores will be communicated through AXI bus. The functionality of the system is verified using Micro-Blaze system debugger. The hardware framework for the implemented system is implemented and verified on FPGA.

Research on Intelligent Control System of Manipulator Based on Multi Degree of Freedom

In order to improve the accuracy and flexibility of forestry robot mechanical arm, the mechanical arm mathematical model is constructed in this paper by Denavit–Hartenberg parameter method, and the inverse solution algorithm based on Newton iteration method is designed. On this basis, in the joint space, three times interpolation and five times interpolation algorithm are designed for path planning. Then, the hardware framework and software system of mechanical arm control system are designed, and the simulation experiment is carried out, to test the precision and error of mechanical arm. The results showed that the motor rotation error of the seven freedom mechanical arm control system is 0.025%, the position error of the mechanical arm is 5%, and the repetitive positioning error of the mechanical arm is less than 7 mm. Based on the above findings, it is concluded that the error of the end motion is within the allowable range, and the desired design requirements are completed.

Architecture Design and Implementation of an Autonomous Vehicle

Architecture design is one of the most important problems for an intelligent system. In this paper, a practical framework of hardware and software is proposed to reveal the external configuration and internal mechanism of an autonomous vehicle-a typical intelligent system. The main contributions of this paper are as follows. First, we compare the advantages and disadvantages of three typical sensor plans and introduce a general autopilot for a vehicle. Second, we introduce a software architecture for an autonomous vehicle. The perception and planning performances are improved with the help of two inner loops of simultaneous localization and mapping. An algorithm to enlarge the detection range of the sensors is proposed by adding an inner loop to the perception system. A practical feedback to restrain mutations of two adjacent planning periods is also realized by the other inner loop. Third, a cross-platform virtual server (named project cocktail) for data transmission and exchange is presented in detail. Through comparisons with the robot operating system, the performance of project cocktail is proven to be considerably better in terms of transmission delay and throughput. Finally, a report on an autonomous driving test implemented using the proposed architecture is presented, which shows the effectiveness, flexibility, stability, and low-cost of the overall autonomous driving system.

Integrated method of analysis, visualization, and hardware for ship motion simulation

Abstract Traditionally, graphs were the only way to show the results of ship motion analyses. They did not usually impose any feeling about how fast the ship could move or how large the positions of the ship changed. Currently, integrated simulations combining physics-based analyses with IT technologies, such as virtual reality (VR), motion platforms, or other hardware, can offer a potential solution. In ship motion analyses, the dynamic ship response can be obtained by considering the environmental loads, such as ocean waves, and VR technology can be used to visualize the analysis results in the virtual world. We can see the ship motion relative to textures of real objects, including the water and sky, as if in the real world. The results calculated from the ship motion analysis can also be transferred to the motion platform to generate realistic movements. However, it is not easy to integrate three different technologies in one system because they have different purposes and have been developed individually. To solve this problem, an integrated simulation framework based on three different technologies is proposed. The proposed framework can be used to synchronize the simulation time and exchange the data through the middleware using a standardized data structure. Furthermore, we can easily add new components or remove the existing components in the simulation. To verify the efficiency and applicability of the proposed framework, the motion simulation of a drillship is applied. Highlights We propose an integrated simulation framework for analysis, visualization, and hardware. Multibody dynamics is used for the motion analysis. We perform the integrated motion simulation of a drillship. The motion analysis, visualization, and motion platform of a drillship are perfectly synchronized.

Web-Based Remote Control of a Building's Electrical Power, Green Power Generation and Environmental System Using a Distributive Microcontroller.

This article proposes a novel, web-based, remote monitoring and control system design for a building’s electrical power, green power generation and environmental system that will save energy. The supervisory control system is based on the use of distributed microcontroller architecture to access programmable logic controllers (PLC) and remote input/output devices through the system hardware framework with uniform Ethernet technology. The programmable logic controller (PLC) can access and control devices directly or through RS-232 and RS-485 serial communication. The distributed microcontroller is the control module designated through an open-source firmware, to transform heterogeneous communication to Modbus transmission control protocol (TCP) communication and to achieve the exchange of information between the host and client controller. The proposed supervisory control and data acquisition (SCADA) system is based on the professional software of InduSoft Web Studio and provides a supervisory control design with a friendly human–machine interface. The system can realize real-time data acquisition and storage, control command transmission, system security and power trend analysis. Finally, the proposed SCADA system can be built directly into the hypertext markup language (HTML) and HTML5 and run on the web server, allowing access from a personal computer or smartphone web browser. Our system goals are to greatly reduce system complexity and maintenance costs with a simple Ethernet architecture. The control system can be easily expanded with the same technology culture outside the restrictive one of the large companies. Hence, this system can easily be used in a smart home system to enhance the quality of its inhabitants.

A Processor and Cache Online Self-Testing Methodology for OS-Managed Platform

Software-based self-test (SBST) is an effective method to detect operational faults of a processor system. We propose an architectural approach to support high fault-coverage online SBST: Processor Shield, which tackles the difficult-to-test issues raised due to the protection of an operating system. The processor shield, including a software framework and design for testing hardware, creates an online self-testing environment without influencing other processes and on-bus devices even if the SBST fails. We present a case study that demonstrates SBST executions under Linux kernel on an ARMv5-compatible processor system. For CPU testing, the stuck-at fault coverage is over 99% while the transition fault coverage is higher than 93%. For cache control logic testing, the stuck-at fault coverage is over 99% while the transition fault coverage is higher than 95%. For RAM module testing, the fault coverage is nearly 100%. Cache SBSTs finish in a context-switch interval of less than 4 ms while CPU SBST finishes in less than 8 ms for 1-GHz clock. The hardware overhead of the processor shield is only 0.494% of the whole processor area. We also present an SBST-dynamic voltage and frequency scaling application that calibrates the dynamic minimal guardbands and helps achieving lower power consumption and mitigating transistor-aging effect.

An analysis framework for hardware and software implementations with applications from cryptography

With the richness of present-day hardware architectures, tightening the synergy between hardware and software has attracted a great attention. The interest in unified approaches paved the way for newborn frameworks that target hardware and software co-design. This paper confirms that a unified statistical framework can successfully classify algorithms based on a combination of the heterogeneous characteristics of their hardware and software implementations. The proposed framework produces customizable indicators for any hybridization of processing systems and can be contextualized for any area of application. The framework is used to develop the Lightness Indicator System (LIS) as a case-study that targets a set of cryptographic algorithms that are known in the literature to be tiny and light. The LIS targets state-of-the-art multi-core processors and high-end Field Programmable Gate Arrays (FPGAs). The presented work includes a generic benchmark model that aids the clear presentation of the framework and extensive performance analysis and evaluation.

DEVELOPING UNIVERSITY STUDENTS’ ENGLISH READING AND LISTENING SKILLS THROUGH ONLINE LANGUAGE LEARNING

The panoply of technological applications in diverse educational contexts signals a necessity for continued inquiry into online language learning (OLL), especially in relation to its impact on different learner populations whose perception and acceptance of OLL can vary across settings. This pilot study involved over 200 Chinese students in a Hong Kong university and examined their OLL experience with respect to online activities that provided reading and listening skills practice. Results of the study suggest the easy availability of internet resources can greatly amplify students’ OLL experience, while raising four challenges in the areas of online materials development, student motivation, pedagogy-technology interface, and intercultural communicative competence. Possible ways of tackling such challenges are outlined. The article concludes with a view that successful OLL needs to be predicated on a tripartite framework of hardware, software and humanware.

Surgeon Training in Telerobotic Surgery via a Hardware-in-the-Loop Simulator.

This work presents a software and hardware framework for a telerobotic surgery safety and motor skill training simulator. The aims are at providing trainees a comprehensive simulator for acquiring essential skills to perform telerobotic surgery. Existing commercial robotic surgery simulators lack features for safety training and optimal motion planning, which are critical factors in ensuring patient safety and efficiency in operation. In this work, we propose a hardware-in-the-loop simulator directly introducing these two features. The proposed simulator is built upon the Raven-II™ open source surgical robot, integrated with a physics engine and a safety hazard injection engine. Also, a Fast Marching Tree-based motion planning algorithm is used to help trainee learn the optimal instrument motion patterns. The main contributions of this work are (1) reproducing safety hazards events, related to da Vinci™ system, reported to the FDA MAUDE database, with a novel haptic feedback strategy to provide feedback to the operator when the underlying dynamics differ from the real robot's states so that the operator will be aware and can mitigate the negative impact of the safety-critical events, and (2) using motion planner to generate semioptimal path in an interactive robotic surgery training environment.

Developing University Students' English reading and listening skills through online language learning

The panoply of technological applications in diverse educational contexts signals a necessity for continued inquiry into online language learning (OLL), especially in relation to its impact on different learner populations whose perception and acceptance of OLL can vary across settings. This pilot study involved over 200 Chinese students in a Hong Kong university and examined their OLL experience with respect to online activities that provided reading and listening skills practice. Results of the study suggest the easy availability of internet resources can greatly amplify students’ OLL experience, while raising four challenges in the areas of online materials development, student motivation, pedagogy-technology interface, and intercultural communicative competence. Possible ways of tackling such challenges are outlined. The article concludes with a view that successful OLL needs to be predicated on a tripartite framework of hardware, software and humanware. Key words: Online language learning. Technology-enhanced language learning. English reading and listening skills.

Lightness: A Function-Virtualizable Software Defined Data Center Network With All-Optical Circuit/Packet Switching

Modern high-performance data centers are responsible for delivering a huge variety of cloud applications to the end-users, which are increasingly pushing the limits of the currently deployed computing and network infrastructure. All-optical dynamic data center network (DCN) architectures are strong candidates to overcome those adversities, especially when they are combined with an intelligent software defined control plane. In this paper, we report the first harmonious integration of an optical flexible hardware framework operated by an agile software and virtualization platform. The LIGHTNESS deeply programmable all-optical circuit and packet switched data plane is able to perform unicast/multicast switch-over on-demand, while the powerful software defined networking (SDN) control plane enables the virtualization of computing and network resources creating a virtual data center and virtual network functions (VNF) on top of the data plane. We experimentally demonstrate realistic intra DCN with deterministic latencies for both unicast and multicast, showcasing monitoring, and database migration scenarios each of which is enabled by an associated network function virtualization element. Results demonstrate a fully functional complete unification of an advanced optical data plane with an SDN control plane, promising more efficient management of the next-generation data center compute and network resources.

Research on architecture of security video surveillance network cascade system with big data

Purpose The high-efficient processing of mass data is a primary issue in building and maintaining security video surveillance system. This paper aims to focus on the architecture of security video surveillance system, which was based on Hadoop parallel processing technology in big data environment. Design/methodology/approach A hardware framework of security video surveillance network cascaded system (SVSNCS) was constructed on the basis of Internet of Things, network cascade technology and Hadoop platform. Then, the architecture model of SVSNCS was proposed using the Hadoop and big data processing platform. Findings Finally, we suggested the procedure of video processing according to the cascade network characteristics. Originality/value Our paper, which focused on the architecture of security video surveillance system in big data environment on the basis of Hadoop parallel processing technology, provided high-quality video surveillance services for security area.

Parking Sensing and Information System: Sensors, Deployment, and Evaluation

This paper describes a smart parking sensing and information system that disseminates parking availability information to public users in a cost-effective and efficient manner. The hardware framework of the system is built on advanced wireless sensor networks and cloud service over the Internet, and the system is highly scalable. The parking information provided to the users is set in the form of occupancy rates and expected cruising time. Both are obtained from an analytical algorithm that processes historical and real-time data and are then visualized in a color theme. The entire parking system is deployed and extensively evaluated at Stanford University, California, Parking Structure 1.

Digital implementations of thalamocortical neuron models and its application in thalamocortical control using FPGA for Parkinson׳s disease

Due to the relay ability of sensory information and communication between cortical regions, the thalamocortical (TC) relay neuron plays an essential role in the therapy of Parkinson׳s disease. This paper first explores a series of efficient methods for the hardware implementation of TC relay neuron models, aiming to reproduce relevant biological behaviors and present appropriate feedback control in neural dynamics in thalamic systems. In addition, a modified two-dimensional TC neuron model is presented for convenient realization to decrease the complexity of the original model and promote the feasibility of the digital design, which shows significance for the large-scale network simulation of TC-based networks and the establishment of digital thalamus. A system-on-a-chip model-based control system is implemented on an FPGA using the modified TC neuron model, which is aimed at the real-time feedback control of tremor dominant Parkinsonian state. In this paper, the hardware syntheses and theoretical researches are given to illustrate the outstanding performance of the presented hardware implementation. The presented platform can be applied in both the brain-machine interface and the robotic control projects, and the proposed modular hardware framework can be extended to the real-time closed-loop treatments of other dyskinesia diseases.