Half-bridge Module Research Articles

A Generic Scheduling Algorithm for Low-Frequency Switching in Modular Multilevel Converters With Parallel Functionality

Since the introduction of modular multilevel converters (MMC), various additional features have been introduced for MMCs, among them parallel inter-module connectivity. However, such a parallel mode requires appropriate modulation and switching strategies to exploit its full potential. Low-frequency switching modulation is widely used with half-bridge modules and a large body of research focusses on the optimum control and scheduling of these methods. However, so far, a suitable adaptation for MMCs with parallel mode is missing, and existing methods perform suboptimum. This article proposes a generic scheduling algorithm for simple and low-cost integration with low-frequency switching modulation. The proposed method reduces control complexity, minimizes power loss, and can be combined with most modulation techniques, including nearest-level modulation (NLM) and selective harmonic elimination. The text in this article provides a general algorithm for integrating this method with other control levels and analyzes its effect on MMCs with parallel functionality. Moreover, it examines the performance of the system with NLM combined with the proposed scheduler and compares it to other alternatives. Results show up to a 50% reduction in power loss with a similar modulation technique as well as significantly lower THD and power loss compared to optimized phase-shifted carrier modulation as another sensorless alternative method.

Third Quadrant Conduction Loss of 1.2–10 kV SiC MOSFETs: Impact of Gate Bias Control

The third quadrant (3rd-quad) conduction of power MOSFETs involves competing current sharing between the metal-oxide-semiconductor (MOS) channel and the body diode controlled by the gate bias (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> ). For 1.2 kV SiC planar MOSFETs, it is well known that a positive V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> higher than the threshold voltage enables parallel conduction through both channels, which reduces the 3rd-quad voltage drop and conduction loss. This work, for the first time, unveils that this fact does not hold for higher voltage (e.g., 3.3 kV and 10 kV) SiC planar MOSFETs. By combining the static characterization, simulation, and modeling, it is revealed that, once the MOS channel turns on, the body diode in high-voltage MOSFETs turns on at a source-to-drain voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SD</sub> ) much higher than the built-in potential of the PN junction. In 10 kV SiC MOSFETs, the body diode does not turn on over the entire practical V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">SD</sub> range if the MOS channel is on. As a result, the positive V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> leads to completely unipolar conduction, which could induce a higher voltage drop than the bipolar body diode at high temperatures. A buck converter based on a 10 kV SiC MOSFET half-bridge module was built and tested, which validated that a negative V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> control provides the smallest 3rd-quad voltage drop and conduction loss at high temperatures. Finally, based on the revealed physics for planar MOSFETs, the optimal V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</sub> control for the 3rd-quad conduction in trench MOSFETs is discussed. These results provide critical device understandings of 1.2-10 kV SiC MOSFETs and important application guidelines for 10 kV SiC MOSFETs.

Power Cell Design and Assessment Methodology Based on a High-Current 10-kV SiC MOSFET Half-Bridge Module

While 10-kV silicon-carbide (SiC) MOSFETs are gradually penetrating medium-voltage (MV) applications, intertwined challenges concerning high-voltage insulation, high dv/dt, protections, and thermal management are simultaneously imposed to MV converters. For the modular multilevel converter, a systematical power cell design and assessment methodology (DAM) to tackle the unprecedented challenge synergy is essential and, yet, absent. Thereby, this article aims to develop a DAM based on a high-current 10-kV SiC MOSFET half-bridge module. An overall introduction of the power cell and a hierarchical DAM workflow is first presented, followed by the comprehensive component-level DAM with details on design challenges, solutions, assessment instruments, procedures, and test results. Subsequently, the DAM is expanded to the power cell level by exploring its safe operating area associated with switching frequency, power-processing capability, and temperature limit in various operation modes, which, in turn, validates the component designs and determines if they need iterations. Following the methodology, the power cell design is finalized, capable of continuous operation under 6 kV, 84-A rms, and 10 kHz, exhibiting 99.3% efficiency and transient immunity up to 100 V/ns.

Switching Performance Analysis of Vertical GaN FinFETs: Impact of Interfin Designs

This article studies the switching performance of vertical GaN power FinFETs and proposes new interfin designs to improve it. The interfin region has been found to be an important limiting factor for FinFET switching performance. The time taken to (dis)charge the dielectric parasitic capacitances and drift layer in the interfin regions severely limits the device turn-(on)off speed. Three new interfin designs are proposed, based on reduced fin-to-fin spacing, oxide full-filling (FF), and split-gate (SG) structures. The 1.2-kV, 80-mΩ vertical GaN FinFETs with these designs were evaluated by a well-calibrated device-circuit mixed-mode technology computer-aided design (TCAD) simulation. Both the reduced-fin-spacing structure and the oxide FF reduce the dielectric parasitic capacitances, but only lead to small reduction (less than 10%) in switching losses. Much better improvement is obtained with the SG structure, which removes the gate metal in the interfin region and exposes the drift layer to the field lines from the source metal. During the turn-(on)off of the transistor with a SG structure, the drift layer underneath the interfin gap region is (dis)charged by a combination of the drain-to-source and gate currents, leading to shorter switching times and lower switching losses. By utilizing the SG structure, simulations predict a 58% improvement in the switching figure-of-merit and 38% lower switching losses in 1.2-kV vertical gallium nitride (GaN) power FinFETs. These results provide key understanding and design guidelines for power FinFETs. Finally, an 800-V buck converter using a 1.2-kV GaN FinFET half-bridge module is simulated, showing excellent efficiency when operating at a multi-MHz frequency and revealing the requirement for device thermal management. This highlights the great potential of vertical GaN power FinFETs for future high-frequency medium-voltage power applications.

A Power Module for Grid Inverter With In-Built Short-Circuit Fault Current Capability

As grid codes evolve, inverter-interfaced renewable generation may be required to take greater responsibility for grid support. It may be obliged to source a large current during a short-circuit fault in the grid and provide large dynamic reactive power, beyond the inverter rating, for voltage recovery after the fault clearance. In this sense, the inverter-interfaced generating system would behave more similarly to a conventional synchronous machine. This is not yet mandatory but current technology cannot readily support it if required in the future, because the power semiconductors would overheat unless they are drastically derated. This study proposes a method to increase the power semiconductor's transient thermal capacity, and hence its short-term over-current capability, by integrating a phase-change material inside the power semiconductor module. Experiment and thermodynamic simulation across different materials are used to illustrate the feasibility of the concept and the factors that should be considered in such a design. The study shows that 1.5 p.u. (per unit) overcurrent could be achieved for 30 s, which is typical of synchronous generators; and 3.0 p.u. fault current could be achieved for 3 s. A custom-made 1200-V, 50-A IGBT half-bridge module integrating a liquid metal as the phase change material is compared with a conventional commercially available module. A validated simulation model is then used to further evaluate the proposal, regarding a 1700-V, 1000-A IGBT module for use in a wind turbine.

A Wire Bondless SiC Switching Cell With a Vertically Integrated Gate Driver

In this article, an SiC half-bridge module with an integrated gate driver is demonstrated. A physically and electrically compact integration scheme produces a decrease in the parasitic inductance of the critical switching loops in the circuit. Furthermore, a wire bondless integration scheme was devised for the power devices to keep the interconnect parasitic inductance to very low levels. This was realized by converting a bare die SiC power device into a flip-chip capable chip-scale package. This article provides a description of the implementation of the novel wire bondless chip-scale device packages in a switching cell with an integrated gate driver. The electrical performance of the module was evaluated, and very high slew rates of 24 V/ns were demonstrated with <5% overshoot. These results were encouraging for realizing high-frequency switching in SiC power electronic systems.

Comparison and Discussion on Shortcircuit Protections for Silicon-Carbide MOSFET Modules: Desaturation Versus Rogowski Switch-Current Sensor

Survivability of silicon-carbide (SiC) mosfet modules during short circuit (SC) is essential for modern power electronics systems due to large economic implications. SiC mosfet modules exhibit narrow SC withstand times and generally much lower SC robustness than silicon (Si) insulated-gate bipolar transistors (IGBTs). This puts a critical concern on their utilization, further stressing the importance of reliable protection. This article presents a comprehensive analysis and discussion on the SiC mosfet module SC protection and performance comparison between conventional desaturation detection, previously used for Si IGBT protection, and Rogowski switch-current sensor (RSCS) detection. In addition, this article presents the experimental design for soft turn-off as a reaction to the SC detection to avoid excessive overshoots during the abrupt turn-off of the SC current. To perform different types of SC with various fault inductances on different temperatures, and for the sake of fair comparison under the same conditions, a gate-driver unit for 1.2 kV SiC mosfet half-bridge modules is developed containing both detection methods. The results demonstrate that both methods are successful in protecting the module in all SC types, with superiority of the RSCS detection and concerns for desaturation detection in high-inductance and high dc-bus voltage SC events.

Switching Performance of a 3.3-kV SiC Hybrid Power Module for Railcar Converters

The unique properties of a SiC hybrid 3.3-kV/450-A half-bridge IGBT power module which is designed for enhanced reliability of railcar converters are presented in this paper. The hybrid technique enabled by utilizing the state-of-the-art 3.3-kV SiC SBDs has shown impressive electrical performances during switching. The switching waveforms, switching time lengths, voltage overshooting, current overshooting and information contained therein have been exploited in detail, in comparison with the corresponding fully Si-based IGBT module as a control sample. The potential of reliability enhancement by this SiC hybrid concept at the rated voltage and current levels will provide essential benchmark for railcar converter designs.

Common-Ground-Type Five-Level Transformerless Inverter Topology With Full DC-Bus Utilizaton

Transformerless inverters (TIs) are widespread in photovoltaic (PV) applications due to their low cost and high efficiency. However, TIs suffer due to leakage current as a consequence of PV parasitic capacitance, and high-frequency common-mode voltage, which has resulted in the emergence of several topological and control scheme modifications. In this article, a switched-capacitor (SC) based inverter capable of synthesizing a five-level voltage is proposed. In the devised structure, the negative pole of the dc bus is directly connected to the grid neutral, thereby resulting in zero leakage current. In addition, industrial standard half-bridge modules can be employed directly for implementing the proposed inverter without modifications, making it more practically feasible. The proposed topology has the capability of self-voltage balancing of SC, reactive power processing, and full dc-bus utilization as opposed to half-bridge topologies. The principle of operation and a simple logic-gate-based pulse generation scheme is presented in detail. Simulation and experimental results confirming the practical viability of the proposed topology are presented. Finally, the superior features and the merits of the proposed topology are shown through a detailed comparison against state-of-the-art topologies.

Asymmetrical Three-Level Inverter SiC-Based Topology for High Performance Shunt Active Power Filter

Power quality conditioner systems, such as shunt active power filters (SAPFs), are typically required to have low power losses, high-power density, and to produce no electromagnetic interference to other devices connected to the grid. At the present, power converters with such a features are built using multilevel topologies based on pure silicon semiconductors. However, recently new semiconductors that offer massive reduction of power losses such as silicon carbide (SiC) MOSFETs have been introduced into the power electronics field. In the near future, the applications that demand the highest performance will be powered by multilevel converters based on SiC. In this paper a highly efficient three-level (3L) topology based entirely on silicon carbide (SiC) semiconductors for a SAPF is presented and analyzed in great detail. Furthermore, the proposed topology is compared with other full SiC-based conventional topologies: two level (2L), three-level T-type (3L-TNPC), and three-level neutral-point-clamped (3L-NPC) in terms of efficiency. The proposed asymmetrical topology has an efficiency superior to conventional all SiC 2L and 3L power circuits when the pulse or switching frequency of the system is set higher than 60 kHz. Further, for high current ratings, the asymmetrical topology has the advantage that it can be built just by cascading two half-bridge SiC modules.

High-temperature characteristics of SiC module and 100 kW SiC AC-DC converter at a junction temperature of 180 °C

High-temperature, high-power converters have gained importance in industrial applications given their ability to operate in adverse environments, such as in petroleum exploration, multi-electric aircrafts, and electric vehicles. SiC metal- oxide-semiconductor field-effect transistor (MOSFET), a new, wide bandgap, high-temperature device, is the key component of these converters. In this study, the static and dynamic characteristics of the SiC MOSFET, half-bridge module, are investigated at the junction temperature of 180 °C. A simplified experimental method is then proposed pertaining to the power operation of the SiC module at 180 °C. This method is based on the use of a thermal resistance test platform and is proven convenient for the study of heat dissipation characteristics. The high-temperature characteristics of the module are verified based on the conducted experiments. Accordingly, a 100 kW high-temperature converter is built, and the test results show that the SiC converter can operate at a junction temperature of 180 °C in a stable manner in compliance with the requirements of high-temperature, high-power applications.

A Family of Three-Port Three-Level Converter Based on Asymmetrical Bidirectional Half-Bridge Topology for Fuel Cell Electric Vehicle Applications

In this paper, a family of three-port three-level converters (TPTLC) composed of asymmetrical bidirectional half-bridge modules is proposed, which offers the benefits in terms of a simple control scheme, extended soft switching over a wide range of operating conditions, and reduced voltage stress across switches. The proposed converters take advantage of a pulsewidth modulation plus phase shift control technique to regulate the output voltage as well as to control the power flow between different ports independently. A stacked TPTLC is taken as an example to be introduced in detail to gain a thorough insight into the proposed family of converters. The stacked TPTLC can provide a high voltage gain along with a wide voltage gain range without using any transformer, resulting in the improvement in the power density. In order to minimize the conduction loss and reduce the current stress of switches, the root-mean-square current of the inductor and the boundary condition of the phase-shift controller in different operation scenarios are studied. Finally, the feasibility of the proposed concept and effectiveness of the design approach are validated based on the experimental results of a 1-kW, 100-kHz prototype of the stacked TPTLC using gallium nitride switches.

Design and Validation of A 250-kW All-Silicon Carbide High-Density Three-Level T-Type Inverter

This article presents a comprehensive design and validation of a compact all-silicon carbide (SiC) 250-kW T-type traction inverter with a power density of 25 kW/l and 98.5% peak efficiency. All the operation modes and switching transitions in a T-type phase leg are analyzed to model the semiconductor power losses over a fundamental cycle. Special attention has been paid to investigate the behavior and losses due to the reverse conduction of the SiC MOSFETs. Then a loss model is built based upon this analysis to calculate the device loss distribution and system efficiency, which is further used to determine the optimal switching frequency. In addition, detailed inverter system design and prototyping procedure, including the selection of SiC modules and dc-link capacitors, and the optimization of a four-layer laminated busbar, are presented. In this article, the T-type phase leg is formed by a normal half-bridge module and a common-source module. The switching performance and losses in this configuration are different from two-level topology that only uses one SiC module. Therefore, the switching performance and the associated switching energy in each switch position are characterized using a custom clamped inductive load (CIL) test setup designed for a T-type phase leg. The performance of the full power traction inverter prototype has been verified experimentally using pulse testing and continuous power testing.

Performance Analysis of Medium-Voltage Grid Integration of PV Plant Using Modular Multilevel Converter

Modular multilevel converter (MMC) topology has emerged as an attractive solution for Photovoltaic (PV) applications. Such a structure due to its inherent modularity allows distributed architecture of utility scale PV plant. Moreover, converters scalability allows for direct connection to the medium voltage grid by avoiding the need for the step-up transformer. The isolation is provided at the interface between the PV array and the MMC by using an isolated DC-DC converter. In this work the MMC performance is evaluated and compared with the main central inverter configurations in terms of annual energy yield, efficiency and levelized cost of energy. Efficiency curve from no load to full load is obtained for the MMC through simulations using standard IGBT half-bridge modules. It is seen that the efficiency curve is flat for a wide range of loads resulting in a higher annual energy yield and lower Levelized Cost of Energy (LCOE).

Design, Analysis, and Discussion of Short Circuit and Overload Gate-Driver Dual-Protection Scheme for 1.2-kV, 400-A SiC MOSFET Modules

This paper proposes short circuit and overload gate-driver dual-protection scheme based on the parasitic inductance between the Kelvin- and power-source terminals of high-current SiC mosfet modules. The paper presents a comprehensive analysis of the two schemes in question, including worst-case analysis used to assess their parametric dependence due to manufacturing tolerances and temperature variations, as well as the in-depth design procedure that can be generally applied to any power module containing a Kelvin-source. For verification, a compact 1.2-kV, 400-A half-bridge module integrating the two protection circuits was developed. The results obtained demonstrate a response time within tens of nanoseconds, and effectively validate their functionality under short circuit and overload scenarios. Finally, a 100-kW, 400-V dc three-phase voltage-source inverter was used to demonstrate the gate-driver with integrated protection functions under 105°C ambient temperature conditions.

An SiC MOSFET and Si Diode Hybrid Three-Phase High-Power Three-Level Rectifier

The utilization of wide bandgap devices such as silicon carbide (SiC) diode and mosfet can significantly increase the power density and the efficiency of rectifier circuits. However, SiC-based circuits always suffer from the high cost of their power stage. In this paper, a highly efficient low-cost hybrid three-phase three-level rectifier is proposed. Instead of using SiC diode and Si IGBT, it consists of SiC mosfet and Si diode. It presents extremely low switching losses because the reverse recovery losses of all the Si diodes are eliminated. At the same time, the total device cost of this rectifier is much lower than the all-SiC-based rectifiers. Furthermore, half-bridge modules can be used to comprise the rectifier circuit, which makes it suitable for high-power applications. In this paper, the circuit operational analysis, simulation, and experimental results are given. A comparison is given to show the advantages of the proposed rectifier.

Suppressing Methods of Parasitic Capacitance Caused Interference in a SiC MOSFET Integrated Power Module

By integrating gate drivers in the silicon carbide (SiC) power module, low parasitic inductances in power loop and driving loop are realized to improve switching performance. However, the voltage variation of midpoint in the half-bridge module causes interference at the input of gate drivers. The interference loop is analyzed in this paper, considering corresponding parameters, such as parasitic capacitance and switching speed. A circuit model is derived with experimental verification. Based on the circuit model and analysis, discussions of this interference are done and it shows that serious situations such as shoot-through may happen. Therefore, different suppressing methods of this parasitic capacitance caused interference are proposed in this paper and comparison between these techniques is done, showing that the shielding method can totally eliminate this interference. This paper offers help for the design and fabrication of SiC power module with integrated gate drivers.

Design of a full SiC three‐phase power factor correction with an interleaved output buck converter

Active rectification of the three-phase grid nowadays is a central task of power electronics. However, as the necessary DC bus voltages vary, DC-DC converters are needed. This study presents the design and development of a three-phase power factor correction with an interleaved buck converter in the output stage. The power stage switches are equipped with silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors. A modular setup of the half-bridge modules as well as low inductive design of these modules is put into focus.

Modular multilevel converter with DHB energy‐balancing channels for medium‐voltage adjustable‐speed drives

This paper presents a modular multilevel converter (MMC) configuration that utilises energy exchange between submodules (SMs) of upper and lower arms, for energy rebalancing. The configuration is applicable to mediumvoltage high-power variable-speed drives with any number of motor phases, where the traditional MMC topology experiences challenging shortcomings. With the out-of-phase alternation of the fundamental ripple power in upper and lower arms, the proposed MMC configuration decouples this ripple power by employing dual half-bridge modules linking opposite SMs in upper and lower arms of the same MMC-leg. This counter-balances arm ripple-power through bidirectional power transfer between opposite SMs, resulting in a reduction in the SM capacitance and the MMC system stored energy. The proposed MMC configuration solves the problem of wide SM capacitor voltage fluctuation, especially at low operating frequencies, where the SM capacitor voltage ripple profile is almost constant, independent of the operating frequency. Therefore, the configuration is able to drive multi-megawatt machines from stand-still to the rated speed, at rated torque. The operation of the proposed converter topology is elucidated in detail, and its effectiveness is verified through simulation and experimentation.

MMC-Based SRM Drives With Decentralized Battery Energy Storage System for Hybrid Electric Vehicles

This paper proposes a modular multilevel converter (MMC) based switched reluctance motor (SRM) drive with decentralized battery energy storage system for hybrid electric vehicle applications. In the proposed drive, a battery cell and a half-bridge converter is connected as a submodule (SM), and multiple SMs are connected together for the MMC. The modular full-bridge converter is employed to drive the motor. Flexible charging and discharging functions for each SM are obtained by controlling switches in SMs. Multiple working modes and functions are achieved. Compared to conventional and existing SRM drives, there are several advantages for the proposed topology. A lower dc-bus voltage can be flexibly achieved by selecting SM operation states, which can dramatically reduce the voltage stress on the switches. Multilevel phase voltage is obtained to improve the torque capability. Battery state-of-charge balance can be achieved by independently controlling each SM. Flexible fault-tolerance ability for battery cells is equipped. The battery can be flexibly charged under both running and standstill conditions. Furthermore, a completely modular structure is achieved by using standard half-bridge modules, which is beneficial for market mass production. Experiments carried out on a three-phase 12/8 SRM confirm the effectiveness of the proposed SRM drive.