Gate Oxide Growth Research Articles

Submicron P-Channel Mos Devices with Boron Doped Polysilicon Gates Fabricated by Rapid Thermal Processing

AbstractA low thermal budget process is demonstrated for the fabrication of submicron Boron doped polysilicon gate p-channel MOS devices with ultra thin gate insulators. All critical processing steps with temperatures above 700 °C, including gate oxide growth and shallow source/drain junction formation, were performed by Rapid Thermal Processing (RTP). In situ doped polysilicon was used to eliminate the need for a high temperature drive-in step. Surface channel p-channel enhancement mode devices with excellent characteristics were fabricated to demonstrate the feasibility of this process.

Physical and electrical properties of oxides grown on carbon-implanted silicon

The effects of C on gate-oxide integrity have been quantified by implanting C into 〈100〉 Si and growing an oxide ( ∼ 400Å) which incorporates the C as the Si is consumed. Implants of 10 12, 10 13, 10 14, and 10 15 10 keV C ( R p ∼ 240 A ̊ ) were follow damage anneals at 800°C, gate oxide growth at 1100°C, and a final 1000°C anneal in N 2/O 2. I– V curves showed significant lowering of breakdown field at fluences as low as 10 13/cm 2 and degradation at 10 12/cm 2. 24 MeV Si elastic recoil detection (ERD), secondary ion mass spectrometry (SIMS), and Auger electron spectroscopy (AES) profiling of C implants showed small accumulations of C by the growing oxide relative to that left in the Si.

A Comparison of RTO and Furnace Oxides

ABSTRACTThe original intent of this study was to compare rapid thermal, thin (80-100Å) gate oxides with standard, furnace-grown, thin gate oxides for endurance. Wafer processing before gate oxide growth was chosen to duplicate processing used ina typical non-volatile memory product. In particular, care was taken to duplipate pre- and post- gate growth processing of field oxide isolated polysilicon capacitors for all wafers in order to eliminate the previous difficulties in comparing oxides when different cleans and processing steps are used.[1] Substrate defects, atypical to this process, were presumably introduced during the initial wafer cleaning and scattered the time-to-breakdown (TTB) values during a constant current stress of these oxides to the point where statistical comparison of TTB averages was dubious. However, for unannealed wafers and for post polysilicon definition heat treatments of 900°C, RTO oxides grown with HCL had the same oxide trapping rate as the furnace oxides grown with TCA and RTO oxides grown in pure O2 had a faster trapping rate. Higher temperature post polysilicon definition heat treatments had different effects. RTO oxides exhibited better yield than the furnace oxides. These results illustrate the differences between RTO and furnace oxidation in the presence of non-ideal wafer substrates.

The effects of a sacrificial oxide process on metal—oxide—semiconductor field effect transistors fabricated with ion-beam-nitridation technology

Direct ion-beam nitridation was used to form a thin nitride layer on the surface of silicon wafers. When this nitride layer was used as a mask in the field oxide-growth step, the lateral encroachment of the resulting field oxide was much smaller than the encroachment produced by using the conventional local-oxidation-of-silicon method. It is desirable to reduce the lateral encroachment of the oxide, since it is a wasted region in the integrated-circuit layout. However, we found that the transistors fabricated with the ion-beam nitridation step displayed poor device performance, such as degradation of electron field effect mobility, junction leakage current and even the quality of the gate oxide. In this paper we show that the growth and removal of a sacrificial oxide prior to the gate oxide growth can improve the device performance of the transistors fabricated with ion-beam nitridation. The lateral encroachment of the sacrificial-oxide-treated sample is still small. We believe that the consumption of the damaged silicon and the additional thermal annealing associated with the sacrificial-oxide treatment are responsible for the improvements in device properties.

Improvement of breakdown voltage of oxide on V-shaped grooves by thermal oxidation and etching

In order to make the corners of V-shaped grooves rounded and improve the breakdown voltage of gate oxide there, a method of growing an oxide film on the V-shaped surface and etching it off before the gate oxide growth is proposed. Experiments and theory show its effectiveness.

Charge build-up in mos system under ionizing radiation

This paper reports the results on the charge formation in MOS system under ionizing radiation. The roles of different gate metals and oxide growth conditions are discussed.

D.C. measurement of the space charge capacitance and impurity profile beneath the gate of an MOST

An analysis of the MOS Transistor with bias between the source and substrate has shown that when the surface is weakly inverted, the silicon space charge capacitance over a wide range of temperature and bias can be obtained from the change in gate voltage required to maintain a constant channel current. The substrate impurity profile beneath the gate oxide can then be calculated from capacitance-bias measurements. Measurements made on n-channell and p-channel transistors following the growth of a thick gate oxide indicate a segregation coefficient of ⋍ 0·3 and ⋍ 100 for boron and phosphorus respectively.

Tantalum thin film “Breadboards” for switching circuit development : W. L. Harrod, Proc. 1967 Electron. Compon. Conf., Washington DC, p. 152

This paper reports on a comparative investigation of anodically grown HfO2 and Ta2O5 films as gate oxides for pentacene field effect transistors (OFETs). Ta and Hf films were deposited by e-beam evaporation onto highly doped Si wafers and anodization is carried out in an AGW (acid-glycol-water) solution. After gate oxide growth, OFETs were completed by vacuum deposition of pentacene and gold drain and source contact through a shadow mask. HfO2 and Ta2O5 exhibit a high dielectric constant (εr ~21-25) which leads to devices showing a good field effect mobility at low voltage. Devices with HfO2 show improved characteristics with a higher stability and a lower leakage current at low drain bias as well as a high mobility (μ=2.2 10−2 cm2/V.s).