Growth Of GaAs Research Articles

Pulsed Laser Deposition of Epitaxial SrTiO3/Sr3Al2O6 Templates as a Water-Soluble Sacrificial Layer for GaAs Growth and Lift-Off.

Despite the record-high efficiency of GaAs solar cells, their terrestrial application is limited due to both the particularly high costs related to the required single-crystal substrates and epitaxial growth. A water-soluble lift-off layer could reduce costs by avoiding the need for toxic and dangerous etchants, substrate repolishing, and expensive process steps. Sr3Al2O6 (SAO) is a water-soluble cubic oxide, and SrTiO3 (STO) is a perovskite oxide, where a SAO ≈ 4 × a STO ≈ (2√2)a GaAs. Here, the pulsed laser-deposited epitaxial growth of SrTiO3/Sr3Al2O6 templates on STO and Ge substrates for epitaxial GaAs growth was investigated, where SAO works as a sacrificial layer and STO protects the hygroscopic SAO during substrate transfer between deposition chambers. We identified that the SAO film quality is strongly dependent on the growth temperature and the O2 partial pressure, where either a high T or a high P(O2) improves the quality. XRD spectra of the films with optimized deposition parameters showed an epitaxial STO/SAO stack aligned to the STO (100) substrate, and TEM analysis revealed that the grown films were epitaxially crystalline throughout the thickness. The STO/SAO growth on Ge substrates at a high T with no intentional O2 flow resulted in some nonepitaxial grains and surface pits, likely due to partial Ge oxidation. GaAs was grown by metalorganic vapor-phase epitaxy (MOVPE) on STO/SAO/STO templates. Lift-off after dissolving the sacrificial SAO in water resulted in free-standing ⟨001⟩ preferentially oriented polycrystalline GaAs.

High-Quality Single-Step Growth of GaAs on C-Plane Sapphire by Molecular Beam

We report on the growth of high-quality GaAs semiconductor materials on an AlAs/sapphire substrate by molecular beam epitaxy. The growth of GaAs on sapphire centers on a new single-step growth technique that produces higher-quality material than a previously reported multi-step growth method. Omega-2theta scans confirmed the GaAs (111) orientation. Samples grown at 700 °C displayed the highest crystal quality with minimal defects and strain, evidenced by narrow FWHM values of the rocking curve. By varying the As/Ga flux ratio and the growth temperature, we significantly improved the quality of the GaAs layer on sapphire, as compared to that obtained in multi-step studies. Photoluminescence measurements at room temperature and 77 K further support these findings. This study underscores the critical role of the As/Ga flux ratio and growth temperature in optimizing GaAs epitaxial growth on sapphire.

Impact of graphene as 2D interlayer on the growth of GaAs by CSVT on Si (100) and GaAs (100) substrates

GaAs layers were grown using the closed space vapor transport (CSVT) technique on GaAs (100) and Si (100) substrates, with and without Graphene (G) as 2D interlayer. We show that GaAs grown on G presents higher crystalline quality, compared to GaAs grown directly on the substrates without the G interlayer. X-ray diffraction ω−2θ scans suggest that the GaAs layers on G exhibited (111) and (220) preferred orientation, while GaAs grown directly on GaAs and Si substrates displayed three additional orientations, which were (100), (311), (331). Further investigation through pole figure measurements confirmed the preferred out-of-plane orientation and the presence of twin defects in GaAs layers. Remarkably, we observed a reduced presence of twins in GaAs grown on G compared to GaAs grown directly on the GaAs and Si substrates. Additionally, we found a significant impact on the morphology and on the growth rate of the GaAs on G, as determined using scanning electron microscopy and secondary ion mass spectrometry, respectively. These findings showed the importance of the G interlayer in enhancing the crystalline quality of GaAs growth by CSVT, demonstrating comparable results on both GaAs (100) and Si (100) substrates. This advancement holds significant promise for reducing the manufacturing cost of optoelectronic devices.

Epitaxial growth and characterization of GaAs (111) on 4H-SiC

Epitaxial growth and characterization of GaAs (111) on 4H-SiC

Non-amphoteric N-type doping with Sn of GaAs(631) layers grown by molecular beam epitaxy

The Sn-doping effects on the electrical conduction and optical properties of GaAs(631)A epilayers grown by molecular beam epitaxy were investigated. We found that the conduction type conversion, frequently observed in the doping of layers grown on high-index substrates, is avoided when tin-doping is implemented. The maximum free-carrier concentration (n) obtained in GaAs(631):Sn was 2 × 1019 cm−3, an order of magnitude higher than previously reported for GaAs(631):Si, and within the same order of magnitude for the growth of GaAs(100):Si. The electron mobility was suitable for many optoelectronic applications. Raman spectroscopy showed low lattice disorder in (631) oriented samples, compared with singular (100) samples. The photoluminescence characterization of the samples revealed the blueshift of the optical transitions close to E0 associated with the Moss–Burstein effect for Sn doping. Photoreflectance spectroscopy was used to study the doping properties at the critical points E1 and E1 + Δ1, where the major affectation with n was perceived in the broadening parameter Γ.

Low-Temperature Migration-Enhanced Epitaxial Growth of High-Quality (InAs)4(GaAs)3/Be-Doped InAlAs Quantum Wells for THz Applications

This investigation explores the structural and electronic properties of low-temperature-grown (InAs)4(GaAs)3/Be-doped InAlAs and InGaAs/Be-doped InAlAs multiple quantum wells (MQWs), utilizing migration-enhanced epitaxy (MEE) and conventional molecular beam epitaxy (MBE) growth mode. Through comprehensive characterization methods including transmission electron microscopy (TEM), Raman spectroscopy, atomic force microscopy (AFM), pump–probe transient reflectivity, and Hall effect measurements, the study reveals significant distinctions between the two types of MQWs. The (InAs)4(GaAs)3/Be-doped InAlAs MQWs grown via the MEE mode exhibit enhanced periodicity and interface quality over the InGaAs/Be-InAlAs MQWs grown through the conventional molecule beam epitaxy (MBE) mode, as evidenced by TEM. The AFM results indicate lower surface roughness for the (InAs)4(GaAs)3/Be-doped InAlAs MQWs by using the MEE mode. Raman spectroscopy reveals weaker disorder-activated modes in the (InAs)4(GaAs)3/Be-doped InAlAs MQWs by using the MEE mode. This originates from utilizing the (InAs)4(GaAs)3 short period superlattices rather than InGaAs, which suppresses the arbitrary distribution of Ga and In atoms during the InGaAs growth. Furthermore, pump–probe transient reflectivity measurements show shorter carrier lifetimes in the (InAs)4(GaAs)3/Be-doped InAlAs MQWs, attributed to a higher density of antisite defects. It is noteworthy that room temperature Hall measurements imply that the mobility of (InAs)4(GaAs)3/Be-doped InAlAs MQWs grown at a low temperature of 250 °C via the MEE mode is superior to that of InGaAs/Be-doped InAlAs MQWs grown in the conventional MBE growth mode, reaching 2230 cm2/V.s. The reason for the higher mobility of (InAs)4(GaAs)3/Be-doped InAlAs MQWs is that this short-period superlattice structure can effectively suppress alloy scattering caused by the arbitrary distribution of In and Ga atoms during the growth process of the InGaAs ternary alloy. These results exhibit the promise of the MEE growth approach for growing high-performance MQWs for advanced optoelectronic applications, notably for high-speed optoelectronic devices like THz photoconductive antennas.

Epitaxial growth of high-quality GaAs on Si(001) using ultrathin buffer layers

The direct growth of III–V semiconductors on silicon holds tremendous potential for photonics applications. However, the inherent differences in their properties lead to defects in the epitaxial layer, including threading dislocations (TDs), antiphase boundaries (APBs), and thermal cracks, significantly impacting device performance. Current processes struggle to suppress these defects simultaneously, necessitating the development of methods to inhibit TDs and APBs in a thin buffer on silicon. This study introduces a GaSb buffer layer during GaAs epitaxy on a silicon (001) substrate. This approach successfully suppresses defect formation by promoting the formation of interfacial misfit dislocation arrays at both the AlSb/Si and GaAs/GaSb interfaces. The resulting GaAs layer exhibits a step-flow surface with a rough mean square of ∼3.8 nm and a full width at half maximum of 158 arcsec. Remarkably, the growth is achieved without any observable interfacial intermixing. Building on this platform, InAs/GaAs quantum dots are grown with a density of 3.8 × 1010 cm−2, emitting at a wavelength of 1288 nm. This breakthrough holds immense promise for developing high-quality GaAs films with reduced defect densities on silicon for O band lasers, laying the foundation for the mass production of silicon-based integrated circuits.

Optimized InGaAs growth on GaP/Si(1 0 0) templates with different low-temperature layers

In this paper, the effect of low-temperature buffer layer on the quality of InGaAs grown on GaP/Si templates is investigated. Three different materials, InP, GaAs/InAs and InAs/InP, were grown on GaP/Si templates by molecular beam epitaxy (MBE). The interfacial states between the above materials and the GaP layer were calculated using first principles methods. It was found that the interfacial structure formed with the InAs/InP material was the most robust due to the shorter bond lengths and stronger interaction forces between the interfaces. Theoretical calculations are in agreement with the experimental results that the InGaAs grown using the InAs/InP digital alloy structure as a low temperature buffer layer has the best material quality.

Theoretical investigation of the growth of GaAs on Si(001), Si(110), Si(111), Si(113) and Si(331)

The atomic structure of the first atomic layers of GaAs over Si(hhl) substrates were studied by ab initio calculations employing the density functional theory (DFT). Layered converged Si(hhl) supercells were used to investigate the interfacial interaction with the first Ga/GaAs and As/GaAs layers. Formation energies and volumetric charge densities differences confirms the stronger tendency of the As atoms, compared to Ga atoms, to form bonds with the different Si(hhl) surfaces. We confirm the reported experimental order sequence Si(111) > Si(001) > Si(110) in internal crystal structure quality of GaAs growth via the calculation of the interfacial energy, work of adhesion and total charge transfer. From this work, we expand the sequence in internal crystal structure quality as Si(111) > Si(331) ≥ Si(001) > Si(113) ≥ Si(110).

Nucleation and Growth of GaAs on a Carbon Release Layer by Halide Vapor Phase Epitaxy.

We couple halide vapor phase epitaxy (HVPE) growth of III-V materials with liftoff from an ultrathin carbon release layer to address two significant cost components in III-V device - epitaxial growth and substrate reusability. We investigate nucleation and growth of GaAs layers by HVPE on a thin amorphous carbon layer that can be mechanically exfoliated, leaving the substrate available for reuse. We study nucleation as a function of carbon layer thickness and growth rate and find island-like nucleation. We then study various GaAs growth conditions, including V/III ratio, growth temperature, and growth rate in an effort to minimize film roughness. High growth rates and thicker films lead to drastically smoother surfaces with reduced threading dislocation density. Finally, we grow an initial photovoltaic device on a carbon release layer that has an efficiency of 7.2%. The findings of this work show that HVPE growth is compatible with a carbon release layer and presents a path toward lowering the cost of photovoltaics with high throughput growth and substrate reuse.

Thermal strain relaxation of GaAs overgrown on nanovoid based Ge/Si substrate

The integration of high quality III-V materials-based devices on the Si platform is considered as an enabling path towards achieving the long-standing goal of creating low-cost/high-performance devices. However, the heteroepitaxy of III-V compounds on a Si substrate generates high stress due to the difference in thermal expansion coefficient leading notably to crack generation. Here, we report on the reduction of the thermal strain of GaAs and Ge deposited on a Si substrate. The method is based on the formation of buried high density nanovoids by electrochemical etching of Ge/Si virtual substrate followed by direct epitaxial growth of Ge and GaAs. The thermal strain has been investigated for GaAs epilayer by High-Resolution X-Ray Diffraction and Raman spectroscopy showing a 30% decrease in strain. The strain reduction relies on the nanovoids-mediated thermal strain accommodation. Furthermore, photoluminescence measurements showed a 10-fold increase of the intensity, resulting in an improved optical and crystalline quality, making this virtual substrate promising for III-V based devices on Silicon.

Selective Area Growth of GaAs Nanowires and Microplatelet Arrays on Silicon by Hydride Vapor-Phase Epitaxy

In this work, we demonstrate the growth of vertically oriented GaAs nanowires (NWs) and microplatelets directly on a patterned SiO2/Si(111) substrate by hydride vapor-phase epitaxy (HVPE). Direct condensation of GaAs on Si was achieved through a critical surface preparation under an As-controlled atmosphere. GaAs NWs were grown along the ⟨111⟩B direction with a hexagonal cross section when the hole opening diameter (D) in the SiO2 mask was below 350 nm. Larger apertures (D ≥ 500 nm) resulted in uniform microplatelets. This study highlights the capability of HVPE for selective area growth of GaAs directly on Si and thus the potential of HVPE as a generic heterointegration process for III–V semiconductors on silicon.

Ultra-High-Speed Growth of GaAs Solar Cells by Triple-Chamber Hydride Vapor Phase Epitaxy

In photovoltaic (PV) power generation, highly efficient III-V solar cells are promising for emerging mobile applications, such as vehicle-integrated PVs. Although hydride vapor phase epitaxy (HVPE) has received attention due to its lower fabrication costs, realization of high throughput performance while maintaining solar-cell characteristics using this growth method is essential. In this study, the effect of atmospheric-pressure triple-chamber HVPE growth conditions on GaAs solar-cell properties were carefully investigated in conjunction with defect analysis using deep-level transient spectroscopy (DLTS). Based on the analysis on GaAs reaction processes, the suppression of arsine thermal cracking in the HVPE hot-wall reactor was important to achieve fast GaAs growth using a low input V/III ratio. Moreover, the DLTS results revealed that the reduced input V/III ratio was effective in suppressing the generation of EL2 traps, which is a common GaAs midgap complex defect involving arsenic antisites. Although the EL2 trap density increased with the growth rate, the performance of GaAs solar cells that were grown under reduced arsine thermal cracking exhibited almost no considerable cell parameter deterioration at a growth rate of up to 297 μm/h. Consequently, a conversion efficiency of 24% with a high open-circuit voltage of 1.04 V was achieved for the cells that were grown at 200 μm/h.

Conversion efficiency improvement of ELO GaAs solar cell, deposited on water soluble sacrificial buffer

We demonstrate the improvement of power conversion efficiency of an epitaxially-lifted-off single junction GaAs solar cell deposited on a water-soluble sacrificial buffer architecture by introducing an additional germanium (Ge) interlayer between GaAs and the fluoride buffer. The epitaxial lift-off (ELO) technique has been extensively used to separate III-V device layers from their single crystal GaAs substrates. However, conventional ELO requires the use of concentrated hydrofluoric acid (HF) for extended times to etch out the sacrificial layer, subsequently degrading the surface roughness of the parent wafer. As a result, the wafer has to undergo expensive and intensive chemical mechanical polishing (CMP) processes, costing about 25 % of a pristine 6-inch GaAs substrate. In our previous work, we demonstrated a method to eliminating the need for CMP post-processing by using water-assisted ELO (H2O-ELO). A water-soluble, 3-layer buffer architecture was developed using alkaline earth compounds. However, devices suffered low performance due to a high defect density in the GaAs active layers. A Ge interlayer was introduced to provide a more favorable surface energy for GaAs growth, which leads to an improvement of GaAs crystal quality. The Ge deposition conditions were optimized to achieve a high-quality Ge layer on triple-layer fluoride buffer. Single junction GaAs devices fabricated on Ge/(Ca,Sr)F2/BaF2/(Ca,Sr)F2 showed improvement of solar cell performance parameters featuring increases in Voc by 23.7 %, and fill factor (F.F.) by 4.9 %, which results in an overall improvement of power conversion efficiency from 10.3 % to 12.69 %.

The Growth and Microstructure of GaAs Embedded with Al Nanocrystals

The Growth and Microstructure of GaAs Embedded with Al Nanocrystals

Role of Interdiffusion and Segregation during the Life of Indium Gallium Arsenide Quantum Dots, from Cradle to Grave.

This article summarizes our understanding of the interplay between diffusion and segregation during epitaxial growth of InGaAs and InAs quantum dots. These quantum dots form spontaneously on flat GaAs (001) single-crystalline substrates by the so-called Stranski-Krastanow growth mechanism once a sufficient amount of indium has accumulated on the surface. Initially a perfectly flat wetting layer is formed. This strained layer then starts to roughen as strain increases, leading first to small, long-range surface undulations and then to tiny coherent islands. These continue to grow, accumulating indium both from the underlying wetting layer by lateral indium segregation and from within these islands by vertical segregation, which for InGaAs deposition results in an indium-enriched InGaAs alloy in the centre of the quantum dots. For pure InAs deposition, interdiffusion also results in an InGaAs alloy. Further deposition can lead to the formation of misfit dislocations that nucleate at the edges of the islands and are generally sought to be avoided. Overgrowth by GaAs or InGaAs alloys with low indium content commences preferentially between the islands, avoiding their strained edges, which initially leads to trench formation. Further deposition is necessary to cap these quantum dots effectively and to re-gain an almost flat surface that can then be used for subsequent deposition of multiple layers of quantum dots as needed for many optoelectronic devices.

(Europe Section Heinz Gerischer Award) The Long Reach of Electrochemistry: Semiconductors, Metallization and Energy Storage

This talk will attempt to illustrate the long reach of electrochemistry by briefly reviewing our work in a number of different areas including oxygen electrochemistry of platinum metals, various aspects of compound semiconductors and their electrochemistry, electrodeposition of copper metallization and electrochemical kinetics of vanadium redox reactions. The discussion will briefly touch on early work on oxygen evolution on ruthenium and iridium and electrochromism in anodic iridium oxides.1-3 Compound semiconductors will be discussed in a number of aspects from epitaxial crystal growth to electrochemistry. Specific topics will include chemical vapor deposition technology4,5 and electrochemistry at the semiconductor-solution interface including film growth6, oscillatory reactions7 and pore formation on indium phosphide8,9 and photoelectrochemical etching of gallium nitride.10 Aspects of electrodeposited copper metallization will be discussed including in-situ stress measurements and in-situ atomic force microscopy during deposition11 and spontaneous morphology changes during room-temperature aging12. Electrochemical kinetics of vanadium redox reactions on carbon electrodes13 will be discussed as well as other aspects of vanadium flow batteries.14,15 References D. N. Buckley, L. D. Burke, “Lowering of Overvoltage for Oxygen Evolution at Noble Metal Electrodes in the Presence of Ruthenium Salts”, J. Electroanal. Chem. 52, 433 (1974).D. N. Buckley, L. D. Burke, “Oxygen Evolution and Corrosion at Iridium Anodes”, J. Chem. Soc. Faraday Trans. 1, 72, 2431 (1976).D. N. Buckley, L. D. Burke, “Enhancement of Charge Capacity of an Iridium Surface in the Anodic Region”, J. Chem. Soc. Faraday Trans. 1, 71, 1447 (1975).D. N. Buckley, J. R. C. Filipe, F. R. Lineman, K. W. Wang, K. M. Lee, A. A. Westphal, S. M. McEwan and M. A. DiGiuseppe, “Spatial Variations in the Epitaxial Growth of InP and InGaAs by Trichloride VPE and their Physical and Chemical Origins,” J. Electrochem. Soc., 139, 1185 (1992).D. N. Buckley C. W. Seabury, J. L. Valdes, G. Cadet, J. W. Mitchell, M. A. DiGiuseppe, R. C. Smith, J. R. C. Filipe, R. B. Bylsma, U. K. Chakrabarti and K. W. Wang, “Growth of InGaAs Structures using In Situ Electrochemically Generated Arsine”, Appl. Phys. Lett. 57, 1684 (1990).D. N. Buckley, E. Harveyand S. N. G. Chu, “Growth of Anodic Films on Compound Semiconductor Electrodes: InP in Aqueous (NH4)2S”, Monatshefte fur Chemie , 133, 785 (2002)E. Harvey, D. N. Buckley, and S. N. G. Chu, “Oscillatory Behavior during the Anodization of InP”, Electrochem. Solid State Lett, 5 , G22 (2002)C. O'Dwyer, D. Sutton, M. Serantoni, S. B. Newcomb and D. N. Buckley, "An Investigation by AFM and TEM of the Mechanism of Anodic Formation of Nanoporosity in n-InP in KOH", J. Electrochem. Soc. 154, H78-H85 (2007).Robert P. Lynch, Nathan Quill, Colm O’Dwyer, Shohei Nakahara and D. Noel Buckley, "Propagation of Nanopores during Anodic Etching of n-InP in KOH," Phys. Chem. Chem. Phys., 15, 15135-15145 (2013).C. Heffernan, R. P. Lynch and D. N. Buckley, “A Study of the Photoelectrochemical Etching of n-GaN in H3PO4 and KOH Electrolytes”, ECS Journal of Solid State Science and Technology, 9, 015003 (2020).S. Ahmed, T. T. Ahmed, M. O’Grady, S. Nakahara and D. N. Buckley, "Investigation of Stress and Morphology in Electrodeposited Copper Nanofilms by Cantilever Beam Method and In-Situ Electrochemical Atomic Force Microscopy," J. Appl. Phys. 103, 073506 (2008).S. Ahmed, D. N. Buckley, S. Nakahara, T. T. Ahmed, and Y. Kuo, "An Isothermal Annealing Study of Spontaneous Morphology Change in Electrodeposited Copper Metallization," J. Electrochem. Soc., 154, D103 (2007).A. Bourke, M. A. Miller, R. P. Lynch, X. Gao, J. Landon, J. S. Wainright, R. F. Savinell, and D. N. Buckley, “Electrode Kinetics of Vanadium Flow Batteries: Contrasting Responses of VII-VIII and VIV-VV to Electrochemical Pretreatment”, J. Electrochem. Soc., 163(1), A5097-A5105 (2016); doi:10.1149/2.0131601jesC. Petchsingh, N. Quill, J. T. Joyce, D. Ní Eidhin, D. Oboroceanu, C. Lenihan, X. Gao, R. P. Lynch, and D. N. Buckley, “Spectroscopic Measurement of State of Charge in Vanadium Flow Batteries with an Analytical Model of VIV-VV Absorbance” J. Electrochem. Soc. 163, A5068-A5083 (2016) doi:10.1149/2.0091601jes.D. N. Buckley, D. Oboroceanu, N Quill, C. Lenihan1 and R. P. Lynch, “Modelling and Accelerated Testing of Catholyte Stability in Vanadium Flow Batteries,” J. Electrochem. Soc., 168, 030530 (2021). Figure 1

From Salt to Electronics: Heteroepitaxy and GaAs Solar Cells

AbstractThis paper presents work on the heteroepitaxy of salts, specifically fluorides, on semiconductors and heteroepitaxy of semiconductors on salts. Fluorides layers are deposited on commercial Gallium Arsenide (GaAs) wafers followed by the heteroepitaxial growth of GaAs using metal‐organic chemical vapor deposition (MOCVD). The fluoride layers consist of 2 lattice‐engineered layers of alkaline‐earth compounds to match with GaAs, and are used to sandwich another alkaline‐earth compound with higher water‐solubility as a sacrificial layer. The triple fluoride layers enable liftoff of free‐standing semiconductor films which can be further transferred to desirable substrates. 2D‐X‐ray Diffraction (2D‐XRD) measurements confirm epitaxial growth of both the fluorides and the subsequently grown GaAs films. Single junction (SJ) solar cell devices based on thus prepared films show a power conversion efficiency (PCE) of 10.3% under 1 sun illumination. After the completion of device fabrications, the GaAs film is lifted off from the substrate by a novel water‐assisted epitaxial liftoff (H2O‐ELO) technique and transferred to a cheaper substrate. The original GaAs wafer is recycled and reused twice. Devices based on reused substrates show no significant degradation in performance. The semiconductor‐salt‐semiconductor scheme has great implications in high‐performance, flexible, and large‐area electronics.

Enhanced growth and properties of non-catalytic GaAs nanowires via Sb surfactant effects

We report the effects of antimony (Sb) surfactant on the growth and correlated structural and optical properties of non-catalytic GaAs nanowires (NW) grown by selective area epitaxy on silicon. Strong enhancements in the axial growth with very high aspect ratio up to 50 are observed by the addition of small traces of Sb (1%–2%), contrasting the commonly reported growth limiting behavior of Sb in GaAs(Sb) NWs. The Sb surfactant effect modifies the growth facet structure from a pyramidal-shaped growth front terminated by {1–1–0} planes to a flat (111)B growth plane, that is even further improved by the presence of Si co-dopants. Additional benefits are seen by the substantial change in microstructure, from a heavily defected layer stacking in Sb-free GaAs NWs to a twinned phase-pure zinc blende structure in Sb-mediated GaAs(Sb) NWs. We directly confirm the impact of the altered microstructure on the optical emission and carrier recombination dynamics via observation of long, few-ns carrier lifetimes in the GaAs(Sb) NWs using steady-state and time-resolved photoluminescence spectroscopy.

Impact of low-temperature cover layer growth of InAs/GaAs quantum dots on their optical properties

The effect of low-temperature InGaAs/GaAs cover layer growth of InAs quantum dots on their optical and structural properties was investigated. Photoluminescence intensity depended heavily on the growth temperature and thickness of the low-temperature cover layer and decreased as the number of dislocations formed directly above InAs quantum dots increased. These dislocations are formed at the initial stage of high-temperature GaAs growth, originating from pits that remain on the surface after the growth of the low-temperature cover layer and subsequent annealing. To ensure a high-quality InAs quantum dot structure free from dislocations, it is important to obtain a highly flat surface with suppressed pits after low-temperature cover layer growth and subsequent annealing.