Graphene-channel Field-effect Transistors Research Articles

Low-Cost Source Measure Unit (SMU) to Characterize Sensors Built on Graphene-Channel Field-Effect Transistors.

This study introduces a flexible and low-cost solution for a source measure unit (SMU), which is presented as an alternative to conventional source meter units and a blueprint for sensor FET drivers. An SMU collects current-voltage (I-V) curves with an additional variable voltage or current and is commonly used to characterize semiconductors. We present the hardware design, interfacing, and test results of our SMU. Specifically, we present representative I-V curve measurements for graphene-channel FETs to demonstrate the SMU's capability to efficiently characterize these devices with minimal noise and sufficient accuracy. This cost-effective solution presents a promising avenue for researchers and developers seeking reliable tools for sensor development and characterization. We demonstrate, with the example of surface illumination, how the sensing behavior of graphene-channel FETs can be characterized without the need for expensive equipment. Additionally, the SMU was validated with known passive and active components, along with probe station integration for semiconductor die-scale connection. The SMU's focus on collecting I-V curves, coupled with its ability to identify device defects, such as parasitic Schottky junctions or a failed oxide, contributes to its utility in quality testing for semiconductor devices. Its low-cost nature makes it accessible for various research endeavors, enabling efficient data collection and analysis for graphene-based and other nanomaterial-based sensor applications.

Phase- and Angle-Sensitive Terahertz Hot-Electron Bolometric Plasmonic Detectors Based on Fets with Graphene Channel and Composite H-BN/Black-P/H-BN Gate Layer

In this paper, we propose and analyze the terahertz (THz) bolometric vector detectors based on the graphene-channel field-effect transistors (GC-FET) with the black-P gate barrier layer or with the composite b-BN/black-P/b-BN gate layer. The phase difference between the signal received by the FET source and drain substantially affects the plasmonic resonances. This results in a resonant variation of the detector response on the incoming THz signal phase shift and the THz radiation angle of incidence.

Terahertz bolometric detectors based on graphene field-effect transistors with the composite h-BN/black-P/h-BN gate layers using plasmonic resonances

We propose and analyze the performance of terahertz (THz) room-temperature bolometric detectors based on the graphene channel field-effect transistors (GC-FET). These detectors comprise the gate barrier layer (BL) composed of the lateral hexagonal-boron nitride black-phosphorus/hexagonal-boron nitride (h-BN/b-P/h-BN) structure. The main part of the GC is encapsulated in h-BN, whereas a short section of the GC is sandwiched between the b-P gate BL and the h-BN bottom layer. The b-P gate BL serves as the window for the electron thermionic current from the GC. The electron mobility in the GC section encapsulated in h-BN can be fairly large. This might enable a strong resonant plasmonic response of the GC-FET detectors despite relatively lower electron mobility in the GC section covered by the b-P window BL. The narrow b-P window diminishes the Peltier cooling and enhances the detector performance. The proposed device structure and its operation principle promote elevated-temperature GC-FET THz detector responsivity values and other characteristics, especially at the plasmonic resonances.

(Invited) Recent Advances in the Research of Graphene Plasmonic Terahertz Laser Transistors

Electrons and holes in graphene behave as relativistic charged massless Dirac fermions due to the graphene unique gapless electronic band structure with a linear dispersion law. Dirac plasmons - the quanta of the plasma oscillation of the Dirac electrons - can dramatically enhance the interaction of terahertz (THz) photons with graphene. We have proposed an original current-injection graphene THz laser transistor, demonstrated single-mode THz laser oscillation at low temperatures [1-3], and discovered and demonstrated the THz giant gain enhancement effect by the graphene Dirac plasmons [4-8]. However, further breakthroughs are needed to realize room-temperature high-intensity THz lasing and ultrafast modulation operation for the next generation wireless 6G and 7G communications. In this paper, we will present new ideas on the operating principle and device structures of the THz graphene plasmonic laser transistors with a high radiation intensity and ultrafast modulation capability operating at room temperature.To dramatically improve the quantum efficiency and gain, we utilize the Coulomb drag effect in lateral n+ - i – n - n+ graphene diode/transistor structures with the ballistic injection of the graphene Dirac fermions [9-11]. Such injection strongly modifies the current-voltage characteristics producing “plasmonic gain” in the THz frequency range applicable for THz oscillations and amplifications. This phenomenon is associated with the specifics of the ballistic electron scattering on quasi-equilibrium electrons in graphene. Depending on the device structural parameters (in particular, the gated region length and its electron Fermi energy), the graphene diode/transistor structures can exhibit either S-shaped or monotonic current-voltage characteristics [9]. In the former case, the resulting hysteresis and current filamentation effects can be used for the implementation of the voltage-switching devices. The feedback between the amplified dragged electrons current and the injected ballistic electrons current can lead to the negative THz dynamic conductivity. The self-excitation of the THz plasma oscillations in the gated region enables the realization of the graphene transistor-based sources of THz radiation [11].To realize ultrafast modulation of lasing intensity/phase, we introduce actively controlling the parity and time-reversal (PT) symmetry [12] of the graphene Dirac plasmons (GDPs) in the dual-grating-gate graphene-channel field effect transistor (DGG-GFET) nanostructures for the ultrafast modulation of the lasing intensity and phase. [13]. The PT symmetry is expressed by a pair of complementary gain and loss elements. This gain–loss balance leads to the exceptional points at the real frequency axis in the exact PT-phase resulting in the extraordinary frequency response of “unidirectionality” [14]. The DGG-GDP metasurface, which consists of a unit cell comprising a pair of gain and loss regions and its periodical arrangement, promotes the GDP instability. The PT symmetry can be controlled (to be held or broken) by altering the gate or drain bias voltages. Our numerical simulations showed that the laser cavity Q values can be dynamically controllable in a DGG-GDP transistor structure [6] demonstrating 100-Gbit/s-class ultrafast modulation capabilities [13].The authors thank A.A. Dubinov, D. Yadav, T. Watanabe, T. Suemitsu, W. Knap, V. Kachorovskii, and V.V. Popov for their contributions. This work was supported by JSPS-KAKENHI No. 21H04546, and No. 20K20349, Japan. V. Ryzhii, M. Ryzhii, and T. Otsuji, J. Appl. Phys. 101, 083114 (2007).T. Otsuji et al., IEEE J. Sel. Top. Quantum Electron. 19, 8400209 (2013).D. Yadav et al., Nanophoton. 7, 741-752 (2018).A.A. Duvinov el al., J. Phys.: Cond. Matters 23, 145302 (2011).T. Watanabe et al., New J. Phys. 15, 075003 (2013).Y. Koseki et al., Phys. Rev. B 93, 245408 (2016).S. Boubanga-Tombet et al., Phys. Rev. X 10, 031004 (2020).S. Boubanga-Tombet et al., Front. Phys. 9, 726806 (2021).V. Ryzhii et al., Phys. Rev. Appl. 16, 014001 (2021).V. Ryzhii et al., Appl. Phys. Lett. 119, 093501 (2021).V. Ryzhii et al., Physica Status Solidi A 218, 2100535 (2021).M.-A. Miri and A. Alu, Science 363, eaar7709 (2019).T. Otsuji et al., Nanophoton. under review.H. Ramezani and T. Kottos, Phys. Rev. A 82, 04383 (2010). Figure 1

Implementation of 20 nm Graphene Channel Field Effect Transistors Using Silvaco TCAD Tool to Improve Short Channel Effects over Conventional MOSFETs

In recent years, demands for high speed and low power circuits have been raised. As conventional metal oxide semiconductor field effect transistors (MOSFETs) are unable to satisfy the demands due to short channel effects, the purpose of the study is to design an alternative of MOSFETs. Graphene FETs are one of the alternatives of MOSFETs due to the excellent properties of graphene material. In this work, a user-defined graphene material is defined, and a graphene channel FET is implemented using the Silvaco technology computer-aided design (TCAD) tool at 100 nm and scaled to 20 nm channel length. A silicon channel MOSFET is also implemented to compare the performance. The results show the improvement in subthreshold slope (SS) = 114 mV/dec, ION/IOFF ratio = 14379, and drain induced barrier lowering (DIBL) = 123 mV/V. It is concluded that graphene FETs are suitable candidates for low power applications.

Paving the Way for Tunable Graphene Plasmonic THz Amplifiers

This study reviews recent advances in room-temperature coherent amplification of terahertz (THz) radiation in graphene, electrically driven by a dry cell battery. Our study explores THz light–plasmon coupling, light absorption, and amplification using a current-driven graphene-based system because of its excellent room temperature electrical and optical properties. An efficient method to exploit graphene Dirac plasmons (GDPs) for light generation and amplification is introduced. This approach is based on current-driven excitation of the GDPs in a dual-grating-gate high-mobility graphene channel field-effect transistor (DGG-GFET) structure. The temporal response of the DGG-GFETs to the polarization-managed incident THz pulsation is experimentally observed by using THz time-domain spectroscopy. Their Fourier spectra of the transmitted temporal waveform through the GDPs reveals the device functions 1) resonant absorption at low drain bias voltages below the first threshold level, 2) perfect transparency between the first and the second threshold drain bias levels, and 3) resonant amplification beyond the second threshold drain bias voltage. The maximal gain of 9% is obtained by a monolayer graphene at room temperatures, which is four times higher than the quantum limit that is given when THz photons directly interact with electrons. The results pave the way toward tunable graphene plasmonic THz amplifiers.

Transient performance analysis of graphene FET gated via ionic solid by numerical simulations based on tight-binding method and Nernst–Planck–Poisson equations

We investigate the electrical transport characteristics of graphene channel field-effect transistors (FETs) gated via ionic solid (IS), where the conventional gate insulator, such as SiO2, has been replaced by solid electrolytes, such as LiP3O4. In this study, we focus on (i) the gate controllability of the current in comparison to conventional graphene FETs with SiO2 as an insulating material and (ii) the transient characteristics of the drain current and time required to switch on the current. We employ the tight-binding formalism and Boltzmann equation to calculate the electronic band structure and the electronic transport in graphene, while the Nernst–Planck–Poisson equations have been employed to calculate the time-dependent charge distribution in solid electrolytes and the resulting electric double layer formation at the graphene/IS and IS/gate interfaces. Our simulations have shown that graphene FET gated via IS shows superior gate controllability more than SiO2-gated graphene FET with the insulator thickness of 1 nm, and the saturated drain current is insensitive to the IS thickness. Moreover, the time required to switch on the drain current is proportional to the thickness of IS, and the limited number of Li+ ion vacancies in IS is preferable in obtaining faster switching than the case of unlimited vacancy cases while keeping the superior gate controllability.

Theoretical Considerations on the Optimal Performance of Sub-100 Nanometer Top-Gated Graphene Field-Effect Transistors

The operation and performance of top-gated sub-100 nanometer graphene channel field-effect transistors were investigated. The device model is designed for graphene with a narrow energy band gap epitaxially grown on the SiC substrate. The issue of graphene-metallic lead coupling is appropriately taken into account. By assuming the graphene-metal physisorption contact, a self-consistent calculation reproduces two regions of high carrier density at the ends of the graphene channels underneath the metallic leads according to the charge transferred effect between the metallic lead surface and graphene. The charge carrier densities in these source and drain regions, however, are not pinned, but vary with respect to the drain and gate voltages. It is shown that, in general, the graphene channel supports the ambipolar characteristics for all device samples, but for the samples with the channels shorter than 40 nm, the current-voltage characteristic takes the exponential law. Particularly, the current saturation with a rather small output conductance of 126 S/m was observed in a sufficiently large range of drain voltage due to the dominance of the thermionic emission and conventional tunneling mechanisms to the band-to-band tunneling. A rough assessment of the device performance was also carried out. It reveals an extremely high cutoff frequency in the order of $$10^3\hbox { GHz}$$ and a linear scaling rule for transistors with the channel length longer than 40 nm. The behaviour and magnitude of these quantities are consistent with an experimental study of sub-100 nm devices fabricated using the self-alignment technique.

Terahertz light-emitting graphene-channel transistor toward single-mode lasing

AbstractA distributed feedback dual-gate graphene-channel field-effect transistor (DFB-DG-GFET) was fabricated as a current-injection terahertz (THz) light-emitting laser transistor. We observed a broadband emission in a 1–7.6-THz range with a maximum radiation power of ~10 μW as well as a single-mode emission at 5.2 THz with a radiation power of ~0.1 μW both at 100 K when the carrier injection stays between the lower cutoff and upper cutoff threshold levels. The device also exhibited peculiar nonlinear threshold-like behavior with respect to the current-injection level. The LED-like broadband emission is interpreted as an amplified spontaneous THz emission being transcended to a single-mode lasing. Design constraints on waveguide structures for better THz photon field confinement with higher gain overlapping as well as DFB cavity structures with higher Q factors are also addressed towards intense, single-mode continuous wave THz lasing at room temperature.

Fully-transparent graphene charge-trap memory device with large memory window and long-term retention

A fully-transparent graphene-based charge-trap memory device was realized by fabricating a graphene-channel field-effect transistor with high-k/low-k/high-k oxide stacks of Al2O3/AlOx/Al2O3 and indium-tin-oxide gate/source/drain electrodes on the polyethylene naphthalate substrate (i.e., ITO-gated AXA-gFET). The usage of low-k AlOx as a charge-trap layer allowed us to demonstrate a high-performance memory device, exhibiting a large memory window of ∼9.2 V and a tenacious retention of the memory window margin up to ∼57% after 10 years. Memory cells comprising the ITO-gated AXA-gFET arrays displayed a high transparency with the average optical transmittance of ∼83% in visible wavelength regions. These properties may move us a step closer to the practical application of graphene-based memories for future transparent electronics. In-depth analyses on the electrical characteristics and the mechanisms of the memory functions are presented.

Unipolar behavior in graphene-channel field-effect-transistors with n-type doped SiC source/drain regions

To realize graphene-channel field-effect-transistors (GFETs) with unipolar behavior and high on/off current ratios, we fabricated and characterized top-gate GFETs with n-type doped SiC (n-SiC) source/drain (S/D) regions on 4H-SiC(0001) substrates. 0–2 mono-layers (MLs) of graphene were grown on a monoatomic interfacial layer called zero-layer (ZL) by vacuum annealing. The 0–2 graphene MLs on the ZL were converted into 1–3 MLs of graphene without a ZL by annealing in H2. The GFETs with n-SiC S/D regions and 1–3 MLs of graphene without a ZL showed unipolar behavior with a high on/off current ratio of 2.7 × 103.

Changes in major charge transport by molecular spatial orientation in graphene channel field effect transistors

Changes in major charge transport of graphene channel transistors in terms of the spatial orientation of adsorbed functional molecules were demonstrated. In contrast to the horizontally (physically) bound molecules, the vertically (chemically) bound molecules did not change major charge carriers of graphene channels, revealing the molecular orientation-dependent doping effects.

Synthesis of diamond-like carbon films on Si substrates by photoemission-assisted plasma-enhanced chemical vapor deposition

Diamond-like carbon (DLC) films grown by photoemission-assisted plasma-enhanced chemical vapor deposition (PA-PECVD) have attracted attention as a gate insulator for graphene-channel field effect transistors (GFETs). In this study, the possibility of using PA-PECVD to grow insulating DLC films for GFETs is explored by focusing on the growth rate and uniformity of DLC films on Si substrates. Initially, the DLC films were formed at a constant rate but the growth rate decreased rapidly when the thickness reached approximately 400nm. This is because of a decrease in photoelectron emissions from the Si substrates as they are covered by DLC films which absorb UV photons. However, the DLC films formed uniformly at thicknesses less than 16%. This result indicates that PA-PECVD is a promising method for growing DLC films as the gate dielectric layer of GFETs.

Logic Inverter Implemented with CVD-Assembled Graphene FET on Hexagonal Boron Nitride

We demonstrate one of the basic building elements of graphene electronics, logic inverter, based on graphene-on-boron nitride material system. The inverter is composed of two adjacent graphene-channel field-effect transistors (GFETs). The impacts of hexagonal boron nitride, a new supporting substrate material, on major device performance metrics of GFET such as small-signal transconductance g m and effective carrier mobility μeff are explored. The prototype of logic inverter is demonstrated on a single sheet of CVD-assembled monolayer graphene based on the unique ambipolar conduction behavior of the 2-D nanoscale carbon system.

Exploring carrier transport phenomena in a CVD-assembled graphene FET on hexagonal boron nitride

The supporting substrate plays a crucial role in preserving the superb electrical characteristics of an atomically thin 2D carbon system. We explore carrier transport behavior in a chemical-vapor-deposition- (CVD-) assembled graphene monolayer on hexagonal boron nitride (h-BN) substrate. Graphene-channel field-effect transistors (GFETs) were fabricated on ultra-thin h-BN multilayers to screen out carrier scattering from the underlying SiO2 substrate. To explore the transport phenomena, we use three different approaches to extract carrier mobility, namely, effective carrier mobility (μeff), intrinsic carrier mobility (μ), and field-effect mobility (μFE). A comparative study has been conducted based on the electrical characterization results, uncovering the impacts of supporting substrate material and device geometry scaling on carrier mobility in GFETs with CVD-assembled graphene as the active channel.

CVD-Graphene Complementary Logic on Ultra-thin Multilayer Hexagonal Boron Nitride

ABSTRACTGraphene, a two-dimensional carbon allotrope, has raised great interests as a material candidate for future electronics due to its superb carrier transport and unique physics. The demand for future-generation large-scale carbon-based electronics motivates assembly of large-area graphene and selection of ideal substrate material that best preserves the transport property of graphene. In this work, CVD-assembled large-area graphene on thin multilayer hexagonal boron nitride (h-BN) is employed to demonstrate the basic building block of digital circuit - inverter prototype made of two graphene-channel field-effect transistors (GFETs). The doping in the CVD-grown graphene, probed via electrical measurements, is implemented through non-uniform local surface chemistry. The full transfer response of the graphene logic inverter is demonstrated in the localized P/N doping region.

Dielectric-tuned Diamondlike Carbon Materials for High-performance Self-aligned Graphene-channel Field Effect Transistors

ABSTRACTThe ‘DLC-GFET’, a graphene field effect transistor with a diamondlike carbon (DLC) top-gate dielectric film, is presented. The DLC film was formed ‘directly’ onto the graphene channel without forming passivation interlayers using our original photoemission-assisted plasma-enhanced chemical vapor deposition (PA-CVD), where the plasma was precisely controlled by photoemission from the sample with quite low electric power to minimize plasma damage to the channel. The DLC-GFET exhibits clear ambipolar characteristics with a slightly positive shift of the neutral points (Dirac voltages). Relatively high transconductances were obtained as 14.6 (8.8) mS/mm in the n (p) channel modes, respectively, with a thick gate dielectric of 48 nm and a long gate length of 5 μm, promising vertical scaling-down to improve the high-frequency performance. The positive shift of the Dirac voltage is due to unintentional hole doping from oxygen species in the DLC film into the graphene channel, promising a minute modulation doped structure with oxygen to overcome high resistance in the access region. Hence, a DLC film deposited by PA-CVD is a candidate for the gate dielectric on graphene.

Extraction of Drain Current and Effective Mobility in Epitaxial Graphene Channel Field-Effect Transistors on SiC Layer Grown on Silicon Substrates

We have fabricated and characterized field-effect transistors (FETs) with an epitaxial graphene channel on a SiC layer grown on a Si substrate. Epitaxial graphene can be formed on SiC substrates by thermal decomposition of its surface under an ultrahigh-vacuum (UHV) condition. To incorporate the thermal decomposition of SiC on Si substrates, we used an approach of growing a thin 3C-SiC(111) layer on Si substrates and subsequently annealing them in UHV to form graphene on the surface of the 3C-SiC layer. Backgate-field-effect transistors using the SiC layer as a gate insulator were characterized. Although a large amount of gate-leakage current is observed, the drain current modulation by backgate voltage is confirmed by extracting the channel current from the total drain current. The extracted channel current characteristics also suggest that the extracted effective mobility exceeds the universal mobility of bulk silicon under similar circumstances.

Theoretical Evaluation of Channel Structure in Graphene Field-Effect Transistors

Energy band structures for monolayer and bilayer armchair graphene nanoribbons on SiC substrates are investigated using a nearest-neighbor tight-binding approximation with two distinct models (interlayer coupling and substrate-induced asymmetry models). Differences in the band structures and charge distributions based on the two models are clarified. The calculation results suggest that wide films of bilayer armchair graphene on SiC substrates should be used for electronics applications such as graphene-channel field-effect transistors.

Performance Prediction of Graphene-Channel Field-Effect Transistors

We compare the threshold voltage and subthreshold-slope characteristics as measures of short-channel effects (SCEs) for graphene-channel field-effect transistors (GFETs) with wide bilayer armchair-graphene film with those for ultrathin-body silicon-on-insulator (UTB-SOI) MOSFETs using a drift-diffusion-based device simulator. The intrinsic delay times for GFETs are also compared with those for UTB-SOI MOSFETs.