Global Back Gate Research Articles

Observation of inter-layer charge transmission resonance at optically excited graphene–TMDC interfaces

The transfer of charge carriers across the optically excited hetero-interface of graphene and semiconducting transition metal dichalcogenides (TMDCs) is the key to convert light to electricity, although the intermediate steps from the creation of excitons in TMDC to the collection of free carriers in the graphene layer are not fully understood. Here, we investigate photo-induced charge transport across graphene–MoS2 and graphene–WSe2 hetero-interfaces using time-dependent photoresistance relaxation with varying temperature, wavelength, and gate voltage. In both types of heterostructures, we observe an unprecedented resonance in the inter-layer charge transfer rate as the Fermi energy (EF) of the graphene layer is tuned externally with a global back gate. We attribute this to a resonant quantum tunneling from the excitonic state of the TMDC to EF of the graphene layer and outline a new method to estimate the excitonic binding energies (Eb) in the TMDCs, which are found to be 400 meV and 460 meV in MoS2 and WSe2 layers, respectively. The gate tunability of the inter-layer charge transfer timescales may allow precise engineering and readout of the optically excited electronic states at graphene–TMDC interfaces.

Single-electron pumping in a ZnO single-nanobelt quantum dot transistor

Diluted magnetic semiconductors (DMSs) have traditionally been employed to implement spin-based quantum computing and quantum information processing. However, their low Curie temperature is a major hurdle in their use in this field, which creates the necessity for wide bandgap DMSs operating at room temperature. In view of this, a single-electron transistor (SET) with a global back-gate was built using a wide bandgap ZnO nanobelt (NB). Clear Coulomb oscillations were observed at 4.2 K. The periodicity of the Coulomb diamonds indicates that the Coulomb oscillations arise from single quantum dots of uniform size, whereas quasi-periodic Coulomb diamonds correspond to the contribution of multi-dots present in the ZnO NB. By applying an AC signal to the global back-gate across a Coulomb peak with varying frequencies, single-electron pumping was observed; the increase in current was equal to the production of electron charge and frequency. The current accuracy of about 1% for both single- and double-electron pumping was achieved at a high frequency of 25 MHz. This accurate single-electron pumping makes the ZnO NB SET suitable for single-spin injection and detection, which has great potential for applications in quantum information technology.

Black Phosphorus High-Frequency Transistors with Local Contact Bias.

Having a sizable band gap and high carrier mobility, black phosphorus (BP) is a promising two-dimensional material for high-frequency electronic and optoelectronic devices. Further, for metal-oxide-semiconductor field-effect transistors (MOSFETs) operating at high frequencies, they must have a top gate of submicron length instead of the commonly used global back gate. However, without the global back gate to electrostatically induce doping in BP, top-gated submicron BP MOSFETs have not reached their full potential mainly due to large contact resistances. Here, we report top-gated submicron BP MOSFETs with local contact bias electrodes to induce doping in the contact region. This resulted in reduced contact resistance and, in turn, orders of magnitude improvement in current capacity (>500 μA/μm) and peak transconductance (>40 μS/μm), if compared with top-gated BP transistors without any back-gating scheme. In turn, these improvements resulted in a forward current gain cutoff frequency of 37 GHz and a maximum frequency of oscillation of 22 GHz at room temperature, the highest reported for BP MOSFETs up to date.

Regaining a Spatial Dimension: Mechanically Transferrable Two-Dimensional InAs Nanofins Grown by Selective Area Epitaxy.

We report a method for growing rectangular InAs nanofins with deterministic length, width, and height by dielectric-templated selective-area epitaxy. These freestanding nanofins can be transferred to lay flat on a separate substrate for device fabrication. A key goal was to regain a spatial dimension for device design compared to nanowires, while retaining the benefits of bottom-up epitaxial growth. The transferred nanofins were made into devices featuring multiple contacts for Hall effect and four-terminal resistance studies, as well as a global back-gate and nanoscale local top-gates for density control. Hall studies give a 3D electron density 2.5-5 × 1017 cm-3, corresponding to an approximate surface accumulation layer density 3-6 × 1012 cm-2 that agrees well with previous studies of InAs nanowires. We obtain Hall mobilities as high as 1200 cm2/(V s), field-effect mobilities as high as 4400 cm2/(V s), and clear quantum interference structure at temperatures as high as 20 K. Our devices show excellent prospects for fabrication into more complicated devices featuring multiple ohmic contacts, local gates, and possibly other functional elements, for example, patterned superconductor contacts, that may make them attractive options for future quantum information applications.

Crossover from Coulomb blockade to ballistic transport in InAs nanowire devices

We report on the observation of a crossover from the single electron Coulomb blockade regime to the ballistic transport in individual InAs semiconducting nanowire devices. The InAs nanowires studied here were grown by molecular-beam epitaxy (MBE), which provides a clean system to study the intrinsic electrons transport in a quasi-one-dimensional system. Quantized conductance plateaus are observed for an InAs nanowire-based device by changing the Fermi level with a global back gate at low temperature, suggesting the ballistic transport of electrons. Further lowering the temperature, we observe the Coulomb blockade phenomenon with the formation of the quantum dot between the two normal metal contacts. By increasing the electron density, the characteristic Fabry–Pérot oscillations are observed, which further provides evidence for the ballistic nature of transport in the InAs nanowire device. Our observations indicate that high-quality InAs nanowires grown by MBE behave as clean quantum wires at low temperatures, which enables us to investigate novel phenomena in the quasi-one-dimensional system.

Single layer MoS2 nanoribbon field effect transistor

We study field effect transistor characteristics in etched single layer MoS2 nanoribbon devices of width 50 nm with ohmic contacts. We employ a SF6 dry plasma process to etch MoS2 nanoribbons using low etching (RF) power allowing very good control over the etching rate. Transconductance measurements reveal a steep sub-threshold slope of 3.5 V/dec using a global backgate. Moreover, we measure a high current density of 38 μA/μm, resulting in a high on/off ratio of the order of 105. We observe mobility reaching as high as 50 cm2/V s with increasing source-drain bias.

Gate-Tuned Temperature in a Hexagonal Boron Nitride-Encapsulated 2-D Semiconductor Device

Thermal management in 2-D electronics is critical for optimizing their performances due to the growing heat generations at the nanoscale. Here, we use Raman thermometry to study the Joule heating of a MoS <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> field-effect transistor encapsulated by hexagonal boron nitride and with graphene electrodes. We show a sensitive temperature increase relevant to the heating power, which is tunable by the global back gate as well as the drain voltage. Our results provide a simple approach to characterizing the heat dissipation of microscopic devices and to controlling their temperatures.

Photo-thermoelectric detection of cyclotron resonance in asymmetrically carrier-doped graphene two-terminal device

Graphene is known to show a significant photo-thermoelectric effect that can exceed its photovoltaic contribution. Here, by utilizing this effect, we demonstrate a photovoltage measurement of cyclotron resonance in a double-back-gated h-BN/graphene/h-BN two-terminal device. A graphite local bottom gate was fabricated in addition to a p-doped Si global back gate. By tuning the two gate voltages, an in-plane graphene junction having an asymmetric carrier-doping profile was created. With the help of this asymmetric structure, the photo-thermoelectric voltage generated in the vicinity of the metal-electrode/graphene junction was detected. At a low temperature and in the presence of a magnetic field, a photo-induced voltage was measured under the irradiation of an infrared laser (λ = 9.28–10.61 μm). We observed a strong enhancement of the photovoltage signal under the cyclotron resonance condition, at which the energy of excitation coincides with a transition between Landau levels. These results highlight the possibility of using the photo-thermoelectric effect in graphene for THz photo-detection.

Accumulation-Mode Two-Dimensional Field-Effect Transistor: Operation Mechanism and Thickness Scaling Rule.

Understanding the operation mode of a two-dimensional (2D) material-based field-effect transistor (FET) is one of the most essential issues in the study of electronics and physics. The existing Schottky barrier FET model for devices with global back gate and metallic contacts overemphasizes the metal/2D contact effect, and the widely observed residual conductance cannot be explained by this model. Here, an accumulation-mode (ACCU) FET model, which directly reveals 2D channel transport properties, is developed based on a partial top-gate MoS2 FET with metallic contacts and a channel thickness of 0.65-118 nm. The operation mechanism of an ACCU-FET is validated and clarified by carefully performed capacitance measurements. A depletion capacitance-quantum capacitance transition is observed. After the analysis of the MoS2 ACCU-FET, we have confirmed that most 2D FETs show an accumulation-mode behavior. The universal thickness scaling rule of 2D-FETs is then proposed, which provides guidance for future research on 2D materials.

Ferroelectric-Domain-Patterning-Controlled Schottky Junction State in Monolayer MoS_{2}.

We exploit scanning-probe-controlled domain patterning in a ferroelectric top layer to induce nonvolatile modulation of the conduction characteristic of monolayer MoS_{2} between a transistor and a junction state. In the presence of a domain wall, MoS_{2} exhibits rectified I-V characteristics that are well described by the thermionic emission model. The induced Schottky barrier height Φ_{B}^{eff} varies from 0.38 to 0.57eV and is tunable by a SiO_{2} global back gate, while the tuning range of Φ_{B}^{eff} depends sensitively on the conduction-band-tail trapping states. Our work points to a new route to achieving programmable functionalities in van der Waals materials and sheds light on the critical performance limiting factors in these hybrid systems.

Distinguishing Lead and Molecule States in Graphene-Based Single-Electron Transistors.

Graphene provides a two-dimensional platform for contacting individual molecules, which enables transport spectroscopy of molecular orbital, spin, and vibrational states. Here we report single-electron tunneling through a molecule that has been anchored to two graphene leads. Quantum interference within the graphene leads gives rise to an energy-dependent transmission and fluctuations in the sequential tunnel-rates. The lead states are electrostatically tuned by a global back-gate, resulting in a distinct pattern of varying intensity in the measured conductance maps. This pattern could potentially obscure transport features that are intrinsic to the molecule under investigation. Using ensemble averaged magneto-conductance measurements, lead and molecule states are disentangled, enabling spectroscopic investigation of the single molecule.

From bidirectional rectifier to polarity-controllable transistor in black phosphorus by dual gate modulation

In complementary metal oxide semiconductor (CMOS) technology, well-defined unipolar transport in field-effect transistors (FETs) is a basic requirement for logic operations, which can be realized by controllable doping of the semiconductor with electrons (n-type) or holes (p-type). However, recent demonstration of polarity controllable transistors in 2D semiconductors provides a flexible way in circuit design with increased circuit integration density. Here we demonstrate the conversion of a bidirectional rectifier to a polarity-controllable transistor in black phosphorus (BP) by dual gate modulation. Electrical characterization of the BP bidirectional rectifier reveals a current rectification of ~35 at room temperature that increases to ~350 upon lowering the temperature to 110 K. Employing cross-linked PMMA as a top gate and combining it together with the global back gate of the SiO2 substrate, well-defined unipolar transport (n- or p-type) in BP could get accessed. This successful realization of polarity-controllable transistor in BP provides an alternative design for development of BP logic electronics.

Electrical characterization of chemical and dielectric passivation of InAs nanowires

The native oxide at the surface of III−V nanowires, such as InAs, can be a major source of charge noise and scattering in nanowire-based electronics, particularly for quantum devices operated at low temperatures. Surface passivation provides a means to remove the native oxide and prevent its regrowth. Here, we study the effects of surface passivation and conformal dielectric deposition by measuring electrical conductance through nanowire field effect transistors treated with a variety of surface preparations. By extracting field effect mobility, subthreshold swing, threshold shift with temperature, and the gate hysteresis for each device, we infer the relative effects of the different treatments on the factors influencing transport. It is found that a combination of chemical passivation followed by deposition of an aluminum oxide dielectric shell yields the best results compared to the other treatments, and comparable to untreated nanowires. Finally, it is shown that an entrenched, top-gated device using an optimally treated nanowire can successfully form a stable double quantum dot at low temperatures. The device has excellent electrostatic tunability owing to the conformal dielectric layer and the combination of local top gates and a global back gate.

Ultraclean Single, Double, and Triple Carbon Nanotube Quantum Dots with Recessed Re Bottom Gates

We demonstrate that ultraclean single, double, and triple quantum dots (QDs) can be formed reliably in a carbon nanotube (CNT) by a straightforward fabrication technique. The QDs are electrostatically defined in the CNT by closely spaced metallic bottom gates deposited in trenches in SiO2 by sputter deposition of Re. The carbon nanotubes are then grown by chemical vapor deposition (CVD) across the trenches and contacted using conventional resist-based electron beam lithography. Unlike in previous work, the devices exhibit reproducibly the characteristics of ultraclean QDs behavior even after the subsequent electron beam lithography and chemical processing steps. We specifically demonstrate the high quality using CNT devices with two narrow bottom gates and one global back gate. Tunable by the gate voltages, the device can be operated in four different regimes: (i) fully p-type with ballistic transport between the outermost contacts (over a length of 700 nm), (ii) clean n-type single QD behavior where a QD can be induced by either the left or the right bottom gate, (iii) n-type double QD, and (iv) triple bipolar QD where the middle QD has opposite doping (p-type). Our simple fabrication scheme opens up a route to more complex devices based on ultraclean CNTs, since it allows for postgrowth processing.

Mixing of edge states at a bipolar graphene junction

An Atomic Force Microscope is used to locally manipulate a single layer graphene sheet. Transport measurements in this region as well as in the unmanipulated part reveal different charge carrier densities while mobilities stay in the order of 10000 cm^2/(Vs). With a global backgate, the system is tuned from a unipolar n-n' or p-p' junction with different densities to a bipolar p-n junction. Magnetotransport across this junction verifies its nature, showing the expected quantized resistance values as well as the switching with the polarity of the magnetic field. The mixing of edge states at the p-n junction is shown to be supressed at high magnetic fields.

Stability and Low-Frequency Noise in InAs NW Parallel-Array Thin-Film Transistors

In this letter, we present the dc characteristics, stability, and low-frequency noise (LFN) measurements, for n-type indium arsenide nanowire (NW) parallel-array thin-film transistors (TFTs) with a global back gate. These devices perform with mobilities ranging from 200-1200 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> V <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> s <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-1</sup> and produce a threshold voltage shift less than 0.25 V after 10 000 <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</i> of stress. The resulting LFN measurements indicate that the 1/ <i xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</i> noise can be modeled by the number fluctuation model, at low drain currents, which can provide an essential guideline for the device design considerations of NW TFTs.

Ballistic transport of graphene pnp junctions with embedded local gates

We fabricated graphene pnp devices, by embedding pre-defined local gates in an oxidizedsurface layer of a silicon substrate. With neither deposition of dielectric material onthe graphene nor electron-beam irradiation, we obtained high-quality graphenepnp devices without degradation of the carrier mobility even in the local-gateregion. The corresponding increased mean free path leads to the observation ofballistic and phase-coherent transport across a local gate 130 nm wide, whichis about an order of magnitude wider than reported previously. Furthermore,in our scheme, we demonstrated independent control of the carrier density inthe local-gate region, with a conductance map very much distinct from those oftop-gated devices. This was caused by the electric field arising from the global backgate being strongly screened by the embedded local gate. Our scheme allows therealization of ideal multipolar graphene junctions with ballistic carrier transport.

Gate-controlled ionization and screening of cobalt adatoms on a graphene surface

We describe scanning tunneling spectroscopy (STS) measurements performed on individual cobalt (Co) atoms deposited onto backgated graphene devices. We find that Co adatoms on graphene can be ionized by either the application of a global backgate voltage or by the application of a local electric field from a scanning tunneling microscope (STM) tip. Large screening clouds are observed to form around Co adatoms ionized in this way, and we observe that some intrinsic graphene defects display a similar behavior. Our results provide new insight into charged impurity scattering in graphene, as well as the possibility of using graphene devices as chemical sensors.

Ambipolar graphene field effect transistors by local metal side gates

We demonstrate ambipolar graphene field effect transistors individually controlled by local metal side gates. The side gated field effect can have on/off ratio comparable with that of the global back gate, and can be tuned in a large range by the back gate and/or a second side gate. We also find that the side gated field effect is significantly stronger by electrically floating the back gate compared to grounding the back gate, consistent with the finding from electrostatic simulation.

Analysis of Resistance Asymmetry Due to p-n Junctions in Graphene FETs

AbstractFor graphene FETs, asymmetry in the drain current transfer characteristics has been observed. It has been proposed that asymmetry is due to additional resistances from p-n transition regions along the channel [1,2]. Calculations of the additional resistance have been received attention for small p-n transition lengths [3,4]. In this paper, we analyze the resistance of graphene FETs with p-n junctions when transition lengths are long compared with energy and momentum relaxation lengths, as is found in many experimental FETs. We employ a two dimensional device simulator to determine the electric field and channel conductivity variations in the vicinity of the FET gate, assuming rapid electron/hole equilibration. The simulations show added resistances in the range of 50-500 Ω μm p-n junction. We also extract the additional p-n resistance ΔR from experimental results by plots of Vd/Id vs. 1/|Vg-Vt|. Values of ΔR of order 450 Ω μm were extracted from FET results reported in [2]. Epitaxial graphene FETs fabricated on a SiC substrate [5] gives additional resistance of 620 Ωum. Both results are in reasonable agreement with the simulations.The physically-based device simulator Atlas of Silvaco with parameters modified for graphene was used to obtain carrier distributions. A graphene FET on SiO2 substrate with a global back gate and 0.3μm gate/drain and gate/source gaps was studied. The carrier density in the gap region was controlled by back gate bias (Vbg) while the channel region under the top gate was modulated by top and back gate simultaneously. A long channel device at Vds=10mV was used to minimize the lateral electric field effect.From the simulated carrier distribution, we can obtain the resistivity along the channel by ρ=1/[qμ(n+p)]. Mobility is assumed to be equal for electrons and holes, and depends on carrier concentration Ns, μ=μ0 (N0/Ns)1/2 where N0 and μ0 are intrinsic carrier concentration and peak mobility, respectively. Under positive Vbg, the graphene layer becomes n-type in the gap region and channel region. Proper top gate bias (Vg) may be applied to make channel region intrinsic, p-type or n-type. Therefore, various configurations along the channel such as npn or nnn structures may be created. In the p-n transition region, the total number of carriers reduces to N0 and resistivity shows a peak. The additional resistance of a p-n junction can be calculated by integrating the difference of the resistivity vs. channel position for the nnn and npn structures. The integrated resistance value is impacted by the peak height and peak width. The peak height is controlled by Vg-Vt; the resistivity reaches a maximum at the threshold condition, where the electron and hole densities reach their intrinsic levels. The peak width is also controlled by Vg, via fringing field of the gate.