True Random Number Generator Research Articles

Wheeler’s delayed-choice experiment based on Rydberg atoms

The delayed choice gedanken-experiment initially proposed by J A Wheeler reveals the nontrivial features of wave–particle duality in quantum world, that is, the choice of whether to observe the particle/wave character of a quantum system at a delayed time can affect its evolution history. In this work, the Wheeler’s delayed-choice experiment is conducted and tested in a new regime based on a Rydberg-ground level atomic Mach–Zehnder interferometer with optical coherent manipulation. Our quantum system exhibits an excellent single-excitation of the collective atomic state due to the Rydberg blockade effect, and the delayed choice of the interferometer configuration is realized by a quantum random number generator based on high-quality Rydberg single-photon source. Our experimental results demonstrate the Wheeler’s nontrivial time order inversion in this quantum system and confirm the Copenhagen interpretation of the physical reality of quantum state, which means the particle/wave character can only be ascribed to a quantum system when it was measured. This work is encouraging toward testing the foundations of quantum mechanics using the Rydberg atoms.

Field Programmable Gate Array based elliptic curve Menezes‐Qu‐Vanstone key agreement protocol realization using Physical Unclonable Function and true random number generator primitives

The trust, authenticity and integrity of Internet-of-Things (IoT) systems are heavily reliant on Physical Unclonable Functions (PUFs) and True random number generators (TRNGs). The PUF and TRNG produce device intrinsic digital signatures and random binary sequences, which are used for cryptographic key generation, key agreement/exchange, device authentication, cloning prevention etc. This article reports an efficient Field Programmable Gate Array (FPGA)-based realization of elliptic curve Menezes-Qu-Vanstone (ECMQV)-authenticated key agreement protocol using PUF and TRNG with very competitive area-throughput trade-offs. The key agreement protocols, which establish a shared secret key between two IoT devices, make use of PUF and TRNG primitives for the long- and short-term secret keys generation while the elliptic curve is employed for public key generated from the corresponding secret key. The performance of the protocol is investigated on FPGAs. The authors' implementation of the ECMQV protocol takes 1.802 ms using 18852 slices on Artix-7 FPGA.

DESSB-TRNG: A novel true random number generator using data encryption standard substitution box as post-processing

In addition to providing hardware-dependent costly and slow solutions, statistical weakness is an important disadvantage of a cryptographic TRNG that is tried to be removed with post-processing techniques. In this study, the use of Data Encryption Standard (DES) substitution-box (s-box)-based post-processing method is proposed as an alternative solution to the problem of a physical TRNG's inability to generate cryptographic randomness discussed in detail. The proposed s-box-based post-processing method is applied in real time to a TRNG architecture based on two different digital noise source scenarios such as jitter and metastability on the Altera Cyclone GX FPGA chip. In both scenarios, the statistical quality of raw random numbers that s-box based transformations of 48x32 (48-bit input 32-bit output) are applied in the post-process stage is improved to meet the cryptographic competencies. This contribution of the proposed method has been analyzed and confirmed by statistical test techniques such as bias, entropy, correlation, and uniformity as well as National Institute of Standards and Technology (NIST) SP 800-22 randomness evaluation tests. In addition to the statistical analysis, the security analysis of the proposed method has been made and a detailed literature comparison of TRNG is presented by measuring the hardware performance parameters for both scenarios. All these analysis results confirm that the proposed method produces functional results for TRNG by providing a better trade-off in terms of design parameters such as security, area-energy consumption, compression rate, simplicity-applicability and hardware cost. The study is significant to showing that s-boxes with strong mathematical encryption features can be used for different cryptographic aims, such as random number generation, outside of the confusion function.

Quantum randomness generation via orbital angular momentum modes crosstalk in a ring-core fiber

Genuine random numbers can be produced beyond a shadow of doubt through the intrinsic randomness provided by quantum mechanics theories. While many degrees of freedom have been investigated for randomness generation, adequate attention has not been paid to the orbital angular momentum of light. In this work, we present a quantum random number generator based on the intrinsic randomness inherited from the superposition of orbital angular momentum modes caused by the cross talk inside a ring-core fiber. We studied two possible cases: a first one, device-dependent, where the system is trusted, and a second one, semi-device-independent, where the adversary can control the measurements. We experimentally realized the former, extracted randomness, and, after privacy amplification, we achieved a generation rate higher than 10 Mbit/s. In addition, we presented a possible realization of the semi-device-independent protocol using a newly introduced integrated silicon photonic chip. Our work can be considered as a starting point for novel investigation of quantum random number generators based on the orbital angular momentum of light.

Single skyrmion true random number generator using local dynamics and interaction between skyrmions

Magnetic skyrmions are of great interest to both fundamental research and applications in post-von-Neumann computing devices. The successful implementation of skyrmionic devices requires functionalities of skyrmions with effective controls. Here we show that the local dynamics of skyrmions, in contrast to the global dynamics of a skyrmion as a whole, can be introduced to provide effective functionalities for versatile computing. A single skyrmion interacting with local pinning centres under thermal effects can fluctuate in time and switch between a small-skyrmion and a large-skyrmion state, thereby serving as a robust true random number generator for probabilistic computing. Moreover, neighbouring skyrmions exhibit an anti-correlated coupling in their fluctuation dynamics. Both the switching probability and the dynamic coupling strength can be tuned by modifying the applied magnetic field and spin current. Our results could lead to progress in developing magnetic skyrmionic devices with high tunability and efficient controls.

A Unified PUF and TRNG Design Based on 40-nm RRAM With High Entropy and Robustness for IoT Security

Physically unclonable function (PUF) and true random number generator (TRNG) are the indispensable primitives for the Internet-of-Things (IoT) security. In this article, a highly robust unified PUF<inline-formula> <tex-math notation="LaTeX">$/$ </tex-math></inline-formula>TRNG design is demonstrated. An entropy source (ES) chip based on 40-nm resistive random access memory (RRAM) is designed and fabricated, and a pseudo-forming technique is developed to ensure excellent robustness. The unified PUF<inline-formula> <tex-math notation="LaTeX">$/$ </tex-math></inline-formula>TRNG is tested across <inline-formula> <tex-math notation="LaTeX">$- 55\,\,^{\circ }\text{C}$ </tex-math></inline-formula> to 125 &#x00B0;C with different supply voltages, achieving &#x003C; 0.001&#x0025; bit error rate (BER) and &#x003E;0.999 worst case min-entropy simultaneously. Excellent randomness is verified by NIST SP800-22 and 90B tests. This highly robust unified design can implement an authentication system with the authentication error rate (AER) approaching 0&#x0025; and thus is promising for future IoT security applications.

Quantum true random number generation on IBM’s cloud platform

Random numbers are the lifeline of any cryptographic operation in modern computing. Quantum True Random Number Generator (QTRNG) can yield real random data to replace random-looking periodic sequences. Here, we present the fastest QTRNG on factual Quantum Computational Devices (QCD) locally on our device to save time. To construct a random number generator, the IBM Q Experience called Qiskit is used. The ease of our source Hadamard gate pooled with its verifiably sole randomness is imperative for attaining quantum random number generators at no cost. The inner matrix product of the square of the Hadamard gate is proved to be identified in the quantum lab. Applying the H gate twice on the quantum register cancelled out the H gate pair. It acted as a single Hadamard gate that was practically visualised using the IMB Q experience. The 24-qubit random number is experimented with and investigated in this work. The min-entropy of such generated random numbers is 0.0007244 with the worst-case entropy value of 0.999507. Besides, subsequent verification of genuine randomness was confirmed by steering restart experimentation, & the statistical properties of TRNG were evaluated over autocorrelation study, National Institute of Standards and Technology (NIST) SP 800-90B & 800-22 tests.

Single photon randomness originating from the symmetric dipole emission pattern of quantum emitters

Quantum random number generation is a key ingredient for quantum cryptography and fundamental quantum optics and could advance Monte Carlo simulations and machine learning. An established generation scheme is based on single photons impinging on a beam splitter. Here, we experimentally demonstrate quantum random number generation solely based on the symmetric emission profile of a dipole aligned orthogonal to the laboratory frame. The demonstration builds on defect centers in hexagonal boron nitride that emit photons in random directions within the dipole emission profile and benefits from the ability to manipulate and align the emission directionality. We prove the randomness in correlated photon detection events making use of the NIST randomness test suite and show that the randomness remains for two independently emitting defect centers. The scheme can be extended to random number generation by coherent single photons with potential applications in solid-state based quantum communication at room temperature.

A Unified NVRAM and TRNG in Standard CMOS Technology

True Random Number Generator (TRNG) provides the different keys for device authentication and cryptography. Typically, the TRNG is implemented in a standalone module into the systems, increasing the complexity and area of the implementation. In addition, the system needs to store the key generated by the TRNG in non-volatile memory for the different applications. However, implementing a Non-Volatile Random Access Memory (NVRAM) requires additional technology features, usually unavailable or expensive. This paper presents a unified NVRAM-TRNG in a 0.18&#x03BC;m standard CMOS technology without an additional mask or fabrication steps. The unified implementation does not need additional circuits for the random number generation mode. The differential NVRAM bit cell is implemented using a high voltage transistor to resist the non-volatile memory application. The NVRAM presents times of 15-ms of programming and erasing and 20-ns of reading functions. The bit cell needs a voltage of 8.5-V for the programming and erasing functions. The TRNG implemented passes the NIST SP800-22 statistical test and NIST SP800-90B entropy test with a 0.9859 minimum entropy. The entropy and statistical test are applied with Process, Voltage, and Temperature (PVT) variations. The implementation occupies a 476-&#x03BC;m² with 14.69-10³F² of area normalized. Besides, the NVRAM bit cell in TRNG mode shows a bit rate of 50-Mbps. Finally, the implementation as TRNG reports a 49.5-&#x03BC;W power consumption with 0.99-pJ/bit energy efficiency, respectively.

A New Energy-Efficient and High Throughput Two-Phase Multi-Bit per Cycle Ring Oscillator-Based True Random Number Generator

Oscillator-based elementary true random number generator (TRNG) uses a slow jittery ring oscillator (RO) to sample a fast RO. The ROs are always on but most of the oscillatory cycles of the fast RO are not sampled into random bits. In this paper, a new lightweight TRNG design is proposed to minimize the power wasted by the superfluous oscillations. Random bits are extracted from both phases of the slow ROs to increase the throughput and the fast RO is activated only during the narrow transition time difference between two symmetrically designed slow ROs. The slow jittery ROs are implemented using current starved inverters biased in the weak inversion region to reduce their power consumption. Their jitter amplitudes are increased by lowering the oscillation frequency and reducing the drain current of the transistors. The narrow jittery pulse generated by the differential pair of slow ROs is quantized by the fastest three-stage RO. Two random bits from each phase of the jittery ROs can be extracted by using a gigahertz dynamic toggled D flip-flop counter to count the number of oscillatory cycles of the fast RO. The proposed TRNG is fabricated in a standard 65 nm 1.2 V CMOS process. Measurement results of the fabricated chips show that the proposed TRNG consumes merely <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$260~\mu \text{W}$ </tex-math></inline-formula> at a bit rate of 52 Mbps. It outperforms the state-of-art on-chip jitter-based TRNGs with the best figure-of-merit of 5 pJ/bit and the smallest footprint of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$366~\mu \text{m}^{2}$ </tex-math></inline-formula> . Its generated bit sequence passes the statistical randomness tests including National Institute of Standards and Technology (NIST) test, Auto Correlation Factor (ACF) test and bias. The mean redundancy of the ten tested chips is measured to be less than 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">−5</sup> bit/symbol.

In-Memory Unified TRNG and Multi-Bit PUF for Ubiquitous Hardware Security

This work describes an SRAM architecture with in-memory generation of both dynamic and multi-bit static entropy. This inexpensively extends complete key generation capabilities to any system that includes an SRAM, and hence ubiquitously down to tightly constrained and very low cost. The array embeds a true random number generator (TRNG) and a physically unclonable function (PUF), while using a commercial bitcell and periphery all-digital pitch-matched augmentation to retain the simplicity of memory compiler designs. TRNG bits are generated from bitline discharge induced by the cumulative column-level leakage, whose otherwise exponential energy increase under temperature fluctuations is counteracted by an energy control loop. Multiple PUF bits (e.g., two bits) per accessed bitcell are uniquely extracted from the bitline discharge rate, rather than conventional power-up state. A 16-kb SRAM array in 28 nm shows cryptographic-grade TRNG operation at the low area cost of 12.5 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu \text{m}^{2}$ </tex-math></inline-formula> per output stream, and two-bit/PUF bitcell with 12.6 Gbps and 72 fJ/bit energy. Embedment within the array and inherent data locality eliminate obvious physical attack points of standalone TRNGs and PUFs.

Design and Synchronization of Chaos-Based True Random Number Generators and Its FPGA Implementation

In this paper, a new chaos-based true random number generator (TRNG) and a sliding mode controller (SMC) to synchronize the proposed TRNGs are proposed. Firstly, the continuous chaotic system is transformed into a discrete system that preserves the original continuous system’s chaotic behavior and makes it easy to realize with the field-programmable gate array (FPGA) for synchronization control. Then, a discrete SMC is introduced to solve the synchronization problem of the master-slave discrete chaotic systems. Subsequently, a novel hybrid function integrated with the El-Gamal algorithm is proposed to complete the TRNG design. Finally, the FPGA-based realization of the synchronized master-slave TRNGs is implemented. The randomness quality of the proposed TRNGs has been ensured by using Shannon’s entropy and histogram analysis. Furthermore, the National Institute of Standards and Technology (NIST) test suite has also been introduced to evaluate the proposed TRNGs and compare with the existing results in the literature.

Compact Programmable True Random Number Generator Based on Spin Torque Nano-Oscillator

True Random Number Generator(TRNG) is the key component for stochastic computation. It can also act as the Probabilistic Bit(P-Bit) which is the core device for Ising Computer. In previous study, we have proposed a novel programmable TRNG based on Spin Torque Nano-Oscillator(STNO). With this TRNG constructed with STNO, a time division multiplexing Ising computer is designed to work under the Incremental Coupling Rule. However, the programmable TRNG is still lack of a corporeal hardware implementation. In this work, a SPICE model for STNO which can accurately describe the frequency, resistance as well as noise spectrum is provided first. And then, a compact optimized Schmitt trigger circuit with 14 nm FinFET technology is proposed to construct the programmable TRNG. Finally, the performance of the compact programmable TRNG circuit is evaluated and discussed.

A mechanical true random number generator

Random number generation has become an indispensable part of information processing: it is essential for many numerical algorithms, security applications, and in securing fairness in everyday life. Random number generators (RNGs) find application in many devices, ranging from dice and roulette wheels, via computer algorithms, lasers to quantum systems, which inevitably capitalize on their physical dynamics at respective spatio-temporal scales. Herein, to the best of our knowledge, we propose the first mathematically proven true RNG (TRNG) based on a mechanical system, particularly the triple linkage of Thurston and Weeks. By using certain parameters, its free motion has been proven to be an Anosov flow, from which we can show that it has an exponential mixing property and structural stability. We contend that this mechanical Anosov flow can be used as a TRNG, which requires that the random number should be unpredictable, irreproducible, robust against the inevitable noise seen in physical implementations, and the resulting distribution’s controllability (an important consideration in practice). We investigate the proposed system’s properties both theoretically and numerically based on the above four perspectives. Further, we confirm that the random bits numerically generated pass the standard statistical tests for random bits.

Versatile and Concurrent FPGA-Based Architecture for Practical Quantum Communication Systems

This article presents a hardware and software architecture, which can be used in those systems that implement practical quantum key distribution (QKD) and quantum random-number generation (QRNG) schemes. This architecture fully exploits the capability of a System on a Chip (SoC), which comprehends both a field-programmable gate array (FPGA) and a dual-core CPU unit. By assigning the time-related tasks to the FPGA and the management to the CPU, we built a flexible system with optimized resource sharing on a commercial off-the-shelf (COTS) evaluation board, which includes an SoC. Furthermore, by changing the dataflow direction, the versatile system architecture can be exploited as a QKD transmitter, QKD receiver, and QRNG control-acquiring unit. Finally, we exploited the dual-core functionality and realized a concurrent stream device to implement a practical QKD transmitter, where one core continuously receives fresh data at a sustained rate from an external QRNG source, while the other operates with the FPGA to drive the qubit transmission to the QKD receiver. The system was successfully tested on a long-term run proving its stability and security. This demonstration paves the way toward a more secure QKD implementation, with fully unconditional security as the QKD states are entirely generated by a true random process and not by deterministic expansion algorithms. Eventually, this enables the realization of a standalone quantum transmitter, including both the random numbers and the qubit generation.

Construction and Optimization of TRNG Based Substitution Boxes for Block Encryption Algorithms

Internet of Things is an ecosystem of interconnected devices that are accessible through the internet. The recent research focuses on adding more smartness and intelligence to these edge devices. This makes them susceptible to various kinds of security threats. These edge devices rely on cryptographic techniques to encrypt the pre-processed data collected from the sensors deployed in the field. In this regard, block cipher has been one of the most reliable options through which data security is accomplished. The strength of block encryption algorithms against different attacks is dependent on its nonlinear primitive which is called Substitution Boxes. For the design of S-boxes mainly algebraic and chaos-based techniques are used but researchers also found various weaknesses in these techniques. On the other side, literature endorse the true random numbers for information security due to the reason that, true random numbers are purely non-deterministic. In this paper firstly a natural dynamical phenomenon is utilized for the generation of true random numbers based S-boxes. Secondly, a systematic literature review was conducted to know which metaheuristic optimization technique is highly adopted in the current decade for the optimization of S-boxes. Based on the outcome of Systematic Literature Review (SLR), genetic algorithm is chosen for the optimization of s-boxes. The results of our method validate that the proposed dynamic S-boxes are effective for the block ciphers. Moreover, our results showed that the proposed substitution boxes achieve better cryptographic strength as compared with state-of-the-art techniques.

Trusted Execution Environment Hardware by Isolated Heterogeneous Architecture for Key Scheduling

A Trusted Execution Environment (TEE) sets a platform to secure applications based on the Chain-of-Trust (CoT). The starting point of the CoT is called the Root-of-Trust (RoT). However, the RoT implementation often relies on obscurity and provides little flexibility when generating keys to the system. In this paper, a TEE System-on-a-Chip (SoC) architecture is proposed based on a heterogeneous design by combining 64-bit Linux-capable processors with a 32-bit Micro-Controller Unit (MCU). The TEE is built on the 64-bit cores, while the 32-bit MCU takes care of sensitive data and activities. The MCU is isolated from the TEE side by an Isolated Bus (IBus) that sits above the conventional System Bus (SBus). Besides the 32-bit processor, the isolated sub-system contains a Random Access Memory (RAM), a Read-Only Memory (ROM) for storing the boot program, and another ROM for storing root keys. For cryptography accelerators, we have 512-bit Secure Hashing Algorithm 3 (SHA3-512), 128/256-bit Advanced Encryption Standard (AES-128/256), Ed25519, and True Random Number Generator (TRNG) attached to the Peripheral Bus (PBus). Additionally, besides the public channel, the TRNG module also has a private channel that goes directly to the IBus. With RoT implemented inside the isolated sub-system, the RoT is inaccessible from the TEE side after boot. Furthermore, the hidden MCU’s secure boot program makes the key generation flexible and could be updated for many security schemes. To summarize, the proposed design features a flexible and secure boot procedure with complete isolation from the TEE domain. Moreover, exclusive secure storage for the root key and cryptographic accelerators are available for the boot process. The implementation was tested on a Virtex-7 XC7VX485T Field-Programmable-Gate-Array (FPGA). It was also synthesized in a Very Large-Scale Integrated (VLSI) circuit with the ROHM-180nm process library.

Nanostructured perovskites for nonvolatile memory devices.

Perovskite materials have driven tremendous advances in constructing electronic devices owing to their low cost, facile synthesis, outstanding electric and optoelectronic properties, flexible dimensionality engineering, and so on. Particularly, emerging nonvolatile memory devices (eNVMs) based on perovskites give birth to numerous traditional paradigm terminators in the fields of storage and computation. Despite significant exploration efforts being devoted to perovskite-based high-density storage and neuromorphic electronic devices, research studies on materials' dimensionality that has dominant effects on perovskite electronics' performances are paid little attention; therefore, a review from the point of view of structural morphologies of perovskites is essential for constructing perovskite-based devices. Here, recent advances of perovskite-based eNVMs (memristors and field-effect-transistors) are reviewed in terms of the dimensionality of perovskite materials and their potentialities in storage or neuromorphic computing. The corresponding material preparation methods, device structures, working mechanisms, and unique features are showcased and evaluated in detail. Furthermore, a broad spectrum of advanced technologies (e.g., hardware-based neural networks, in-sensor computing, logic operation, physical unclonable functions, and true random number generator), which are successfully achieved for perovskite-based electronics, are investigated. It is obvious that this review will provide benchmarks for designing high-quality perovskite-based electronics for application in storage, neuromorphic computing, artificial intelligence, information security, etc.

Design of Hybrid True Random Number Generator for Cryptographic Applications

In real-time applications, unpredictable random numbers play a major role in providing cryptographic and encryption processes. Most of the existing random number generators are embedded with the complex nature of an amplifier, ring oscillators, or comparators. Hence, this research focused more on implementing a Hybrid Nature of a New Random Number Generator. The key objective of the proposed methodology relies on the utilization of True random number generators. The randomness is unpredictable. The additions of programmable delay lines will reduce the processing time and maintain the quality of randomizing. The performance comparisons are carried out with power, delay, and lookup table. The proposed architecture was executed and verified using Xilinx. The Hybrid TRNG is evaluated under simulation and the obtained results outperform the results of the conventional random generators based on Slices, area and Lookup Tables. The experimental observations show that the proposed Hybrid True Random Number Generator (HTRNG) offers high operating speed and low power consumption.

Quantum noise source based on shot noise of a balanced photodetector with a tunable integrated optical beam splitter

A broadband quantum noise source based on detection of shot noise of a balanced photodetector is demonstrated. Precise electro-optical tuning of the balanced photodetector circuit was carried out by an integrated optical beam splitter constructed in the form of the dual output Mach-Zehnder interferometer on a lithium niobate substrate. The classical component of the detected noise related to the relative intensity noise of a laser diode was suppressed by more than 15 dB. At the maximum laser power of 100 mW, the power spectral density of detected shot noise was 12 dB higher than the level of technical noise of the measuring system in the frequency band above 3 GHz. Keywords: quantum random number generator, vacuum fluctuations, shot noise measurements, integrated optics, lithium niobate