Versatile and Concurrent FPGA-Based Architecture for Practical Quantum Communication Systems

Andrea Stanco,Daniele Dequal,Tommaso Bertapelle,Luca Calderaro,Giuseppe Vallone,Francesco B L Santagiustina,Marco Avesani,Paolo Villoresi

doi:10.1109/tqe.2022.3143997

Abstract

This article presents a hardware and software architecture, which can be used in those systems that implement practical quantum key distribution (QKD) and quantum random-number generation (QRNG) schemes. This architecture fully exploits the capability of a System on a Chip (SoC), which comprehends both a field-programmable gate array (FPGA) and a dual-core CPU unit. By assigning the time-related tasks to the FPGA and the management to the CPU, we built a flexible system with optimized resource sharing on a commercial off-the-shelf (COTS) evaluation board, which includes an SoC. Furthermore, by changing the dataflow direction, the versatile system architecture can be exploited as a QKD transmitter, QKD receiver, and QRNG control-acquiring unit. Finally, we exploited the dual-core functionality and realized a concurrent stream device to implement a practical QKD transmitter, where one core continuously receives fresh data at a sustained rate from an external QRNG source, while the other operates with the FPGA to drive the qubit transmission to the QKD receiver. The system was successfully tested on a long-term run proving its stability and security. This demonstration paves the way toward a more secure QKD implementation, with fully unconditional security as the QKD states are entirely generated by a true random process and not by deterministic expansion algorithms. Eventually, this enables the realization of a standalone quantum transmitter, including both the random numbers and the qubit generation.

Highlights

Q UANTUM Communication (QC) is one of the promising applications of quantum technology and is recently receiving a relevant boost towards commercial applications
The schematic shows the versatility of the architecture as it can be exploited in different QC applications without changing anything but the output interfacing module (QStates Controller in the Quantum Key Distribution (QKD) transmitter configuration; SPD Reader and Quantum Random Number Generation (QRNG) protocols in the QRNG/QKD receiver one) and the data flow direction
In this work, we presented a versatile architecture based on Field Programmable Gate Array (FPGA) technology exploiting a CPU counterpart, forming a System-on-a-Chip, for the implementation of practical Quantum Communication systems

Summary

INTRODUCTION

Q UANTUM Communication (QC) is one of the promising applications of quantum technology and is recently receiving a relevant boost towards commercial applications. We present a generalized FPGA-based architecture for control and readout functions of quantum communication systems It exploits the integrated CPU counterpart, forming a Systemon-a-Chip (SoC), to improve flexibility and unleash continuous operability of a QKD scheme feeded, without any expansion, by an external QRNG. Given the presence of a dual core CPU, we designed, developed, and successfully tested a dual core application capable to sustain a continuous data transfer from an external source to the CPUs and to the FPGA This feature is the key to implement a provably secure QKD system since it combines a QRNG output stream with a QKD stream without the need of a random number expansion (which allowed very high transmission rates at the price of undermined security [7], [8]), paving the way to commercial QKD devices with full unconditional security.

ARCHITECTURE OVERVIEW

QKD RECEIVER/QRNG

CPU LAYER

SYSTEM TESTS

CONCLUSION