Gate-emitter Voltage Research Articles

Temperature Measurement of Power Semiconductor Devices by Thermo-Sensitive Electrical Parameters—A Review

This paper proposes a synthesis of different electrical methods used to estimate the temperature of power semiconductor devices. The following measurement methods are introduced: the voltage under low current levels, the threshold voltage, the voltage under high current levels, the gate-emitter voltage, the saturation current, and the switching times. All these methods are then compared in terms of sensitivity, linearity, accuracy, genericity, calibration needs, and possibility of characterizing the thermal impedance or the temperature during the operation of the converter. The measurement of thermo-sensitive parameters of wide bandgap semiconductors is also discussed.

Evaluation of IGBT thermo-sensitive electrical parameters under different dissipation conditions – Comparison with infrared measurements

Junction temperature evaluation is a key parameter used to control a power module assembly. But measuring the junction temperature by thermo-sensitive electrical parameters (TSEPs) does not reveal the actual temperature of the semiconductor device. In this paper, a specific electronic board used to compare four common TSEPs of IGBT chips is presented. For this comparison, two dissipation modes are used: dissipation in active and saturation regions. In order to have referential measurements we carried out surface temperature measurements of IGBT chips with an infrared (IR) camera. A dedicated numerical tool is presented to estimate the mean surface temperature of active region. In the case of a single IGBT chip, the comparison between IR and TSEP measurements show that the best studied parameter (in terms of robustness and usability) is the gate emitter voltage.

A prognostic approach for non-punch through and field stop IGBTs

Development of prognostic approaches for insulated gate bipolar transistors (IGBTs) is of interest in order to improve availability, reduce downtime, and prevent failures of power electronics. In this study, a prognostic approach was developed to identify anomalous behavior in non-punch through (NPT) and field stop (FS) IGBTs and predict their remaining useful life. NPT and FS IGBTs were subjected to electrical–thermal stresses until their failure. X-ray analysis performed before and after the stress tests revealed degradation in the die attach. The gate–emitter voltage (VGE), collector–emitter voltage (VCE), collector–emitter current (ICE), and case temperature were monitored in situ during the experiment. The on-state collector–emitter voltage (VCE(ON)) increased and the on-state collector–emitter current (ICE(ON)) decreased during the test. A Mahalanobis distance (MD) approach was implemented using the VCE(ON) and ICE(ON) parameters for anomaly detection. Upon anomaly detection, the particle filter algorithm was triggered to predict the remaining useful life of the IGBT. The system model for the particle filter was obtained by a least squares regression of the VCE(ON) at the mean test temperature. The failure threshold was defined as a 20% increase in VCE(ON). The particle filter approach, developed using the system model based on the VCE(ON), was demonstrated to provide mean time to failure estimates of IGBT remaining useful life with an error of approximately 20% at the time of anomaly detection.

Characterization of Lead-Free Solder and Sintered Nano-Silver Die-Attach Layers Using Thermal Impedance

Since a die-attach layer has a significant impact on the thermal performance of a power module, its quality can be characterized using thermal performance. In this paper, a measurement system for thermal impedance is developed to evaluate three die-attach materials. Thanks to its high temperature sensitivity (10 mV/ <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C), the gate-emitter voltage of an insulated gate bipolar transistor (IGBT) is used as the temperature-sensitive parameter. The power dissipation in the IGBT remains constant by a feedback loop, regardless of the junction temperature. Experimental results show that the sample using sintered nano-silver for the die-attach has 12.1% lower thermal impedance than the samples using SAC305 and SN100C solders. To check the degradation of the die-attachment, six samples using three die-attach materials were thermally cycled from -40 to 125 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C. The experimental results show that, after 500 cycles, the thermal impedance of SAC305 samples and SN100C samples is increased by 12.9% and 13.3%, respectively, which are much higher than that of the sample using the sintered nano-silver for the die-attach (3.1%).

Turn-on Performance of Reverse Blocking IGBT (RB IGBT) and Optimization Using Advanced Gate Driver

Turn-on performance of a reverse blocking insulated gate bipolar transistor (RB IGBT) is discussed in this paper. The RB IGBT is a specially designed IGBT having ability to sustain blocking voltage of both the polarities. Such a switch shows superior conduction but much worst switching (turn- on) performances compared to a combination of an ordinary IGBT and blocking diode. Because of that, optimization of the switching performance is a key issue that makes the RB IGB not well accepted in the real applications. In this paper, the RB IGBT turn-on losses and reverse recovery current are analyzed for different gate driver techniques, and a new gate driver is proposed. Commonly used conventional gate drivers do not have capability for the switching dynamics optimization. In contrast to this, the new proposed gate driver provides robust and simple way to control and optimize the reverse recovery current and turn-on losses. The collector current slope and reverse recovery current are controlled by the means of the gate emitter voltage control in feedforward manner. In addition, the collector emitter voltage slope is controlled during the voltage falling phase by the means of inherent increase of the gate current. Therefore, the collector emitter voltage tail and the total turn- on losses are reduced, independently on the reverse recovery current. The proposed gate driver was experimentally verified and the results presented and discussed.

Impact of Gamma Irradiation Effects on IGBT and Design Parameter Considerations

The primary dose effects on an insulated gate bipolar transistor (IGBT) irradiated with a 60Co gamma-ray source are found in both of the components of the threshold shifting due to oxide charge trapping in the MOS and the reduction of current gain in the bipolar transistor. In this letter, the IGBT macro-model incorporating irradiation is implemented, and the electrical characteristics are analyzed by SPICE simulation and experiments. In addition, the collector current characteristics as a function of gate emitter voltage, VGE, are compared with the model considering the radiation damage of different doses under positive biases.

An IGBT Gate Driver for Feed-Forward Control of Turn-on Losses and Reverse Recovery Current

This paper addresses the problem of turn on performances of an insulated gate bipolar transistor (IGBT) that works in hard switching conditions. The IGBT turn on dynamics with an inductive load is described, and corresponding IGBT turn on losses and reverse recovery current of the associated freewheeling diode are analysed. A new IGBT gate driver based on feed-forward control of the gate emitter voltage is presented in the paper. In contrast to the widely used conventional gate drivers, which have no capability for switching dynamics optimisation, the proposed gate driver provides robust and simple control and optimization of the reverse recovery current and turn on losses. The collector current slope and reverse recovery current are controlled by means of the gate emitter voltage control in feed-forward manner. In addition the collector emitter voltage slope is controlled during the voltage falling phase by means of inherent increase of the gate current. Therefore, the collector emitter voltage tail and the total turn on losses are significantly reduced. The proposed gate driver was experimentally verified and compared to a conventional gate driver, and the results are presented and discussed in the paper.

Current Gain and Voltage Gain in Hot Electron Transistors without Base Layer

The feasibility of a new transistor structure was demonstrated through an experimental observation of current gain and voltage gain. The proposed transistor structure is a hot electron transistor without a base layer to minimize scattering. Electron emission from the emitter is controlled using positively biased Schottky gate electrodes located on both sides of the emitter mesa. Monte Carlo simulation shows an estimated delay time of 0.17 ps and low gate leakage current with open-circuit voltage gain over unity. To confirm the basic operation, the device with a 25 nm wide emitter was fabricated. To obtain saturated current-voltage characteristics, the emitter was surrounded by gates and parasitic regions were eliminated by electron beam lithography. The observed open-circuit voltage gain was 25. To obtain a low leakage current, an electron energy smaller than the Γ-L separation was necessary to maintain the ballistic nature of the electron. When the gate-emitter voltage was 0.8 V, the gate leakage current was only 4% of the collector current. Thus voltage amplification and current amplification were confirmed simultaneously.

Protection Concepts for Rugged IGBT Modules

SummaryA reliable protection concept is an important component in any design of the power conversion system. The classification of the critical operation cases, that can lead to the destruction of the power semiconductor, is presented. On the basis of the measured waveform the short circuit type II is pointed out as the worst fault case. With the consideration to the main emphasizes of integration very reliable and good integrable protection circuits are introduced. A new two-stages approach to control the gate-emitter voltage and a switchable gate resistance control are the special features of the protection concept. The comparison of the forward and short-circuit behaviour of the IGBTs with different channel lengths shows the trade-off between the power losses and the ruggedness.

Experimental observations of gated field emitter failures

Intrinsic failure events in gated field emitters have been studied. The gate-emitter voltage, typically 140 V during operation, drops to 10-70 V at the onset of the failure. Measurements with a diagnostic probe indicate that plumes of ions and electrons are ejected into vacuum with the ion current typically 10% of the electron current. The arc voltage and the ion-to-electron current ratio are characteristic of a cathodic vacuum arc. For series resistors less than 1 k Omega , the arc is continuous, whereas for series resistors greater than 10 k Omega , the arc is intermittent. >

Gate field emitter failures: experiment and theory

Intrinsic failures of gated field emitters have been studied. The gate-emitter voltage drops from typical values of 140 V to 10-70 V in less than 10 ns at the onset of a failure. Measurements with an electrostatic probe indicate that plumes of ions and electrons are ejected into vacuum. The measured ion current to the probe is typically 10% of the electron current. The voltage during the event and the ion-to-electron current ratio measured at the probe are characteristic of a cathodic vacuum arc plasma. For series resistors less than 1 k Omega , the arc is continuous, while the series resistors greater than 10 k Omega , the arc is intermittent. Initiation of the failure based on ion-space charge enhancement of the emitter electric field is modeled with the plasma simulation code PDS1. These structures provide a controlled geometry for studying arcs of micron size dimension. >