Gate-drain Breakdown Voltage Research Articles

Record-High BVDS p-Channel P++-GaN/P-GaN/GaN/AlN/Al0.3Ga0.7n MOS-HFETs with Drain Field-Plate Design

This work reports record-high three-terminal on- state drain-source breakdown voltage (BVDS ) of -735 V, superior on/off current ratio (Ion /Ioff ) of 2 × 106, and improved device performance of the p-channel p++- GaN/p-GaN/GaN/AlGaN metal-oxide-semiconductor hetero-structure field-effect transistors (MOS-HFETs) with drain-field plate (DFP) design. A reference MOS-HFET without DFP was fabricated and studied in comparison. High-k, wide-gap Al2O3 was deposited as the gate oxide and surface passivation by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) technique. Atomic force microscope (AFM), transmission electron microscope (TEM), X-ray photoelectron spectroscopy (XPS), and capacitance-voltage (C-V) measurement were also performed to characterize the material and interface quality of the MOS-gate design. The present p-channel MOS-HFET design is promising for high-voltage complementary power-switching circuit application.The schematic device structures of the present p++-GaN/ p-GaN/GaN/AlN/Al0.3Ga0.7N MOS-HFETs without/with DFP (samples A/B) are shown in Fig. 1(a). The epitaxial layers for both samples were grown on a Si substrate by using a low-pressure metal-organic chemical vapor deposition (LP-MOCVD) system. The related schematic energy-band diagram was shown in Fig. 1(b), illustrating the formation of 2DHG by the heterostructural design. Standard lift-off and photolithography were applied to the device fabrication for the present sample with (without) DFP design. The AFM photos shown in Figs. 2 (a)-(c) compared the surface roughness after dry-etching, after the TMAH treatment, and after the further deposition of Al2O3 by USPD. The cross-sectional TEM photo of the Al2O3 oxide was shown in Fig. 2 (d). The XPS profile shown in Fig. 3 also verified the composition of the Al2O3 layer. Fig. 4 shows the C-V hysteresis measurement curves to confirm the improved interfacial quality by the Al2O3 passivation.Figs. 5(a)-(b) show the typical IDS -VDS curves and the transfer IDS /gm -VGS characteristics for the studied samples A and B at 300 K. The characterized three-terminal on- state drain-source breakdown voltage (BVDS ) andtwo-terminal off-state gate-drain breakdown voltage (BVGD ) were also compared in Fig. 6 and its inset. Due to the integrated device design as mentioned before, the present sample B (A) with (without) DFP has demonstrated superior maximum drain-source current density (IDS, max ) of -9.5 (-10.6) mA/mm at VDS = 20 V, on/off current ratio (Ion /Ioff ) of 2 × 106 (9.2 × 105), BVGD of 710 (520) V, and BVDS of -735 (-545) V, respectively. Enhanced gate modulation, improved current density, enhanced Ion /Ioff switching, and superior BVDS and BVGD performances have been successfully achieved. Comparisons of the IDS, max vs. Ion/Ioff benchmark of the present samples A and B with respect to other p- channel GaN-based devices were shown in Fig. 7. The present sample B has achieved the record-high BVDS of - 735 V with superior Ion /Ioff ratio of 2 × 106.The present p-channel GaN MOS-HFET designs with/without DFP have been successfully investigated. Through the integrated heterostructural/device designs, material/interface characterizations, and comparative device measurement, the present sample B has demonstrated superior performance with the highest BVDS record, so far. It is beneficial to high-voltage complementary power-switching IC applications. Figure 1

(Invited) Rare Earth Oxides on Wide Band Gap Semiconductors

Globally, most recent power electronics converter and device technology has been driven by the unprecedented demand seen within the automotive sector [1]. The latter demands power converters with near 100% energy efficiency, lightweight, compact and reliable. Wide band gap (WBG) semiconductor materials such as GaN and 4H-SiC have emerged as contenders to replace Si in many power electronics applications. Currently, GaN devices based on the high electron mobility transistor (HEMT) architecture are limited commercially to a maximum of 650 V [2,3]. GaN HEMTs have traditionally suffered from a poor thermal conductivity and the “current collapse” phenomenon, limiting their ability to operate within harsh environments. On the other hand, 4H-SiC has a few reliability issues that limit its ubiquitous application in the automotive sector [2]. Currently the GaN based Metal-Insulator-Semiconductor (MIS)-HEMT device is seen to demonstrate superior performance in power electronics applications over the Schottky gate counterpart, due to its inherently lower gate leakage current, together with the ability to provide larger forward gate voltage swing by engineering the threshold voltage between depletion and enhancement mode operation and also an improved gate-drain breakdown voltage. High band gap gate dielectric materials are preferable as they can provide higher tunnelling barriers for electrons and holes, which result in lower gate leakage current. Furthermore, high dielectric constant (high-k) material is also necessary for improved electrostatic control over the channel and improved on-current, which in-turn results in higher transconductance. In terms of SiC based devices, the use of SiO2 proves to be a bottleneck in exploiting full potential of SiC due to the low value of dielectric constant of SiO2 [4]. Since the oxide is subjected to an electric field that is ~2.5x the field in the semiconductor, the breakdown of SiO2 occurs first, and hence causes the breakdown of SiO2/4H-SiC based devices well below the critical electric field of SiC. This shortcoming led to the exploration of high-k dielectrics as gate stacks in 4H-SiC MIS based devices as well as for surface passivation. It is worth noting that SiO2 is the only dielectric commercially used for SiC devices largely due to the unavailability of a reliable high-k dielectric alternative. Most published results focus on use of Al2O3 and HfO2 films [5], however they have yet to become used mainstream in 4H-SiC devices.In this paper, two rare earth high-k oxides, Y2O3 and Sc2O3, both with dielectric constant >10, have been studied in terms of their suitability as gate dielectrics on GaN and 4H-SiC. The oxide films were prepared by radio frequency (RF) magnetron sputtering (Sc2O3) and ion gun sputtering (Y2O3). The substrates were cleaned with Kr ions with anode current of ~ 50 mA and accelerating voltage of 3 kV for 1-2 hours. Then metallic Y was sputtered using pressure of 1.5 x 10-5 mbar and current of 26 mA, which was followed by exposure to O2 to form Y2O3 films. Sc2O3 films were deposited using Moorfields nano-PVD (physical vapour deposition) equipment with circular Sc2O3 target of 99.99% purity using RF power of 60 W and a gas flow of 0.5 sccm for 3 nm film and 3 sccm for 40 nm film. The films were also deposited simultaneously on Si to be used as reference samples for variable angle spectroscopic ellipsometry (VASE) measurements to ascertain their thickness and optical properties. The X-ray photoelectron spectroscopy (XPS) was used to characterise comprehensively the oxide/semiconductor interface. The capacitance voltage measurements on MIS stacks were used to determine permittivity of deposited oxides. The complete band alignment of oxide/WBG semiconductor as well as comprehensive comparison to state of the art data will be presented and discussed in full paper. Acknowledgement. The UKIERI IND/CONT/G/17-18/18 and F.No.184-1/2018(IC) project funded by the British Council; UKRI GCRF GIAA award 2018/19 and EP/P510981/1, funded by the EPSRC, UK. References. [1] http://www.yole.fr/Compound_Semiconductor_Monitor_Q1.aspx. [2] Li et al., Materials 14, 5831 (2021); [3] Gonzalez et al. IEEE Trans. Ind. Electron. 67, 7375 (2020); [4] A. Siddiqui et al., J. Mater. Chem. C 9, 5055 (2021); [5] Bencherif et al., Appl. Phys. A 126, 854 (2020).

Fabrication of 150‐nm AlGaN/GaN field‐plated High Electron Mobility Transistors using i ‐line stepper

This article reports a high throughput 150-nm-gate AlGaN/GaN high electron mobility transistor (HEMT) process using i-line stepper lithography and a thermal reflow technique. Optimizing thermal reflow conditions, fabrication of a 150-nm gate structure was successfully realized with the initial resist opening of 0.7 μm. AlGaN/GaN field-plated HEMTs were fabricated on a semi-insulating SiC substrate by using this process. In spite of unoptimized structures, fabricated 150-nm gate devices exhibited the maximum drain current of 0.65 A/mm and the gate-drain breakdown voltage exceeding 200 V. Based on cold HEMT extraction measurements, the average gate length of 187 nm and the standard deviation of 30 nm were obtained on a quarter 4-in. wafer.

AlGaN/AlN/SiC Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors with Al2O3 Gate-Oxide and Step-Graded AlGaN Channel

Al0.75Ga0.25N/n-AlxGa1-xN/Al0.75Ga0.25N/AlN metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs), grown on a SiC substrate, with step-graded Si-doped (n = 3 × 1018 cm-3) widegap AlxGa1-xN channel and Al2O3 gate-dielectric are investigated. Increased Al-compositions with x = 0.25, 0.5, and 0.75 towards the buffer were devised in the composite widegap channel. The high-k Al2O3 dielectric/passivation layer was grown by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) method. Experimental comparisons were made with respect to a conventional Schottky-gate HFET.The epitaxial structure of the studied Al2O3-dielectric Al0.75Ga0.25N/n-AlxGa1-xN/Al0.75Ga0.25N/AlN MOS-HFET (sample A) and Schottky-gate HFET (sample B). Both devices have the identical epitaxial structure grown on a SiC substrate by using a low-pressure metal-organic chemical vapor deposition (LP-MOCVD) system. The layer structure includes an undoped AlN buffer, a 20-nm undoped Al0.75Ga0.25N barrier, a 150-nm step-graded Si-doped (n = 3 × 1018 cm-3) AlxGa1-xN channel (x = 0.25, 0.5, and 0.75), and a 20-nm undoped Al0.75Ga0.25N barrier. Standard photolithography and lift-off techniques were used for device processing. For sample B, mesa etching was performed with respect to a 100-nm thick Ni barrier by using an inductively coupled-plasma reactive ion etcher (ICP-RIE). Flow rates were tuned and set at 10 sccm and 20 sccm for the mixed etching gases of BCl3 and Cl2, respectively. The 20-nm undoped Al0.75Ga0.25N barrier was etched away before deposition of source/drain electrodes. Ti (10 nm)/Al (50 nm)/Ni (10 nm)/Au (50 nm) were evaporated. The source/drain ohmic contacts were formed by annealing the sample for 25 seconds at 900°C by using a rapid thermal annealing (RTA) system (ULVAC MILA-5000). Then, 30-nm thick Al2O3 layer was deposited on the Al0.75Ga0.25N barrier by using the USPD technique. Finally, gate electrode of Ni (100 nm)/Au (50 nm) was evaporated after gate photolithography. As for sample A, the gate electrode was formed directly on the surface of Al0.75Ga0.25N barrier without oxide deposition.Improved device performance of the present MOS-HFET design have been obtained, including maximum drain-source current density (IDS, max ) of 130.1 A/mm at VGS = 10 V and VDS = 20 V, IDS at VGS = 0 V (IDSS0 ) of 83.1 mA/mm, on/off-current ratio (Ion /Ioff ) of 1.4 × 107, maximum extrinsic transconductance (gm, max ) of 11.8 mS/mm, two-terminal off-state gate-drain breakdown voltage (BVGD ) of -404 V, and three-terminal on-state drain-source breakdown voltage (BVDS ) of 364 V at 300 K. The present MOS-HFET design has also shown high spectral responsivity (SR) of 737 A/W under 250-nm deep-UV radiation at 300 K.

Millimeter-Wave Donor–Acceptor-Doped DpHEMT

In this article, we present GaAs millimeter-wave pseudomorphic high-electron-mobility transistor (pHEMT) using sophisticated AlGaAs-InGaAs–GaAs heterostructure with an In0.22Ga0.78As quantum well located inside an external quantum well formed by space charge regions in AlGaAs layers. In a heterostructure with this design, high mobility [5800 cm2/( $\text {V}\cdot \text {s}$ )] and high density ( ${4.7}\times {10}^{{12}}$ cm $^{-{2}}$ ) of two-dimensional electron gas at 300 K were obtained. The localization of hot electrons in an external quantum well leads to an increase in their drift velocity and to enhance the dc and RF performances of the device. A field-effect transistor based on such a heterostructure with a T-gate of $0.14~\mu \text{m}$ in length shows a specific current density of about 0.7 A/mm, transconductance of about 250 mS/mm, gate–drain breakdown voltage in the range 23–31 V, which corresponds to more than 2 W/mm specific output RF power according to a simple estimate. The transistor demonstrates impressive RF characteristics, the maximum stable gain (MSG) of more than 15 dB at 40 GHz and more than 10 dB at 67 GHz, ${f}_{t} = {45}$ GHz and ${f} _{\text {max}} = {250}$ GHz. The MSG at 40 GHz increases with increasing distance between the gates in the drain and is almost constant in the range 25–55 GHz.

Improved Electrical and Deep-UV Sensing Characteristics of Al2O3-Dielectric AlGaN/AlN/SiC MOS-HFETs

Improved electrical and deep-UV sensing characteristics of Al2O3-dielectric Al0.75Ga0.25N/n-AlxGa1−xN/Al0.75Ga0.25N/AlN metal-oxide-semiconductor hetero-structure field-effect transistors (MOS-HFETs), grown on a SiC substrate, with an AlGaN ultra-widegap channel design are investigated. 30 nm thick high-k Al2O3 was deposited as both the gate oxide and surface passivation layer by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) method. Improved device characteristics, including maximum drain-source current density (IDS,max) of 130.1 mA mm−1, maximum extrinsic transconductance (gm,max) of 11.8 mS mm−1, on/off-current ratio (Ion/Ioff) of 1.4 × 107, gate-voltage swing (GVS) linearity of 5.8 V, two-terminal off-state gate-drain breakdown voltage (BVGD) of −404 V, and three-terminal on-state drain-source breakdown voltage (BVDS) of 364 V at 300 K are obtained for the present MOS-HFET. The device has demonstrated high spectral responsivity (SR) of 737 A W−1 under 250 nm deep-UV radiation.

(Invited) Band Line-up of High-k Oxides on GaN

GaN high electron mobility transistors (HEMTs) have been commercially available for over 10 years, however gate leakage limits their performance. The HEMT has the advantages of offering simple associated circuit design and fail-safe operation. Currently the GaN based Metal-Insulator-Semiconductor (MIS)-HEMT device is seen to demonstrate superior performance in power electronics applications over the Schottky gate counterpart, due to its inherently lower gate leakage current, together with the ability to provide larger forward gate voltage swing by engineering the threshold voltage between depletion and enhancement mode operation and also an improved gate-drain breakdown voltage. High band gap gate dielectric materials are preferable as they can provide higher tunnelling barriers for electrons and holes, which result in lower gate leakage current. On the other hand, high dielectric constant (high-k) material is also necessary for improved electrostatic control over the channel and improved on-current, which in-turn results in higher transconductance. The quality of the gate dielectric and the dielectric/GaN interface plays a central role in device performance due to potential problems arising from fixed oxide charge, border and interface traps. The leakage current issue has been mitigated using Al2O3, SiO2 and Si3N4, but comes at a cost of device transconductance degradation and undesirable threshold voltage shifts. A number of high-k dielectrics such as HfO2, ZrO2, Ta2O5, LaLuO3 and TiO2 have been investigated to resolve this issue.In this paper, engineered high-k oxide approach will be presented where Al2O3 is doped with Ti to boost oxide permittivity value while preserving band offsets, as well as Ga2O3 doped with Al to increase band gap and maintain good interface quality with GaN. X-ray photoelectron spectroscopy, inverse photoemission spectroscopy and variable angle spectroscopic ellipsometry were used to estimate the band alignment and interfacial properties. TiO2 is very attractive due to having reported k of 20-86 but has a small band gap of 3.4 eV for amorphous and 3.26 eV for anatase TiO2, being far too narrow to obtain a sufficient band offset with GaN of >1 eV. Al2O3 on the other hand has a sufficient band offset of 1.8-2 eV with AlGaN but suffers from a low dielectric constant of 7.5-9.6 depending on the growth method. The previous studies of Al2O3/TiO2 nanolaminates show favourable properties, in particular the optimum between the rather high-k (~30) and low leakage current has been observed for 30% Ti. No band offset study has been reported for TixAl1-xOy/GaN system. We will show full band alignment analysis of TixAl1-xOy/GaN fabricated by atomic layer deposition (ALD) on GaN for the range of Ti composition of up to 40%. Furthermore, a trivalent Ga2O3 is a promising oxide due to its band gap of 4.4 - 4.9 eV and a moderate permittivity of 10-14. Thermally oxidized Ga2O3 has shown valence band offset of 1.4 eV to GaN. A drawback of thermal oxidation is a growth of non-stoichiometric oxide at GaN interface reported to be as Ga(x+2)N3xO(3-3x). In contrast, ALD has been shown to produce Ga2O3 with no interfacial layer with GaN and low density of interface states of 3.62x1011 cm-2eV-1. Despite the good interface with GaN, the issue with using Ga2O3 is a small conduction band offset (< 1 eV) leading to high leakage current. In this paper, Al doped Ga2O3 have been fabricated using ALD on GaN. The results point to substantial increase of the band gap from ~4.6 eV for Ga2O3 to 5.9 eV for the 1:19 Ga:Al doped sample and a strong suppression of leakage current for Al doped Ga2O3 MIS capacitors. The results are of importance for future GaN HEMTs. Acknowledgement. The work has been conducted under the University Grants Commission - UK-India Education Research Initiative (UGC-UKIERI) joint research programme UKIERI III, project numbers IND/CONT/G/17-18/18 and F.No.184-1/2018(IC), titled “Dielectric engineering on GaN for sustainable energy applications” funded by the British Council. The authors also acknowledge UKRI GCRF GIAA award 2018/19 and “Digital in India” project no. EP/P510981/1, both funded by the EPSRC, UK.

Al0.75Ga0.25N/AlxGa1-xN/Al0.75Ga0.25N/AlN/SiC Metal–Oxide–Semiconductor Heterostructure Field-Effect Transistors With Symmetrically-Graded Widegap Channel

Novel Al 0.75 Ga 0.25 N/Al x Ga 1-x N/Al 0.75 Ga 0.25 N/AlN metal-oxide-semiconductor heterostructure field-effect transistors (MOS-HFETs) with symmetrically-graded widegap Al x Ga 1-x N channel (x = 0.75 → 0.25 → 0.75) grown on a SiC substrate are investigated. Al 2 O 3 was devised as the gate dielectric by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) technique. Device characteristics with respect to different etch depths of the source/drain recesses were studied. For a 2-μm gate length (L G ), the present widegap V-shape-channel MOS-HFET has shown improved maximum drain-source current density (I DS,max ) of 299.3 A/mm at V DS = 20 V, I DS density at V GS = 0 V (I DSS0 ) of 153.9 mA/mm, on/off-current ratio (I on /I off ) of 1.4 × 10 7 , extrinsic transconductance (g m , max ) of 16.7 mS/mm, two-terminal off-state gate-drain breakdown voltage (BV GD ) of -379 V, and three-terminal on-state drain-source breakdown voltage (BV DS ) of 339 V. Besides, superior deep-UV sensing performance with high spectral responsivity (SR) of 1780 (810.2) A/W at wavelength λ = 250 (300) nm are also achieved.

Effects of surface passivation and temperature on AlGaAs/InGaAs high-electron mobility transistor

The effects of surface passivation on AlGaAs/InGaAs/GaAs HEMTs using silicon nitride are presented. The passivated HEMT exhibited stable operation at elevated temperatures up to 480 K with excellent pinch-off characteristics. Furthermore, the interesting and anomalous dependence of the two-terminal gate–drain breakdown voltage on temperature is investigated. The high-speed performance of the SiNX-passivated HEMT with an fT = 20.1 GHz and an fmax = 28.5 GHz is confirmed. The experimental results also demonstrate that the addition of a SiNX passivation layer to the AlGaAs/InGaAs/GaAs HEMTs increases the three-terminal on-state and off-state breakdown voltages and increases the cutoff frequency.

Al2O3-Passivated Graded-Barrier AlxGa1-xN/AlN/GaN/Si Heterostructure Field-Effect Transistor by Hydrogen Peroxide Oxidization Method

This letter reports a novel Al2O3-passivated graded-barrier (GB) AlxGa1-xN/AlN/GaN/Si heterostructure field-effect transistor (HFET) formed by using hydrogen peroxide (H2O2) oxidization method. Different from the Al0.26Ga0.74N conventional barrier (CB), a compositionally graded AlxGa1-xN (x = 0.22∼0.3) barrier was devised to increase the Schottky-barrier height (ΦB) and improve the interfacial quality at the same time. Reduced gate leakage and enhanced device gain are further achieved by the Al2O3 passivation. The present Al2O3-passivated/unpassivated GB-HFETs (unpassivated CB-HFET) has demonstrated improved maximum drain-source current density (IDS, max) of 708/699 (654) mA/mm at VDS = 7 V, maximum extrinsic transconductance (gm, max) of 139/126 (113) mS/mm, subthreshold swing (SS) of 176/253 (274) mV/dec, on/off-current ratio (Ion/Ioff) of 3.8 × 106/1.4 × 104 (7.1 × 103), two-terminal off-state gate-drain breakdown voltage (BVGD) of −126.4/−96.8 (−89.3) V, turn-on voltage (Von) of 1.1/0.7 (0.3) V, and three-terminal on-state drain-source breakdown voltage (BVDS) of 109/89 (71) V.

Ti0.5Al0.5O-Dielectric AlGaN/GaN/Si Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors by Using Non-Vacuum Ultrasonic Spray Pyrolysis Deposition

This work investigates a Ti0.5Al0.5O-dielectric Al0.26Ga0.74N/GaN metal-oxide-semiconductor heterostructure field-effect transistor (MOS-HFET) grown on a Si substrate, prepared by using a non-vacuum ultrasonic spray pyrolysis deposition (USPD) technique. High dielectric constant (k) was characterized to be 29.1 for a 20-nm thick Ti0.5Al0.5O. Hooge coefficient (αH), low-frequency noise spectra (1/f), high/low frequency capacitance-voltage (C-V), pulse I-V measurements were also performed to investigate the improved passivation and insulation of the MOS-structure. The present MOS-HFET design has exhibited superior improvements of 23% in maximum drain-source current density (IDS, max), 25.1% in drain-source saturation current density at VGS = 0 V (IDSS0), 46.3% in two-terminal off-state gate-drain breakdown voltage (BVGD), and 65% in three-terminal drain-source breakdown voltage (BVDS), as compared to a reference Schottky-gate HFET device. Enhanced high-frequency, power, and high-temperature performances up to 450 K are also studied.

Investigations of AlGaN/GaN MOS-HEMT with Al2O3 deposition by ultrasonic spray pyrolysis method

This work investigates Al2O3/AlGaN/GaN metal-oxide-semiconductor high electron mobility transistors (MOS-HEMTs) grown on SiC substrate by using the non-vacuum ultrasonic spray pyrolysis deposition (USPD) method. The Al2O3 was deposited as gate dielectric and surface passivation simultaneously to effectively suppress gate leakage current, enhance output current density, reduce RF drain current collapse, and improve temperature-dependent stabilities performance. The present MOS-HEMT design has shown improved device performances with respect to a Schottky-gate HEMT, including drain-source saturation current density at zero gate bias (IDSS: 337.6 mA mm−1 → 462.9 mA mm−1), gate-voltage swing (GVS: 1.55 V → 2.92 V), two-terminal gate-drain breakdown voltage (BVGD: −103.8 V → −183.5 V), unity-gain cut-off frequency (fT: 11.3 GHz → 17.7 GHz), maximum oscillation frequency (fmax: 14.2 GHz → 19.1 GHz), and power added effective (P.A.E.: 25.1% → 43.6%). The bias conditions for measuring fT and fmax of the studied MOS-HEMT (Schottky-gate HEMT) are VGS = −2.5 (−2) V and VDS = 7 V. The corresponding VGS and VDS biases are −2.5 (−2) V and 15 V for measuring the P.A.E. characteristic. Moreover, small capacitance-voltage (C–V) hysteresis is obtained in the Al2O3-MOS structure by using USPD. Temperature-dependent characteristics of the present designs at 300–480 K are also studied.

Enhanced Device Characteristics of Mos-Hemts with HfO2/Al2O3 Stacked Dielectrics By Using Sputtering/Ozone Water Oxidation Techniques

Enhanced device characteristics of InGaAs/AlGaAs MOS-HEMTs with HfO2/Al2O3 stacked dielectrics by using separate RF sputtering and ozone water oxidization are investigated in this work. Improved interfacial quality is verified by 1/f spectra and C-V measurement. k values of the stacked HfO2/Al2O3 are extracted to be 21.5/9.2, respectively, and the resulted effective oxide thickness (EOT) is 5.15 nm. Excellent switching characteristics of low substhreshold slope (SS) of 70 mV/dec and high IDS on-off ratio of up to 6 orders are achieved. The present MOS-HEMT has shown comprehensive improvements in intrinsic voltage gain (AV ), high frequencies, minimum noise figure (NFmin ), output power (Pout ), and power-added efficiency (PAE) performances. Besides, hgh-temperature stability in maximum extrinsic transconductance (gm, max ), maximum IDS (IDS, max ), and gate-drain breakdown voltage (BVGD ) characteristics are also obtained. The present MOS-HEMT design is promising for high temperature and power-switching MMIC applications.

Investigations of AlGaN/AlN/GaN MOS-HEMTs on Si Substrate by Ozone Water Oxidation Method

Al0.3Ga0.7N/AlN/GaN metal-oxide-semiconductor high electron mobility transistors (HEMTs) grown on Si substrates by using ozone water oxidation method are investigated. Superior improvements of 52.2% in two-terminal gate-drain breakdown voltage (BVGD), 30.3% in drain-source current density (IDS) at VGS = 0 V (IDSS0), 43.6% in maximum IDS (IDS,max), 34.7% in maximum extrinsic transconductance (gm,max), and 52.7%/34.3% in unity-gain cutoff/maximum oscillation frequency (fT/fmax) are achieved as compared with a reference Schottky-gated HEMT. Thermal stability is studied by conducting temperature-dependent characterizations of devices at ambient temperatures of 300-550 K. Time-dependent electrical reliability analyses for the devices stressed in off-state (VGS = -20 V and VDS = 0 V) for 0-60 h and on-state (VGS = 2 V and VDS = 20 V) for 0-20 h are also made to physically investigate the dominant degradation mechanisms. Excellent reliability and thermal stability at 300-550 K are achieved by the present design.

A novel method for the fabrication of AlGaN/GaN HEMTs on Si (111) substrates

In this paper, the development of a novel manufacturing process is presented for fabricating high-quality AlGaN/GaN high-electron-mobility transistors (HEMTs) on Si (111) substrates. Various material and processing approaches regarding surface passivation, gate oxide, ohmic contact metal, and post-gate annealing are evaluated in terms of device performance. In order to achieve better immunity to current collapse effects, we conducted experiments that investigate the relationship between the AlGaN/GaN HEMTs’ electrical characteristics and different passivation films by plasma-enhanced chemical vapour deposition. In order to obtain a better ohmic contact performance, we tested a Ti/Al/Ta/Au ohmic contact metallisation scheme using different annealing temperatures and annealing times to achieve a lower contact resistance, a more proper line edge definition, and a better surface morphology. A post-gate N2 rapid thermal annealing method done after the gate metallisation process has shown better DC current–voltage output, transfer characteristics, and gate–drain breakdown voltage results compared to the as-fabricated HEMTs. A HEMT with a 0.5-μm gate length, exhibiting a maximum drain current density of 750 mA/mm, a peak transconductance of 220 mS/mm, a unity-gain cut-off frequency of 24.6 GHz, and a maximum frequency of oscillation of 45.4 GHz, was fabricated using this novel manufacturing process; the X-band power performances demonstrate a 5.8-W/mm output power density and a 51 % power-added efficiency.

A 24 W Ku band GaN based power amplifier with 9.1 dB linear gain

A Ku-band power amplifier is successfully developed with a single chip 4.8mm AlGaN/GaN high electron mobility transistors (HEMTs). The AlGaN/GaN HEMTs device, achieved by E-beam lithography г-gate process, exhibited a gate-drain reverse breakdown voltage of larger than 100V, a cutoff frequency of fT=30GHz and a maximum available gain of 13dB at 14GHz. The pulsed condition (100μs pulse period and 10% duty cycle) was used to test the power characteristic of the power amplifier. At the frequency of 13.9GHz, the developed GaN HEMTs power amplifier delivers a 43.8dBm (24W) saturated output power with 9.1dB linear gain and 34.6% maximum power-added efficiency (PAE) with a drain voltage of 30V. To our best knowledge, it is the state-of-the-art result ever reported for internal-matched 4.8mm single chip GaN HEMTs power amplifier at Ku-band.

A study of GaN MOSFETs with atomic-layer-deposited Al2O3 as the gate dielectric

Accumulation-type GaN metal-oxide-semiconductor field-effect transistors (MOSFETs) with atomic-layer-deposited Al2O3 gate dielectrics are fabricated. The device, with atomic-layer-deposited Al2O3 as the gate dielectric, presents a drain current of 260 mA/mm and a broad maximum transconductance of 34 mS/mm, which are better than those reported previously with Al2O3 as the gate dielectric. Furthermore, the device shows negligible current collapse in a wide range of bias voltages, owing to the effective passivation of the GaN surface by the Al2O3 film. The gate drain breakdown voltage is found to be about 59.5 V, and in addition the channel mobility of the n-GaN layer is about 380 cm2/Vs, which is consistent with the Hall result, and it is not degraded by atomic-layer-deposition Al2O3 growth and device fabrication.

AZO-Gated Al[sub 0.2]Ga[sub 0.8]As∕In[sub 0.2]Ga[sub 0.8]As High Electron Mobility Transistors

This article reports on a high transparency aluminum-doped zinc oxide (AZO)-gated Al 0.2 Ga 0.8 As/In 0.2 Ga 0.8 As high electron mobility transistor. The present device has demonstrated an improved intrinsic voltage gain (A v ) of 257 and a superior two-terminal gate-drain breakdown (turn-on) voltages of -63 (3.4) V at 300 K compared to a conventional Au-gated device with the same gate dimensions of 1 × 100 μm. The AZO gate shows a high transmittance of 88-98% for the wavelengths of 400-900 nm. Optical sensing characteristics and accurate on-device photoluminescence probing are also investigated.

Improvements on high voltage performance of power static induction transistors

A novel structure for designing and fabricating a power static induction transistor (SIT) with excellent high breakdown voltage performance is presented. The active region of the device is designed to be surrounded by a deep trench to cut off the various probable parasitical effects that may degrade the device performance, and to avoid the parallel-current effect in particular. Three ring-shape junctions (RSJ) are arranged around the gate junction to reduce the electric field intensity. It is important to achieve maximum gate-source breakdown voltage BVGS, gate-drain breakdown voltage BVGD and blocking voltage for high power application. A number of technological methods to increase BVGD and BVGS are presented. The BVGS of the power SIT has been increased to 110 V from a previous value of 50–60 V, and the performance of the power SIT has been greatly improved. The optimal distance between two adjacent ring-shape junctions and the trench depth for the maximum BVGS of the structure are also presented.

Experimental and numerical analysis of the multi-recessed gate structure for microwave silicon carbide power MESFETs

This paper reports that multi-recessed gate 4H-SiC MESFETs (metal semiconductor filed effect transistors) with a gate periphery of 5-mm are fabricated and characterized. The multi-recessed region under the gate terminal is applied to improve the gate-drain breakdown voltage and to alleviate the trapping induced instabilities by moving the current path away from the surface of the device. The experimental results demonstrate that microwave output power density, power gain and power-added efficiency for multi-finger 5-mm gate periphery SiC MESFETs with multi-recessed gate structure are about 29%, 1.1dB and 7% higher than those of conventional devices fabricated in this work using the same process.