GaAs Pseudomorphic HEMT Research Articles

A High-Efficiency 28 GHz/39 GHz Dual-Band Power Amplifier MMIC for 5G Communication

A high-efficiency 28 GHz/39 GHz concurrent dual-band power amplifier (PA) is proposed using the 90 nm GaAs pseudomorphic high-electron mobility transistor (pHEMT) process for the millimeter-waveband fifth generation (5G) communication application in this letter. Its high efficiency is achieved by adopting a low-loss dual-band output matching network (OMN) and employing a large power push ratio (3:1) for the driver stage and the output stage under the same bias voltage. The dual-band PA has the measured gain of 19.1 and 20.3 dB, as well as the power added efficiency (PAE) of 51.3&#x0025; with the 23.8-dBm output power and 49.5&#x0025; with the 23.7-dBm output power at the 3 dB compression point (<inline-formula> <tex-math notation="LaTeX">$P_{\mathrm {3\,dB}}$ </tex-math></inline-formula>), at 29.6 and 39 GHz, respectively. The area of the proposed dual-band PA is 1.45 mm <inline-formula> <tex-math notation="LaTeX">$\times1.2$ </tex-math></inline-formula> mm including pads.

A Ku-Band GaAs Multifunction Transmitter and Receiver Chipset

This paper presents a Ku-band monolithic multifunction transmitter and receiver chipset fabricated in 0.25-μm GaAs pseudomorphic high-electron mobility transistor technology. The chipset achieves a high level of integration, including a 4-bit 360° digital phase shifter, 5-bit 15.5-dB digital attenuator, amplifier and 9-bit digital serial-to-parallel converter for digital circuit control. Since the multifunction chipset includes a medium power amplifier and a low-noise amplifier, it features high P1dB and low noise figures over the full Ku-band frequencies. The multifunction transmitter shows a peak gain of 16.5 dB with output P1dB of 19.2 dBm at 15 GHz. The multifunction receiver shows a peak gain of 17.3 dB with noise figure of 2.5 dB at 15 GHz. The attenuation range is 15.5 dB with a step of 0.5 dB and the phase shift range is 360° with a step of 22.5°. Each chip area of the transmitter and receiver is 4.2 × 2.8 mm2.

Microwave Linear Characterization Procedures of On-Wafer Scaled GaAs pHEMTs for Low-Noise Applications

This contribution deals with the microwave linear characterization and noise figure measurement of four on-wafer GaAs pseudomorphic high-electron mobility transistors having scaled gate widths. The proposed measurement campaign has been fulfilled in two different laboratories: The University of Messina, Italy and US Naval Research Laboratory, Washington, DC, USA. Two equivalent approaches have been straightforwardly employed: a standard tuner-based technique and a novel tuner-less technique. The effectiveness of the novel technique has been confirmed as carried out independently by the two laboratories, evidencing the benefits of both techniques. The proposed experimental activity highlights the applicability of the tunerless technique for the noise characterization of advanced on-wafer devices without the constraint imposed by the addition of a source tuner to the standard measurement setup.

Second-Harmonic Injection Linearization of Millimeter-Wave FET Resistive Mixers

This letter demonstrates the application of the second-harmonic injection linearization technique in a field-effect transistor (FET) resistive mixer operating at $Ka$ -band. The single-ended mixer uses a 0.15- $\mu \text{m}$ gallium arsenide (GaAs) pseudomorphic high electron-mobility transistor (pHEMT) at its core. Compared to the same mixer without the second-harmonic injection, the linearized mixer achieves an improvement of up to 8 dB in the third-order intermodulation (IM3) levels while leaving the fundamental output power and noise figure unaffected. To the best of authors’ knowledge, this is the first demonstration of the technique with a mixer operating at millimeter-wave frequencies.

Thermal Burnout Effect of a GaAs PHEMT LNA Caused by Repetitive Microwave Pulses

The thermal burnout effect of a gallium arsenide (GaAs) pseudomorphic high electron mobility transistor (PHEMT) low-noise amplifier (LNA) caused by repetitive microwave pulses is studied by theoretical analyses, simulations, and experiments. The theoretical model for thermal burnout under a single microwave pulse injection is first acquired by analyzing the power absorption in the electrical procedure and the heat distribution in the thermal procedure. By adopting two new assumptions and using the linear superposition theorem, the theoretical model for thermal burnout under a repetitive microwave pulse injection is acquired by further extension. Through derivation, the analytical relationship among the thermal burnout power threshold, the pulsewidth in a cycle, the pulse repetition frequency (PRF) and the pulse number is acquired. Because some assumptions and approximations are adopted, both the pulsewidth in a cycle and the total repetitive microwave pulselength must be between 10-ns scale and 1-μs scale. It shows that the theoretical results agree well with the simulation and experimental results. A minimum of two sets of data by experiment or simulation are needed to fit the analytical relationship. Therefore, experimental or simulation costs can be substantially reduced, and a helpful reference for

Analysis and Design of a 0.1–23 GHz LNA MMIC Using Frequency-Dependent Feedback

In this brief, a 0.1 to 23 GHz low-noise amplifier (LNA) employing a frequency-dependent feedback loop (FDFL) is presented. As predicted theoretically, the optimized FDFL enhances the bandwidth and the gain flatness in desired frequency band through purposely designing the feedback characteristics from negative to positive corresponding to the frequency. Based on the theoretical analysis of bandwidth enhancement, noise characteristic, and linearity of FDFL, an ultra-broadband LNA, utilizing the proposed technique, is designed and verified experimentally by a three-stage LNA chip implemented using a 0.15- $ {\mu }\text{m}$ GaAs pseudomorphic high electron-mobility transistor process. Measurement results show that the LNA obtains an average gain of 27.4 dB and noise figure of 2.7 to 4 dB in a frequency band from 0.1 to 23 GHz, with a compact chip area of only 1.36 mm2, including input/output testing pads.

A 0.1–52-GHz Triple Cascode Amplifier With Resistive Feedback

In this letter, a 0.1–52-GHz amplifier is designed and fabricated using a 0.15- $\mu \text{m}~{E}$ -mode GaAs pseudomorphic high electron-mobility transistor (pHEMT) process. To extend the gain bandwidth, a triple cascode amplifier with resistive feedback is employed. Moreover, by introducing several inductors between the transistors, the gain flatness and the noise figure are significantly enhanced. The measurement results indicate that the designed amplifier shows a 20.5-dB average gain, 3.9–6.2-dB noise figure, 5–12-dBm OP1 dB, and 14–22.5-dBm OIP3 in the frequency range from 0.1 to 52 GHz, respectively. The fabricated amplifier occupies a chip area of 1.6 mm $\times \,\, 0.89$ mm including the testing pads.

Resonance gate bias cascode class-E power amplifier in GaAs pHEMT technology

In this paper, switching behavioural of cascode transistor in class-E cascode structure is improved by resonance gate bias (RGB) technique. The proposed technique can be used to increase supply voltage of a cascode class-E power amplifier (PAs) in order to achieve high output power and efficiency. Output power of class-E PAs are limited due to drain–gate stress caused by the switching transient voltages. The RGB technique relaxes the supply voltage limitation due to breakdown voltage (VBD) of the transistor. In addition, reactance compensation components technique is employed to achieve high-power and wide-band class-E PA. To show validity of the proposed RGB technique, two reliable 1-W high-voltage and high-efficiency class-E PAs are fabricated in a 0.25 μm GaAs pseudomorphic high-electron mobility transistor technology. The 1.8 GHz class-E PA achieves 52% power added efficiency (PAE) and 30.6 dBm output power. The designed 2–3 GHz class-E PA has 45% PAE at output power of 30 dBm.

An Energy-Efficient &lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$Ka$ &lt;/tex-math&gt; &lt;/inline-formula&gt;/&lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$Q$ &lt;/tex-math&gt; &lt;/inline-formula&gt; Dual-Band Power Amplifier MMIC in 0.1-&lt;inline-formula&gt; &lt;tex-math notation="LaTeX"&gt;$\mu$ &lt;/tex-math&gt; &lt;/inline-formula&gt;m GaAs Process

An energy-efficient ${Ka}$ / ${Q}$ dual-band power amplifier (PA) is proposed using 0.1- $\mu \text{m}$ GaAs pseudomorphic high-electron mobility transistor process in this letter. The PA consists of two stages, and its high efficiency is enhanced by employing a low-loss dual-band output matching network, and adopting different supply voltages for the driver stage and the output stage. Owing to the proposed matching circuits, the PA achieves a measured small signal gain of 19.3 and 15.5 dB, output power of 22.5 and 22.7 dBm, and peak power-added efficiency of 38% and 40% at 29.5 and 47 GHz, respectively. To our best knowledge, this is the state-of-the-art high efficiency dual-band PA operating at ${Ka}$ -band and ${Q}$ -band.

The influence of microwave pulse width on the thermal burnout effect of an LNA constructed by a GaAs PHEMT

In this paper, the influence of microwave pulse width on the thermal burnout effect of a low noise amplifier (LNA) constructed by a GaAs pseudomorphic high electron mobility transistor (PHEMT) is theoretically analyzed and further verified with simulation and experimental results. By analyzing the electrical procedure and the thermal procedure, a theoretical model of the thermal burnout effect of the studied LNA is established according to the properties of microwave pulses and the structure of the LNA and GaAs PHEMT. Based on the theoretical model, the analytical relationship between the microwave pulse width and the thermal burnout power threshold is further obtained. According to the limitations caused by the approximations in the process of modeling, the available microwave pulse width range for the proposed analytical relationship is more than a nanosecond level and less than a microsecond level. The coefficients of the proposed analytical relationship can be determined by fitting at least two sets of simulation or experimental results, which can greatly reduce the simulation or experimental costs. Finally, the analytical relationship is verified by simulation and experimental results. The results show that the proposed analytical relationship is suitable to estimate the thermal burnout power threshold for a given microwave pulse width within the limit of microwave pulse width range.

A 270 GHz × 9 Multiplier Chain MMIC With On-Chip Dielectric-Resonator Antenna

This paper presents a 270 GHz × 9 multiplier chain with on-chip dielectric-resonator antenna (DRA) developed in a commercial 0.1- μ m GaAs pseudomorphic high electron-mobility transistor technology with cutoff frequencies $f_{{\rm{T}}}\, / f_{{\rm{MAX}}}$ of 130/180 GHz. The multiplier integrates a W-band tripler followed by a driver amplifier, a J-band tripler, and an on-chip antenna. The multiplier breakout achieves a measured peak output power of –4 dBm at 270 GHz and a 3-dB bandwidth of 40 GHz (from 255 to 295 GHz). By introducing the high-pass matching network into the multiplier design, the in-band unwanted harmonic suppression is improved to be over 40 dBc within the entire bandwidth. The higher order mode (TE δ 13 mode) dielectric resonator is introduced in the on-chip antenna design to enhance the antenna gain and bandwidth without additional chip area consumption. The multiplier chain with the on-chip DRA has a measured EIRP of +2 dBm at 270 GHz and a 3-dB bandwidth of 33 GHz (from 258 to 291 GHz). Compared with other J-band multipliers, this paper achieves the best spurious suppression and comparable output power while using the technology with the lowest cutoff frequencies.

A general neuro-space mapping technique for microwave device modeling

Accurate modeling of nonlinear microwave devices is critical for reliable design of microwave circuit and system. In this paper, a more general neuro-space mapping (Neuro-SM) method is proposed to fulfill the needs of the increased modeling complexity. The proposed technique retains the capability of the existing dynamic Neuro-SM in modifying the dynamic voltage relationship between the coarse model and the desired model. The proposed Neuro-SM also considers dynamic current mapping besides voltage mappings. In this way, the proposed Neuro-SM generalizes the previously published Neuro-SM methods and has the potential to produce a more accurate model of microwave devices with more dynamics and nonlinearity. A new formulation and new sensitivity analysis technique are derived to train the general Neuro-SM with dc, small-, and large-signal data. A new gradient-based training algorithm is also proposed to speed up the training. The validity and efficiency of the general Neuro-SM method are demonstrated through a real 2 × 50 μm GaAs pseudomorphic high-electron mobility transistor (pHEMT) modeling example. The proposed general Neuro-SM model can be implemented into circuit simulators conveniently.

DC‐16 GHz GaAs track‐and‐hold amplifier using sampling rate and linearity enhancement techniques

A DC-16 GHz track-and-hold amplifier (THA) using 0.15-μm enhancement-mode GaAs pseudomorphic high-electron mobility transistor process is presented. A switched source follower (SSF) track-and-hold (T/H) stage is modified to enhance the sampling rate and linearity. The input-dependent timing jitter is highly reduced using the modified topology as compared to the conventional SSF T/H stage. Moreover, the even harmonics are successfully suppressed using the differential topology, and the spurious-free dynamic range (SFDR) and total harmonic distortion (THD) are improved. To widen bandwidth (BW), the input and output buffers are designed using the distributed amplifier and source follower, respectively. With a sampling rate of 13.5 GS/s, the proposed THA features a measured 3-dB BW of 16 GHz, an SFDR of 46 dB, and a THD of −45 dB.

Highly Linear Distributed Mixer in 0.25- $\mu \text{m}$ Enhancement-Mode GaAs pHEMT Technology

This letter presents the design and measured results of novel wideband, highly linear gate-pumped distributed downconverter mixers. The circuit is realized in a 0.25-μm, Enhancement-mode GaAs pseudomorphic High Electron-Mobility Transistor process which requires no negative voltage supply. Two cells with different biases in parallel are used to achieve third-order intermodulation product cancelation. Each cell utilizes the distributed topology to absorb the first-order gate-source capacitances C gs1 . Two mixers are demonstrated: 1) a single-ended (SE) mixer and 2) a single-balanced (SB) mixer. The SE and SB mixers achieve a measured third-order input intercept point above 30 dBm in the RF frequency ranges from 6-26 GHz and 6-20 GHz, respectively. Both mixers show a conversion loss of less than 10 dB. The balanced mixer exhibits more than 30 dB of LO-RF isolation.

A Wiener-Type Dynamic Neural Network Approach to the Modeling of Nonlinear Microwave Devices

A new Wiener-type dynamic neural network (DNN) approach for nonlinear device modeling is proposed in this paper. The proposed analytical formulation of Wiener-type DNN structure consists of a cascade of a simplified linear dynamic part and a nonlinear static part. The simplified linear dynamic equations are obtained by vector fitting enhancing the efficiency of the model. A new formulation and new sensitivity analysis technique is derived to train the proposed Wiener-type DNN with dc, small- and large-signal data. A new gradient-based training algorithm is also formulated to speed up the training of proposed Wiener-type DNN model. The proposed Wiener-type DNN model can be trained to be accurate relative to device data. Furthermore, the proposed Wiener-type DNN provides enhanced convergence properties over existing neural network approaches such as time delay neural network (TDNN) and TDNN with extrapolation. Application examples on modeling GaAs metal-semiconductor-field-effect transistor, GaAs high-electron mobility transistor (HEMT), and a real <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2 \times 50$ </tex-math></inline-formula> gatewidth GaAs pseudomorphic HEMT are presented. The use of Wiener-type DNN model in harmonic balance simulations demonstrates that the Wiener-type DNN is a robust method for developing models for different types of microwave devices. These models could be implemented into circuit simulators conveniently.

Transformer-Feedback Dual-Band Neutralization Technique

A dual-band neutralization technique based on the transformer feedback between the drain and the gate of a transistor is presented. The drain and gate bias lines of the transistor are realized as multiorder $LC$ networks. Transformer coupling between the inductors of the two networks can be used to concurrently neutralize the gate–drain capacitance of the transistor at multiple frequencies. Moreover, these frequencies can be placed close together to achieve wideband neutralization. A proof-of-concept dual-band 27/33-GHz amplifier is designed and implemented in a 0.1- $\mu\text{m}$ GaAs pseudomorphic high-electron mobility transistor process. The maximum gain of the transistor at the two frequency bands is improved by more than 6 dB using the neutralization technique. The amplifier exhibits a gain of 16/15 dB and a reverse isolation of 60/50 dB at the lower/upper frequency band. It consumes 24 mA from a 1-V supply.

RF Front-End Technologies--30 Years of Applied Research and Development [Book\/Software Reviews

The author, Mike Harris was a principal research engineer, division chief, and associate director in the Electro-Optical Systems Laboratory at Georgia Technical Research Institute. He has 40 years experience in semiconductor materials and device technology. He developed semiconductor processes for gallium nitride (GaN) high-electron-mobility transistors (HEMTs) and gallium arsenide (GaAs) pseudomorphic HEMTs (pHEMTs). The second author, Rick Sturdivant, has industry experience designing products for microwave and millimeter-wave systems. He developed the world’s first array module for phased-array radar. He is currently president of Microwave Packaging Technology, Inc. This book focuses on RF application-specific integrated circuit chip set design for active electronically scanned arrays (AESAs) for radar and communication applications in both transmit and receive modules. It condenses 30 years of applied research and development of RF front-end technologies. T/R modules technology topics covered in the text include an introduction to phased arrays in radar and communication systems, T/R modules, and module components; monolithic microwave integrated circuits (MMICs); T/R module packaging; RF interconnect materials; thermal management for T/R modules, and MMICs; T/R module manufacturing and testing; module costs; and next-generation T/R modules.

A 77–100 GHz power amplifier using 0.1-μm GaAs PHEMT technology

A wideband MMIC power amplifier at W-band is reported in this letter. The four-stage MMIC, developed using 0.1 μm GaAs pseudomorphic HEMT (PHEMT) technology, demonstrated a flat small signal gain of 12.4 ± 2 dB with a minimum saturated output power (Psat) of 14.2 dBm from 77 to 100 GHz. The typical Psat is better by 16.3 dBm with a flatness of 0.4 dB and the maximum power added efficiency is 6% between 77 and 92 GHz. This result shows that the amplifier delivers output power density of about 470 mW/mm with a total gate output periphery of 100 μm. As far as we know, it is nearly the best power density performance ever published from a single ended GaAs-based PHEMT MMIC at this frequency band.

A $K$ -Band High Efficiency High Power Monolithic GaAs Power Oscillator Using Class-E Network

This letter presents design of a K-band high power high efficiency monolithic GaAs power oscillators using class-E load network with finite dc-feed inductance. To further extend the operation frequency up to millimeter-wave band with high efficiency, the core transistor is operated in the saturated region with overdriven condition to obtain the bifurcated current waveform. The proposed power oscillator is fabricated using a 0.15- $\mu \text {m}$ GaAs pseudomorphic high-electron mobility transistor process, and it features a tuning range from 23.5 to 24.5 GHz, a peak efficiency of 19%, a maximum output power of 21 dBm, and a phase noise of −106.3 dBc/Hz at 1-MHz offset.

Influence of the external condition on the damage process of the GaAs pseudomorphic high electron mobility transistor induced by the electromagnetic pulse

Electronic system and device are vulnerable under intensive electromagnetic pulse (EMP) environment, where low noise amplifer (LNA) is a typical sensitive instance for electromagnetic energy. This work focuses on the EMP-induced damage effect of GaAs pseudomorphic high electron mobility transistor (PHEMT), which is the core part of LNA. Using the simulation softeware Sentaurus TCAD, an EMP-induced damage model of the GaAs PHEMT is established in this paper, and verified through the experimental result. It is shown that the damage position of the device under the injection EMP exists in the center area under gate terminal. Based on this model and aiming at EMP parameters and external resistances, the influence of the external conditions on the damage effect of the device is investigated. The results indicate that the damage time is related to EMP parameters obviously:1) the damage time is inversely proportional to EMP amplitude since higher power density is absorbed under a stronger EMP; 2) the damage time is in direct proportion to signal rising time since the breakdown time is postponed under EMP with a slower rising edge. Furthermore, it is found that a load resistor is able to weaken current channel which is effective in delaying the damage process, and this effect is more obvious, with load resistor connected with source terminal. It should be noted that the results are beneficial to and valuable in hardening method against EMP of semiconductor devices. It is feasible to design external circuit protection units, aiming at attenuating signal amplitude and increasing the rising time of injected pulse. Another effectual approach is to enlarge the source series resistance under the premise of the performance meeting the requirements.