GaAs FET Research Articles

Analysis of Removal of Surface-State-Related Lags and Current Slump in GaAs FETs

Two-dimensional transient analysis of field-plate GaAs MESFETs is performed by considering surface states in the region from the gate toward the drain. Quasi-pulsed current-voltage curves are derived from the transient characteristics. It is shown that drain lag and current slump because of surface states are reduced by introducing a field plate longer than the surface-state region. Dependence of drain lag, gate lag, and current slump on the field-plate length and SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> passivation layer thickness is studied, indicating that the lags and current slump can be completely removed in a case with a thin SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> layer.

Single-Pole Double-Throw Switches for 2.4 GHz Transceiver in Wireless Communication Applications

The aim of this paper is to present several active types of compact SPDT switches operating at 2.4 GHz and then to compare and interpret the results. An active inductor loaded switch, operating at 2.4 GHz, was designed, and then this switch was simulated with AWR Microwave Office Software, using Moment Method. A 2.4-GHz single-pole double-throw (SPDT) switch with an insertion loss of −5 dB, a 2.4 GHz SPDT switch with PIN diode having an insertion loss of −6 dB and 2.4 GHz SPDT switch with GaAs FETs with an insertion loss of −5.5 dB was implemented using 8 V. The -24 dB return loss in the pass band is the best result for GaAs FETs. So SPDT switch using FET design is better for wireless communications. The other simulation performances of the switches are summarized in the list. A good RF performance has been achieved in the designed SPDT switch based on an active switch. The proposed switch could be used for 802.11b wireless local area network applications.

Arbitrary Waveform Generator Based on GaAs FET and Tapered Micro-Strip Line

In order to improve the output power of laser pulse in the inertia confinement fusion experiment, an arbitrary waveform generator is fabricated to shape the laser pulse. The arbitrary waveform generator is based on the impedance tapered micro-strip line technology and GaAs Field Effect Transistor set which has a good ability of generating voltage-controlled current. With the impedance tapered micro-strip line technology, the arbitrary waveform generator generates shaping electrical pulse with duration less than 10 ns, 330 ps time-domain adjustment. We use the shaping electrical pulse to modulate semiconductor laser which has the characteristic of direct modulate, the experiment results show the shaped laser pulse is obtained based on the shaping electrical pulse.

A Novel and Single Chip Tri-Band Low-Noise Amplifier for Wlan, Wifi and Wimax Receivers

In first stage of each microwave receiver there is Low Noise Amplifier (LNA) circuit, and this stage has important rule in quality factor of the receiver. The design of a LNA in Radio Frequency (RF) circuit requires the trade-off many importance characteri stics such as gain, Noise Figure (NF), stability, power consumption and complexity. This situation forces designers to make choices in the design of RF circuits. In this paper the aim is to design and simulate a novel and single Chip consists of atri-band low noise amplifier (LNA)operating simultaneously atthree frequency bands1.9 GHz, 2.4 GHz and 5 GHz for WLAN, WiFi and WiMax receivers, is designed and presented in this paper. It can be usedin many applications of wireless communication(GSM, Zigbee, Bluetooth, Wi-Fi, HiperLAN, UWB, etc ...) for3G and 4G networks. The proposed circuit is based on two amplifiers, dual-band and simple band, with transistor GaAs FET type ATF 10136 that has a better performance,successful integrationof feasibility and a low price compared with other technologies.Simulations of theoperation of the amplifierwere performed with the software Agilent Advanced Design System (ADS) and Ansoft software and performance of the amplifier were recordedand analyzed. A single stage LNA has successfully been designed with 29.3dB, 24.56dB and 11.93dB with noise figure of 0.44dB, 0.49dB and 4.42dB respectively at three frequency bands1.9 GHz, 2.5 GHz and 5 GHz.

Design and Implementation of Doherty Power Amplifier of Global System Mobile (GSM) of Base station

Power amplifier is the main component of wireless communication system. This paper presentsthe efficiency improvement of linear Power amplifier for GSM base station using Doherty Power Amplifier (DPA). ADPA operating at 900 MHz and a supply voltage of (2.5-3)V. The DPA is a combination of a carrier amplifier biased to class AB mode and a peaking amplifier biased to class C mode. Each amplifier was design by GaAs FET using advance design system software package (ADS). The simulation results of DPA are compared with class AB power amplifier that ashow improvement in power added efficiency at output power with acceptable power gain. Keywords:Doherty Power Amplifier, GaAs FET,Efficiency, GSM,ADS software.

Neutron and proton tests of different technologies for the upgrade of cold readout electronics of the ATLAS Hadronic End-cap Calorimeter

The expected increase of total integrated luminosity by a factor ten at the HL-LHC compared to the design goals for LHC essentially eliminates the safety factor for radiation hardness realized at the current cold amplifiers of the ATLAS Hadronic End-cap Calorimeter (HEC). New more radiation hard technologies have been studied: SiGe bipolar, Si CMOS FET and GaAs FET transistors have been irradiated with neutrons up to an integrated fluence of 2.2 · 1016 n/cm2 and with 200 MeV protons up to an integrated fluence of 2.6 · 1014 p/cm2. Comparisons of transistor parameters such as the gain for both types of irradiations are presented.

Design and Performance of a 600-W $C$-Band Amplifier Using Spatially Combined GaAs FETs for Satellite Communications

This paper describes the design and performance of a C-band amplifier with over 600 W of saturated output power. This amplifier is intended for use in commercial broadcast satellite uplink base stations. The amplifier uses spatial power combining to combine the output powers of sixteen internally matched 45-W GaAs FETs. The amplifier also comprises pre-amplification and driver amplification stages, a level control variable attenuator, and a predistortion linearizer. The unit also includes a power supply as well as a user monitor and control interface. We will present various measures of this amplifier's linearity performance, demonstrating its suitability for use in broadcast applications. Finally, we will present results from power combining two of these amplifiers, resulting in a solid-state amplifier with 1.4 kW of saturated C-band output power.

펄스 폭 가변을 이용한 X-대역 고효율 60 W 전력 증폭 모듈 설계

본 논문에서는 반도체형 전력 증폭기의 바이어스를 개선하기 위하여 순차 제어 회로와 펄스 폭 가변 회로를 적용한 X-대역 60 W 고효율 전력 증폭 모듈을 설계하였다. 순차 제어 회로는 전력 증폭 모듈을 구성하는 각 증폭단의 GaAs FET의 드레인 전원을 순차적으로 스위칭하도록 회로를 구성하였다. 드레인 바이어스 전원의 펄스 폭을 RF 입력 신호의 펄스 폭보다 넓게 하여 전력 증폭 모듈의 입력 신호가 있을 때만 스위칭 회로를 순차적으로 구동시킴으로써 전력 증폭 모듈의 열화에 따른 출력 신호의 왜곡과 효율을 향상시킬 수 있다. 60 W 전력 증폭 모듈은 고출력 GaAs FET를 이용하여 전치 증폭단, 구동 증폭단과 주전력 증폭단으로 구성하였으며, 주전력 증폭단은 전력결합기를 이용한 평형증폭기 구조로 구현하였다. 설계된 전력 증폭 모듈은 9.2~9.6 GHz에서 듀티사이클 10 %로 동작시켰을 때 50 dB의 전력 이득, 펄스 주기 1 msec, 펄스 폭 100 us, 출력 전력 60 W에서 동작함에 따라 펄스-SSPA 형태로 반도체 펄스 압축 레이더 등에 적용할 수 있다. In this paper, X-band 60 W Solid-State Power Amplifier with sequential control circuit and pulse width variation circuit for improve bias of SSPA module was designed. The sequential control circuit operate in regular sequence drain bias switching of GaAs FET. The distortion and efficiency of output signals due to SSPA nonlinear degradation is increased by making operate in regular sequence the drain bias wider than that of RF input signals pulse width if only input signal using pulsed width variation. The GaAs FETs are used for the 60 W SSPA module which is consists of 3-stage modules, pre-amplifier stage, driver-amplifier stage and main-power amplifier stage. The main power amplifier stage is implemented with the power combiner, as a balanced amplifier structure, to obtain the power greater than 60 W. The designed SSPA modules has 50 dB gain, pulse period 1 msec, pulse width 100 us, 10 % duty cycle and 60 watts output power in the frequency range of 9.2~9.6 GHz and it can be applied to solid-state pulse compression radar using pulse SSPA.

New pulsed measurement setup for GaN and GaAs FETs characterization

A new setup is proposed for the measurement of current–voltage pulsed characteristics of electron devices. The main advantages of the system consist in: shorter pulse widths through generation in a 50-Ω environment, simple average current monitoring through separation of the direct and alternate current paths, setting of average voltage values independently of pulse amplitudes and duty cycle, and stability of the setup guaranteed by wide-band dissipative terminations. The system is used for the characterization of dispersive effects due to carrier energy traps and thermal phenomena in GaAs and GaN on SiC field effect transistors. The basic differences between the two technologies are highlighted in the paper.

An implementation of 60W X-band Cascade SSPA for Marine Radar System

In this paper, An X-band solid state power amplifier(SSPA) for pulse compressed microwave signal with 60Watt power and power added efficiency(PAE) above 30% is described. Designed 60Watt high power amplifier(HPA) was implemented by cascade coupled amplifiers, and it is consisted on three stage drive amplifiers with internally matched GaAs FET and one stage main power amplifier with an internally matched GaN HEMT. The designed SSPA has performance with more than total power gain 37dB and output power 48dBm(60-W) in condition of frequency range , pulse period width under 1ms and duty cycle under 10%. The implemented SSPA can apply to high quality digital marine radar applications with pulse compression technique.

밀리미터파 대역 제2고조파 고효율 생성을 위한 부하 임피던스의 최적화 방법

The objective of this paper is to present a quantitative analysis leading to the assessment of optimum terminating impedances in the design of active frequency multipliers. A brief analysis of the basic principal of the GaAs FET frequency multiplier is presented. The analysis is outlined in bias optimization and drive power determination. Utilizing the equivalent circuit model of GaAs FET, we have simulated the optimized load impedance for the maximum output of the active frequency multipliers. The C-class and reverse C-class frequency doublers have been fabricated and the load impedances have been measured. The experimental results are in good agreement with the estimated results in the simulation with the accuracy of 90%.

펄스 변조 및 전원 스위칭 방법을 혼용한 X-대역 50 W Pulsed SSPA 설계 및 제작

본 논문에서는 레이더 시스템에 적용이 가능한 50 W 출력을 가지는 X-대역 pulsed SSPA(Solid State Power Amplifier)를 설계 및 제작하였다. SSPA를 펄스 모드로 동작시키는 방법으로 펄스 변조 방법과 전원 스위칭 방법을 혼용한 방법을 제안하였다. SSPA는 구동 증폭기, 고출력 증폭기, 펄스 변조기로 구성되며, 충분한 이득과 출력 크기를 얻기 위해 25 W GaAs FET 4개를 병렬 구조로 구성하였다. 측정 결과 1.12 GHz 대역폭에서 출력 50 W, 이득 44.2 dB의 성능을 가졌다. 또한, pulse droop은 1 dB 이하로 설계 목표를 만족하였으며, 12.45 ns 이하의 상승/하강 시간을 가졌다. 제작된 X-대역 pulsed SSPA 크기는 <TEX>$150{\times}105{\times}30\;mm^3$</TEX>로 매우 작은 크기를 가졌다. In this paper, a X-band 50 W pulsed solid state power amplifier(SSPA) is designed and fabricated for radar systems. The SSPA consists of a driver amplifier, a high power amplifier, and a pulse modulator. The high power stage employes four 25 W GaAs FET to deliver 50 W at X-band. To meet the stringent target specification for the SSPA, we used a new hybrid pulse switching method, which combine the advantage of pulse modulation and bias switching method. The fabricated SSPA shows a power gain of 44.2 dB, an output power of 50 W over a 1.12 GHz bandwidth. Also, pulse droop < 1 dB meet the design goals and a rise/fall time is less than 12.45 ns. Fabricated X-band pulsed SSPA size is compact with overall size of <TEX>$150{\times}105{\times}30\;mm^3$</TEX>.

On-Chip Temperature Compensation Active Bias Circuit Having Tunable Temperature Slope for GaAs FET MMIC PA

On-Chip Temperature Compensation Active Bias Circuit Having Tunable Temperature Slope for GaAs FET MMIC PA

고조파 제어 회로를 이용한 X-대역 전력 증폭기의 효율 개선에 관한 연구

본 논문에서는 간단하면서도 효과적인 능동적인 로드 풀(active load-pull) 방법을 제시하고, 고조파의 임피던스 성분을 제어하는 회로를 사용하여, X-대역 전력 증폭기의 효율을 개선시킬 수 있는 방법에 관하여 연구하였다. 제안된 능동적인 로드 풀 시스템은 크게 방향성 결합기와 위상 변위기, 단락 회로, 그리고 전력 증폭기로 구성되어 있으며, 전통적인 능동적인 로드 풀 방법에 비해 반사 계수가 1인 지점까지 임피던스를 쉽게 가져다 놓을 수 있다. 본 논문에서 사용된 소자는 Mitsubishi사의 GaAs FET인 MGF1801이며, 9 GHz의 동작 주파수에서 class-A일 때, 21.65 dBm의 출력 전력과 24.9 %의 드레인 효율을 얻었고, class-AB일 때, 21.46 dBm의 출력 전력과 53.3%의 드레인 효율을 얻었다. 고조파 제어 회로는 실험에 사용된 초고주파 부품의 주파수 대역폭의 한계로 인해, 2차와 3차 항 성분까지만 고려하여 설계하였으며, class-AB에서, 6.4 %의 효율이 증가된 것을 확인하였다. In this paper, a simple and effective active load-pull method is proposed, and the method to improve the efficiency of X-band power amplifier using harmonic control circuit is presented. The proposed active load-pull system mainly consists of directional coupler, phase shifter, short circuit, and power amplifier, and allows a user to access reflection coefficients near the edge of the Smith chart(<TEX>$\Gamma$</TEX>=1) easily. The device used in this paper is Mitsubishi's GaAs FET MGF1801, and the operating frequency of the power amplifier is 9 GHz, The amplifier had output power of 21.65 dBm and drain efficiency of 24.9 % at class-A, and had output power of 21.46 dBm and drain efficiency of 53.3 % at class-AB. Harmonic control circuit is designed only second and third harmonic components because of the bandwidth limitation of the microwave components. The drain efficiency is improved as much as 6.4 % compared with class-AB power amplifier.

The design and realization of a highly linear power amplifier module for a WiMAX/WiBro (802.16e) base station

AbstractWe have designed and realized a highly linear power amplifier module (PAM) for a WiMAX/WiBro base station using a simple linearization method. To improve the linearity of the PAM, we use large‐signal intermodulation distortion (IMD) sweet spots, which are part of the inherent properties of power transistors. These IMD sweet spots are determined by the device technologies and the bias voltage. Our PAM consists of a drive stage and a power stage. Two amplifiers are used in the drive stage, a GaAs field effect transistor (GaAs FET) and a laterally diffused metal oxide semiconductor. The linearity of the PMA can be maximally improved by the large‐signal IMD sweet spots, which are tuned by the bias voltage of the GaAs FET at the signal power input of the drive stage. Using this method, the measured adjacent channel leakage ratio and power consumption efficiency of the PAM are improved by 2.9 dBc and 5.2%, respectively. The measured error vector magnitude of the PAM is only 1.45. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1952–1955, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25374

A FLEXIBLE DUAL-INFLECTION POINT RF PREDISTORTION LINEARIZER FOR MICROWAVE POWER AMPLIFIERS

This paper presents a very ∞exible and generic design of a diode-based RF predistortion linearizer that can correct for the dual- in∞ection point type compression characteristics found in the gain proflle of metal semiconductor fleld efiect transistor (MESFET) based and Doherty power ampliflers. It consists of a circuit conflguration that has the head-tail conflguration of Schottky diodes, complemented with a p-intrinsic-n (PIN) diode in parallel, at two ports of a 90 - hybrid coupler for improving the performance of the linearizer. The use of a PIN diode in the linearizer provides it with an extra level of freedom in achieving the desired characteristic. Overall, the linearizer is equipped with three degrees of freedom and hence possesses the capability to achieve output characteristics that can be employed in linearizing various types of power ampliflers. The proposed linearizer has been shown to simultaneously improve the third- and flfth- order intermodulation distortions of a commercial ZHL-4240 gallium arsenide fleld efiect transistor (GaAs FET) based power amplifler over a 10dB power range.

Analytical Electrothermal Modelling of Multilayer Structure Electronic Devices

In this paper we present an analytical model to optimize the thermal and electrical layout for multilayer struc- ture electronic devices through the solution to the non-linear 3-D heat equation. The thermal solution is achieved by the Kirchhoff transform and the 2-D Fourier transform. The model is general and can be easily applied to a large variety of in- tegrated devices, provided that their structure can be represented as an arbitrary number of superimposed layers with a 2- D embedded thermal source, so as to include the effect of the package. Moreover, it is independent on the specific physi- cal properties of the layers, hence GaAs FETs, HBT and HEMTs as well as Silicon and Silicon-On-Insulator MOSFETs and heterostructure LASERs can be analyzed. The proposed model has been applied to a multifinger GaAs FET and to a power Si/SiGe Heterojunction Bipolar Transistor.

A BROADBAND DUAL-INFLECTION POINT RF PREDISTORTION LINEARIZER USING BACKWARD REFLECTION TOPOLOGY

This paper presents a ∞exible and generic broadband RF predistortion linearizer designed using backward re∞ection topology that can correct for the dual-in∞ection point type compression characteristics usually encountered in the gain proflle of metal semiconductor fleld efiect transistor (MESFET) based power ampliflers. It employs circuit conflguration of two parallel Schottky diodes with one p-intrinsic-n (PIN) diode in parallel, connected at two ports of a 90 - hybrid coupler. The Schottky diodes are coupled via a quarter wave transmission line segment which generates dual in∞ection points in the gain characteristics of the linearizer. The incorporation of a PIN diode helps in improving the achievable range in the gain and phase characteristics of the linearizer. Overall, the linearizer is capable of linearizing various types of power ampliflers owing to the ∞exible control on the linearizer's parameters and eventually the gain and phase characteristics of the linearizer. The proposed linearizer can be employed in the frequency range of 1.4{2.8GHz and can simultaneously improve the third- and flfth-order intermodulation distortions. The measurements carried out on a commercial ZHL-4240 gallium arsenide fleld efiect transistor (GaAs FET) based power amplifler demonstrates the broadband functionality of the proposed linearizer.

Analog Pre-Distortion Linearizer Using Self Base Bias Controlled Amplifier

An analog pre-distortion linearizer employing a radio frequency (RF) transistor with a self base bias control circuit is proposed. The self base bias control circuit extracts the envelope from the modulated input RF signal of the RF transistor and automatically controls its base current according to the extracted envelope. As a result, the proposed linearizer realizes positive gain deviation at high input power level. By adding a resistor between the RF transistor and the self base bias control circuit, the negative gain deviation can be derived. The design of the proposed lineaizer is described with taking the envelope frequency response of the self base bias control circuit into consideration. The fabricated linearizer achieves the adjacent channel power leakage ratio (ACLR) improvement of 8.1dB for a 2GHz-band, 10W-class GaAs FET high-power amplifier (HPA) with negative gain deviation for W-CDMA base stations. It also achieves the ACLR improvement of 8.3dB for a LDMOS HPA with positive gain deviation for the same application.

Subharmonic injection-locking and self-oscillating mixing

Subharmonic injection-locking and self-oscillating mixing functions of a modified Colpitts oscillator operating at 1GHz are reported. The injection-locking circuit, using a GaAs FET, is described t...