Full Subtraction Research Articles

Efficient Designs of Quantum Adder/Subtractor Using Universal Reversible Gate on IBM Q

Reversible arithmetic and logic unit (ALU) is a necessary part of quantum computing. In this work, we present improved designs of reversible half and full addition and subtraction circuits. The proposed designs are based on a universal one type gate (G gate library). The G gate library can generate all possible permutations of the symmetric group. The presented designs are multi-function circuits that are capable of performing additional logical operations. We achieve a reduction in the quantum cost, gate count, number of constant inputs, and delay with zero garbage, compared to relevant results obtained by others. The experimental results using IBM Quantum Experience (IBM Q) illustrate the success probability of the proposed designs.

Design and Implementation of an Efficient Reversible Comparator Using TR Gate

Reversible logic is a new emerging technology with many promising applications in optical information processing, low power (Complementary Metal Oxide Semiconductor) CMOS design, (De Oxy RiboNucleic Acid) DNA computing, etc. In industrial automation, comparators play an important role in segregating faulty patterns from good ones. In previous works, these comparators have been implemented with more number of reversible gates and computational complexity. All these comparators use propagation technique to compare the data. This will reduce the efficiency of the comparators. To overcome the problem, this paper proposes an efficient comparator using (Thapliyal Ranganathan) TR gate utilizing full subtraction and half subtraction algorithm which will improve the computation efficiency. The comparator design using half subtraction algorithm shows an improvement in terms of quantum cost. The comparator design using full subtraction algorithm shows effectiveness in reducing number of reversible gates required and garbage output.

Feasible Methodology for Optimization of a Novel Reversible Binary Compressor

Now a day reversible logic is an attractive research area due to its low power consumption in the area of VLSI circuit design. The reversible logic gate is utilized to optimize power consumption by a feature of retrieving input logic from an output logic because of bijective mapping between input and output. In this manuscript, we design 4 2 and 5 2 reversible compressor circuits using a new type of reversible gate. In addition, we propose new gate, named as inventive0 gate for optimizing a compressor circuit. The utility of the inventive0 gate is that it can be used as full adder and full subtraction with low value of garbage outputs and quantum cost. An algorithm is shown for designing a compressor structure. The comparative study shows that the proposed compressor structure outperforms the existing ones in terms of garbage outputs, number of gates and quantum cost. The compressor can reduce the effect of carry (Produce from full adder) of the arithmetic frame design. In addition, we implement a basic reversible gate of MOS transistor with less number of MOS transistor count.

E-069 Validation of a New Modified Capillary Index Score Angiographic Real Time Assessment of Dead vs Salvable Tissue

BackgroundThe original capillary index score publication only included patients that had full digital subtraction angiograms (DSA) before stroke intervention. This CIS was a single center publication with no external validation....

Fast Parallel DNA-Based Algorithms for Molecular Computation: Quadratic Congruence and Factoring Integers

Assume that n is a positive integer. If there is an integer such that M (2) ≡ C (mod n), i.e., the congruence has a solution, then C is said to be a quadratic congruence (mod n). If the congruence does not have a solution, then C is said to be a quadratic noncongruence (mod n). The task of solving the problem is central to many important applications, the most obvious being cryptography. In this article, we describe a DNA-based algorithm for solving quadratic congruence and factoring integers. In additional to this novel contribution, we also show the utility of our encoding scheme, and of the algorithm's submodules. We demonstrate how a variety of arithmetic, shifted and comparative operations, namely bitwise and full addition, subtraction, left shifter and comparison perhaps are performed using strands of DNA.

A full subtraction approach for finite element method based source analysis using constrained Delaunay tetrahedralisation.

A full subtraction approach for finite element method based source analysis using constrained Delaunay tetrahedralisation.

Controlled full adder or subtractor by vibrational quantum computing

A controlled full addition or subtraction can be realized by a unitary transformation on a register of four qubits. The fourth qubit is then used as a control qubit to enforce the addition or the subtraction of two binary digits and a carry or a borrow. The transformation can be decomposed into six elementary gates. The network differs from the adder network of four elementary gates by including two new controlled-NOT gates. The scheme is general and its implementation using vibrational computing has the advantage that the single global transformation that connects the inputs to the outputs can be driven in one step by a single laser shot. This decreases the time of operation and allows for a better use of the optical resources and for an improvement of the fidelity. The laser pulses are optimized by optimal control theory.

Accuracy and run-time comparison for different potential approaches and iterative solvers in finite element method based EEG source analysis

Accuracy and run-time play an important role in medical diagnostics and research as well as in the field of neuroscience. In Electroencephalography (EEG) source reconstruction, a current distribution in the human brain is reconstructed noninvasively from measured potentials at the head surface (the EEG inverse problem). Numerical modeling techniques are used to simulate head surface potentials for dipolar current sources in the human cortex, the so-called EEG forward problem. In this paper, the efficiency of algebraic multi-grid (AMG), incomplete Cholesky (IC) and Jacobi preconditioners for the conjugate gradient (CG) method are compared for iteratively solving the finite element (FE) method based EEG forward problem. The interplay of the three solvers with a full subtraction approach and two direct potential approaches, the Venant and the partial integration method for the treatment of the dipole singularity is examined. The examination is performed in a four-compartment sphere model with anisotropic skull layer, where quasi-analytical solutions allow for an exact quantification of computational speed versus numerical error. Specifically-tuned constrained Delaunay tetrahedralization (CDT) FE meshes lead to high accuracies for both the full subtraction and the direct potential approaches. Best accuracies are achieved by the full subtraction approach if the homogeneity condition is fulfilled. It is shown that the AMG-CG achieves an order of magnitude higher computational speed than the CG with the standard preconditioners with an increasing gain factor when decreasing mesh size. Our results should broaden the application of accurate and fast high-resolution FE volume conductor modeling in source analysis routine.

A full subtraction approach for finite element method based source analysis using constrained Delaunay tetrahedralisation

A mathematical dipole is widely used as a model for the primary current source in electroencephalography (EEG) source analysis. In the governing Poisson-type differential equation, the dipole leads to a singularity on the right-hand side, which has to be treated specifically. In this paper, we will present a full subtraction approach where the total potential is divided into a singularity and a correction potential. The singularity potential is due to a dipole in an infinite region of homogeneous conductivity. The correction potential is computed using the finite element (FE) method. Special care is taken in order to evaluate the right-hand side integral appropriately with the objective of achieving highest possible convergence order for linear basis functions. Our new approach allows the construction of transfer matrices for fast computation of the inverse problem for anisotropic volume conductors. A constrained Delaunay tetrahedralisation (CDT) approach is used for the generation of high-quality FE meshes. We validate the new approach in a four-layer sphere model with a highly conductive cerebrospinal fluid (CSF) and an anisotropic skull compartment. For radial and tangential sources with eccentricities up to 1 mm below the CSF compartment, we achieve a maximal relative error of 0.71% in a CDT-FE model with 360 k nodes which is not locally refined around the source singularity and therefore useful for arbitrary dipole locations. The combination of the full subtraction approach with the high quality CDT meshes leads to accuracies that, to the best of the author's knowledge, have not yet been presented before.

Stability of n-Bit Generalized Full Adder Circuits (GFAs). Part II

Stability of n-Bit Generalized Full Adder Circuits (GFAs). Part IIWe continue to formalize the concept of the Generalized Full Addition and Subtraction circuits (GFAs), define the structures of calculation units for the Redundant Signed Digit (RSD) operations, then prove its stability of the calculations. Generally, one-bit binary full adder assumes positive weights to all of its three binary inputs and two outputs. We define the circuit structure of two-types n-bit GFAs using the recursive construction to use the RSD arithmetic logical units that we generalize full adder to have both positive and negative weights to inputs and outputs. The motivation for this research is to establish a technique based on formalized mathematics and its applications for calculation circuits with high reliability.MML identifier: GFACIRC2, version: 7.8.09 4.97.1001

Antenna subtraction with hadronic initial states

The antenna subtraction method for the computation of higher order corrections to jet observables and exclusive cross sections at collider experiments is extended to include hadronic initial states. In addition to the already known antenna subtraction with both radiators in the final state (final-final antennae), we introduce antenna subtractions with one or two radiators in the initial state (initial-final or initial-initial antennae). For those, we derive the phase space factorization and discuss the allowed phase space mappings at NLO and NNLO. We present integrated forms for all antenna functions relevant to NLO calculations, and describe the construction of the full antenna subtraction terms at NLO on two examples. The extension of the formalism to NNLO is outlined.

All-optical digital logic: Full addition or subtraction on a three-state system

Stimulated Raman adiabatic passage (STIRAP) is a well-studied pump-probe control scheme for manipulating the population of quantum states of atoms or molecules. By encoding the digits to be operated on as ``on'' or ``off'' laser input signals we show how STIRAP can be used to implement a finite-state logic machine. The physical conditions required for an effective STIRAP operation are related to the physical conditions expected for a logic machine. In particular, a condition is derived on the mean number of photons that represent an on pulse. A finite-state machine computes Boolean expressions that depend both on the input and on the present state of the machine. With two input signals we show how to implement a full adder where the carry-in digit is stored in the state of the machine. Furthermore, we show that it is possible to store the carry-out digit as the next state and thereby return the machine to a state ready for the next full addition. Such a machine operates as a cyclical full adder. We further show how this full adder can equally well be operated as a full subtractor. To the best of our knowledge this is the first example of a nanosized system that implements a full subtraction.

More on the subtraction algorithm

We continue the programme of investigating the removal of divergences of a generic quantum gauge field theory, in the context of the Batalin--Vilkovisky formalism. We extend to open gauge-algebras a recently formulated algorithm, based on redefinitions of the parameters of the classical Lagrangian and canonical transformations. The key point is to generalize a well known conjecture on the form of the divergent terms to the case of open gauge-algebras. We also show that it is possible to obtain complete control over the effects of the subtraction algorithm on the space of the gauge-fixing parameters. We develop a differential calculus on providing an intuitive geometrical description of the fact that the on-shell physical amplitudes cannot depend on . A principal fibre bundle with a connection is defined such that the canonical transformations are gauge transformations for . A geometrical description of the effect of the subtraction algorithm on the space of the physical parameters is also proposed. Finally, the full subtraction algorithm is described as a series of diffeomorphisms on , orthogonal to (under which the action transforms as a scalar), and gauge transformations on . In this geometrical context, a suitable concept of predictivity is formulated. We give some examples of (unphysical) toy models that satisfy this requirement, though being neither power counting renormalizable, nor finite.

Real-time optical computing: multiprocessor design

An optical multiprocessor that can perform binary full addition and full subtraction in parallel is designed using a joint transform correlator. A new coding scheme is also developed for the proposed technique. Finally, simulation results are presented to verify the effectiveness of this scheme.

Multiple-valued logic based multiprocessor using polarization-encoded optical shadow-casting

An efficient technique for the design of a multiple-valued logic based multiprocessor using polarization-encoded optical shadow-casting is presented. As an illustration, this technique is used to design a multiprocessor which can perform trinary full addition and full subtraction both in parallel.

Butterfly interconnection implementation for an n-bit parallel full adder/subtractor

Free-space optical interconnections are important in both massive digital optical computing and communication systems. The architectural features of three interconnection networks are analyzed and compared, and the optical butterfly interconnection is shown to have many advantages over other interconnections in implementing various basic logic functions such as addition, subtraction, multiplication, and fast Fourier transforms (FFTs). Starting with conventional Karnaugh maps and Boolean algebra, the characteristics of full addition and full subtraction are analyzed and compared. An n-bit parallel calculator that can implement both ripple carry full additions and ripple borrow full subtractions using multilayer butterfly interconnection networks is designed. Then the schematic and architecture of the full adder/subtractor, interconnection networks, and the patterns of key devices such as masks to implement AND and OR operations in this calculation are described in detail. The correct simulation results of several groups of multibit digits are provided. Finally, the development of the interconnections in implementing logic operations is discussed.