Freeze-out Effect Research Articles

Analysis and simulation of the current gain of polysilicon emitter bipolar transistors for low-temperature operation

An analytical current gain model of polysilicon emitter bipolar transistors for low-temperature operation based on the effective recombination method is presented. The model incorporates tunnelling of holes through the interface oxide layer, the reduced mobility mechanism, bandgap narrowing and carrier freeze-out effects. The low-temperature current gain and its temperature dependence are analysed numerically. The results agree well with experimental data.

Neutral and negative donors in quantum dots

Using a method introduced earlier, the exact solutions of ground states of neutral donor (D0) centres in different quantum dots (QDs) have been obtained, and, taking the Chandrasekhar-type function as a trial function, the ground states of negative donor (D-) centres in QDs have been calculated. The dimensionality and potential-shape effects of QDs on the binding energies EB(D0) and EB(D-) of D0 and D- centres have been studied. The ratio sigma of EB(D0) to EB(D-) has clearly demonstrated the so-called freeze-out effect in different QDs. According to the value of sigma obtained, calculated results of different quantum-well structures can be checked and compared with others. It has been shown that the freeze-out effect and the electron-correlation effect are strongly dependent on the dimensionality of QDs and weakly dependent on the potential shape, and that the polarization term of the trial function not only brings in the important electron-correlation effect but also modifies the behaviour of the single-electron orbitals.

Polaron cyclotron resonance observed for n-type ZnSe in high magnetic fields up to 180 T.

We have observed cyclotron resonance and impurity cyclotron resonance (1s-2${\mathit{p}}^{+}$ transition) in a wide far-infrared wavelength range between 9.27 and 70.5 \ensuremath{\mu}m under pulsed high magnetic fields up to 180 T. A very large resonant polaron effect reflecting a large electron-phonon coupling constant was observed in both resonances, as well as a large nonparabolicity. The experimental results of cyclotron resonance were found to be in good agreement with a theoretical calculation based on the Wigner-Brillouin second-order perturbation theory taking account of the nonparabolicity. The impurity cyclotron-resonance data can also be well explained by a variational calculation. The donor ionization energy was found to increase by a factor of 2.39 at 180 T due to the magnetic freeze-out effect.

Magnetic freezeout effect in Al0.32Ga0.68As

The behaviour of the thermal ionization energy of the Gamma effective-mass state under a magnetic field has been studied near the Gamma -L-X crossover of AlGaAs. The results deviate significantly from the typical behaviour and it is shown that a better agreement can be obtained if screening effects and an anticrossing with a resonant state of a1 symmetry are considered.

Approximations for carrier density in nonparabolic semiconductors

The authors propose simple, analytic approximations that describe properties of semiconductors with nonparabolic energy bands. The approach is based on the two-level kp model of the semiconductor statistics which includes effects of band nonparabolicity and carrier degeneracy. The new expressions are in the form of a correction to the classical, Boltzmann approximation of the semiconductor statistics and do not introduce any new adjustable parameters. These relations can be applied to both narrow- and wide-bandgap nonparabolic semiconductors. The authors calculate the low-frequency capacitance of a nonparabolic MIS structure and compare the results with an accurate numerical model and experimental measurements of a HgCdTe capacitor. The solution includes the contributions of both types of carriers and the effect of impurity freezeout. The new approximations should be useful for characterization and modeling of semiconductor devices with nonparabolic energy bands.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

DC characteristics of submicrometer CMOS inverters operating over the whole temperature range of 4.2-300 K

The temperature dependence of the MOSFET parameters as well as the freeze-out and carrier multiplication effects on the DC characteristics of submicrometer CMOS inverters, operated over the whole ambient temperature range of 4.2-300 K, are discussed. The observed degradation of the inverter performance below 50 K is attributed to freeze-out and carrier multiplication effects.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Delayed-turn-on phenomenon in accumulation-type SOI pMOS device operating at liquid nitrogen temperature

A unique delayed-turn-on phenomenon in an accumulation type SOI pMOS device operating at 77 K based on the low-temperature PISCES simulation is reported. As compared with the 300 K case, in the delayed-turn-on region, the accumulation-type SOI pMOS device at 77 K may not provide a larger transconductance as a result of the carrier freezeout effects in the thin film.

Freeze-out characterization of radiation hardened N/sup +/ polysilicon gate CMOS transistors

Freeze-out behavior of radiation hardened N+ polysilicon gate CMOS devices is studied at liquid-nitrogen temperature before and after irradiation at different dose levels. Explanations are given for the threshold voltage variations and freeze-out effects both before and after irradiation. The degree of freeze-out of the counterdope implant is controlled by temperature, applied gate potential, and applied body-to-source potential. Based on experimental results of this work, freeze-out is not significantly affected by irradiation doses, or the magnitude of the gate bias during radiation. >

Comparison of drain-induced barrier-lowering in short-channel NMOS and PMOS devices at 77 K

This paper presents detailed comparisons between the room temperature and liquid nitrogen temperature experimental and 2-D simulation DIBL results in varying channel lengths NMOS and PMOS devices. The results in PMOS devices showed that DIBL is always worse at 300 than at 77 K. However, for NMOS devices, a unique DIBL temperature-dependent feature was observed, that is, DIBL is improved for devices with L < 0.6 and L > 1.2 μm, but is worse for devices in which 0.6 < L < 1.2 μm. Investigation of the physical mechanisms for explaining the above phenomenon in both types of MOS devices was carried out with the new version of the 2-D device numerical simulation program MINIMOS 4.0, that includes device modeling at cryogenic temperatures. The simulation results show that: (a) the major difference between NMOS and PMOS devices structure is the additional B-ion channel doping which tends to prevent punch-through in the sub-surface region for shorter channel NMOS devices, but forms a buried p-type sub-surface channel for shorter channel PMOS devices; and (b) lowering the temperature from 300 to 77 K caused the channel current path to be pushed back towards the channel surface for both NMOS and PMOS devices due to the freeze-out effect in the substrate. Therefore, the observed DIBL characteristics could be explained physically by the combination of the different source drain junction potential profiles between NMOS and PMOS devices, and the different current flow paths at 300 and 77 K.

Operation of short-channel depletion-mode MOS devices at liquid-nitrogen temperature

Experimental observations that depletion-mode MOS devices optimized for room temperature can also work well when immersed in liquid nitrogen are reported in which the classical impurity freeze-out effect seems to vanish on short-channel devices if the drain voltage is not too small. This is attributed to field-assisted ionization mechanisms such as the Poole-Frenkel effect, with possible enhancement by self-heating. The MINIMOS 4 device simulator was modified to introduce this effect and then to check the validity of this assumption by comparison with experimental results. To prove that it is possible to take advantage of this effect a 3-bit feedback adder, used as a benchmark circuit, has been processed in an enhancement-depletion 0.5- mu m NMOS technology optimized for room temperature wherein the cooling from 300 to 77 K results in an improvement from 1 to 1.3 GHz for the maximum clock frequency of operation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Anomalous latch-up behaviour of CMOS at liquid helium temperatures

The latch-up behaviour of the parasitic thyristor in a CMOS technology is investigated at liquid helium temperatures (LHeT). The increased latching susceptibility at 4.2 K cannot be explained by classical theory. In this paper, the following factors influencing latch-up are investigated at cryogenic temperatures: well and substrate series resistance, parasitic bipolar transistors and four-layer structure. The experimental results are discussed in view of freeze-out, shallow-level breakdown and electric field effects.

Substrate bias effects on drain-induced barrier lowering in short channel PMOS devices at 77 K

Experimental results on the substrate biasing characteristics of drain-induced barrier lowering (DIBL) in short channel PMOS devices with boron ion channel doping at 77 K are presented in detail. It was found that as the channel length decreased, the threshold voltage shift caused by DIBL first increased with increasing substrate bias and thereafter began decreasing. The new version of the two-dimensional device simulation program, MINIMOS 4.0, suitable for MOS simulation at cryogenic temperatures, was used to investigate this unique feature, which could be explained as the transition of surface DIBL to subsurface DIBL and the onset of punch-through. A new empirical model for describing the substrate characteristics of DIBL was developed: R = δV TH(DIBL)/ δV DS = αL − β , α = α o + α 1 V BS, β = β O + β 1 V BS. It is used for quantitative comparisons between 300 and 77 K based on the test PMOS device measurements. The extracted values of α O and α 1 (representing δV DIBL at V BS = OV and the slope of R versus V BS for the L = 1 μm device) were decreased by 27.5% and increased by 42%, respectively, from 300 to 77 K. The corresponding values of β 0 and β 1 (representing the curvature of δV DIBL versus L at V BS = OV and the slope of this curvature versus V BS) were decreased by 9 and 4%, respectively, for the same temperature reduction. These results clearly show the improvement of DIBL at 77 K, especially for smaller V BS, and could be explained physically by the decrease of the source (drain)-to-channel depletion width and partial carrier freeze-out effect in the substrate. Further simulations were carried out by MINIMOS 4.0 with the emphasis on the boron ion channel doping profile. By changing the channel implantation dose from 4.3 × 10 11 to 8.7 × 10 11 cm −2 and energy from 25 to 35 keV, the extracted parameters of α and β were found to be very sensitive to both implantation dose and energy.

Observation of incoherent tunnelling in HgCdTe MIS structure

The authors report the observation of an incoherent tunnelling phenomenon in Al/ZnS/p-Hg1-xCdxTe metal-insulator-semiconductor (MIS) capacitors in the temperature range 15<or=T<or=110 K. Under thermal equilibrium, both capacitance-voltage and conductance-voltage characteristics show strong oscillations when the MIS capacitor is biased into strong inversion. The data can be understood as being due to electron tunnelling between the three-dimensional (3D) valence band of p-type Hg1-xCdxTe and the 2D inversion layers at the interface of Hg1-xCdxTe and ZnS. This process, which is inevitably momentum-non-conserving in a non-degenerate semiconductor, is made possible via intermediate gap states. The temperature dependence of the oscillation amplitude can be well explained by the positive temperature coefficient of the band gap and the carrier freeze-out effect.

Carrier concentration model for n-type silicon at low temperatures

Previous models for use in calculating the carrier freezeout effects in n-type Si at low temperature are extended to include the sixfold degeneracy of excited states and the fine structure of the ground state resulting from considerations of group theory. The results are in good agreement with experimental Hall-effect measurements. For n-type Si with doping in the range of 8×1017–2×1019 cm−3, a method is proposed to estimate the electron concentration and mobilities in the conduction band and in the first excited impurity band at a given temperature.

High pressure and DX centers in heavily doped bulk GaAs.

Measurements of the pressure dependence of electron concentration and mobility have been analyzed for heavily doped, bulk GaAs:(Si,Sn,S,Te). It is demonstrated that the samples with ng2\ifmmode\times\else\texttimes\fi{}${10}^{18}$ ${\mathrm{cm}}^{\mathrm{\ensuremath{-}}3}$ exhibit the effect of carrier freeze-out for pressures below 20 kbar. GaAs:Te represents the exception to this behavior (n versus pressure is constant up to 25 kbar). Two models of the localized state of the donor are considered. Neutral, ${\mathrm{DX}}^{0}$, or negatively charged, ${\mathrm{DX}}^{\mathrm{\ensuremath{-}}}$, states might appear after trapping one or two electrons, respectively, by the positively charged donor center. The results obtained show that the energetic level related to the DX center, ${E}_{\mathrm{DX}}$, is located much higher in the conduction band than could be deduced from results extrapolated from ${\mathrm{Al}}_{1\mathrm{\ensuremath{-}}\mathrm{x}}$${\mathrm{Ga}}_{\mathrm{x}}$As (${E}_{\mathrm{DX}}$ situated about 170 meV above the bottom of the \ensuremath{\Gamma} conduction band, versus ${E}_{\mathrm{DX}}$g250 meV obtained in this work). The results show that the localized and metastable DX center is not related to any single conduction-band minimum; its energy position and pressure coefficient exhibit significant temperature dependence. For a Si donor in GaAs, weakening of the electron-lattice coupling strength as a result of applying pressure is anticipated. Increase of electron mobility with decreasing carrier concentration has been observed here. Though it is suggestive to use this result for eliminating the concept of the ${\mathrm{DX}}^{\mathrm{\ensuremath{-}}}$ center, some objections to this conclusion, due to possible correlations in dopant distribution, are presented in the paper.

Freeze-out effects on NMOS transistor characteristics at 4.2 K

Detailed substrate current characteristics of nMOSTs at 4.2 K were obtained with a view to elucidating their transient (hysteresis) and kink behavior below carrier freeze-out. A great similarity with room-temperature behavior is found, indicating that analogous expressions for the substrate current I/sub B/ can be used to calculate the transient time constant that follows from the forced depletion layer formation (FDLF) model reported previously by the authors (see ibid., vol.ED-35, p.1120-5, 1988). In a second part to this work, it will be demonstrated that both the substrate and the cooling bias have a marked influence on the kink. These effects can be fully understood with the FDLF model. >

Base profile design for high-performance operation of bipolar transistors at liquid-nitrogen temperature

Measurements of thin epitaxial-base polysilicon-emitter n-p-n transistors with increasing base doping show the effects of bandgap narrowing, mobility changes, and carrier freezeout. At room temperature the collector current at low injection is proportional to the integrated base charge, independent of the impurity distribution. At temperatures below 150 K, however, minority injection is dominated by the peak base doping because of the greater effectiveness of bandgap narrowing. When the peak doping in the base approaches 10/sup 19/ cm/sup -3/, the bandgap difference between emitter and base is sufficiently small that the current gain no longer monotonically decreases with lower temperature but instead shows a maximum as low as 180 K. The device design window appears limited at the low-current end by increased base-emitter leakage due to tunneling and by resistance control at the high-current end. Using the measured DC characteristics, circuit delay calculations are made to estimate the performance of an emitter-coupled logic ring oscillator at room and liquid-nitrogen temperatures. It is shown that if the base doping can be raised to 10/sup 19/ cm/sup -3/ while keeping the base thickness constant, the minimum delay at liquid-nitrogen temperature can approach the delay of optimized devices at room temperature. >

MOS flat-band capacitance method at low temperatures

The expression C/sub FB/=C/sub ox/*( epsilon /sub si//L/sub D/)/(C/sub ox/+( epsilon /sub si//L/sub D/)) (where L/sub D/ is the Debye length), commonly used for the flatband capacitance of the MOS structure, is invalid in the temperature range below 100 K. Consequently, significant error may be encountered when the flatband capacitance method is used to extract the flatband voltage, V/sub FB/, which is of considerable interest for both the modeling and characterization of MOS devices. To extend this method to low-temperature CMOS applications one has to use a more general model that can be obtained by applying Fermi-Dirac statistics and taking into account the impurity freeze-out effect. It is shown that when the temperature dependence of V/sub FB/ is extracted using this approach, the experimental data for n/sup +/ polysilicon gate MOS capacitors are in good agreement with a simple method.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Carrier freeze-out effects in semiconductor devices

The Gunn effect as a function of pressure has been studied in InSb devices. The Gunn threshold field is found to decrease with increasing pressure reaching a minimum at P=9 kbar. It then increases while the oscillations weaken with increasing pressure up to 12 kbar. Low-field Hall and conductivity measurements have also been made in an attempt to obtain a possible explanation for the threshold minimum. It is observed that the impurity level moves away from the conduction band approximately exponentially with increasing pressure. By 9 kbar the donor ionization energy is large enough that considerable freezeout or deionization of donor states occurs. The reduction in carrier number is unfavorable to the Gunn process and hence leads to an increase in the threshold field for pressure above 9 kbar.

Performance and hot-carrier effects of small CRYO-CMOS devices

The performance characteristics of submicrometer CMOS devices operating at low/cryogenic temperatures (CRYO-CMOS) are determined. The advantages and problems in a CRYO-CMOS technology are experimentally studied in relation to the velocity saturation, source-drain resistances, mobility behavior, carrier freeze-out effects, hot-carrier effects, and circuit performance. The increase of the maximum transconductance at low temperatures (77, 4.2 K) has been confirmed even in the submicrometer channel region. However, improvement of inabilities at a V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">G</inf> nearly equal to 5 V is not so significant in devices with thinner oxides and less so in pMOS devices than in nMOS devices. Excellent subthreshold characteristics have been obtained at low temperatures, making very low-voltage operation possible. One problem found in the threshold control of pMOS transistors is that the boron ions implanted in the surface freeze out, causing unusual subthreshold behavior. Circuit delays have been improved by a factor of 2 to 3, and CRYO-CMOS shows the lowest power-delay product among existing semiconductor technologies with speed performance comparable to bipolar ECL devices. For LDD devices, speed improvements are only slightly smaller than for single-drain devices, while currents and transconductances in the linear regions are limited because of carrier freeze-out of the lightly doped drain. For both channel LDD devices, the transconductance degradations and V <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</inf> shifts observed under dc stress conditions at 77 K are considered to result from electron injection into spacer oxides.