Free Silicon Surface Research Articles

Unraveling the Mechanism of Maskless Nanopatterning of Black Silicon by CF4/H2 Plasma Reactive-Ion Etching.

The process of deep texturization of the crystalline silicon surface is intimately related to its promising diverse applications, such as bactericidal surfaces for integrated lab-on-chip devices and absorptive optical layers (black silicon—BSi). Surface structuring by a maskless texturization appeals as a cost-effective approach, which is up-scalable for large-area production. In the case of silicon, it occurs by means of reactive plasma processes (RIE—reactive-ion etching) using fluorocarbon CF4 and H2 as reaction gases, leading to self-assembled cylindrical and pyramidal nanopillars. The mechanism of silicon erosion has been widely studied and described as it is for the masked RIE process. However, the onset of the erosion and the reaction kinetics leading to defined maskless patterning have not been unraveled to date. In this work, we specifically tackle this issue by analyzing the results of three different RIE recipes, specifically designed for the purpose. The mechanism of surface self-nanopatterning is revealed by deeply investigating the physical chemistry of the etching process at the nanoscale and the evolution of surface morphology. We monitored the progress in surface patterning and the composition of the etching plasma at different times during the RIE process. We confirm that nanopattering issues from a net erosion, as contributed by chemical etching, physical sputtering, and by the synergistic plasma effect. We propose a qualitative model to explain the onset, the evolution, and the stopping of the process. As the RIE process is started, a high density of surface defects is initially created at the free silicon surface by energetic ion sputtering. Contextually, a polymeric overlayer is synthesized on the Si surface, as thick as 5 nm on average, and self-aggregates into nanoclusters. The latter phenomenon can be explained by considering that the initial creation of surface defects increases the activation energy for surface diffusion of deposited CF and CF2 species and prevents them from aggregating into a continuous Volmer–Weber polymeric film. The clusterization of the polymer provides the self-masking effect since the beginning, which eventually triggers surface patterning. Once started, the maskless texturing proceeds in analogy with the masked case, that is, by combined chemical etching and ion sputtering, and ceases because of the loss of ion energy. In the case of CF4/H2 RIE processes at 10% of H2 and by supplying 200 W of RF power for 20 min, nanopillars of 200 nm in height and 100 nm in width were formed. We therefore propose that a precise assessment of surface defect formation and density in dependence on the initial RIE process parameters can be the key to open a full control of outcomes of maskless patterning.

Atmospheric pressure plasma etching of silicon dioxide using diffuse coplanar surface barrier discharge generated in pure hydrogen

We report on the method of dry etching of silicon dioxide (SiO2) layers by cold plasma treatment at atmospheric pressure in pure hydrogen using Diffuse Coplanar Surface Barrier Discharge (DCSBD). The SiO2 etching rate was estimated at ~1nm/min. The studied plasma process was found to be the composition of plasma induced reduction and etching. The changes in surface morphology of etched samples were observed by scanning electron microscopy. X-ray photoelectron spectroscopy analysis was applied to identify the surface chemical changes due to the reduction processes. Two regimes of plasma treatment were examined. While the dynamic treatment, where the treated surface was moved relative to the plasma source, led to a homogeneous process, the treatment in static conditions resulted in a stripe-type pattern on the surface of the samples reflecting the electrode structure of the plasma source. The results provide a basis for a new and simple way to prepare clean, native oxide free silicon surfaces in dry plasma process at atmospheric pressure.

Surface Protection for Semiconductor Direct Bonding

Semiconductor direct wafer bonding is a widely used process for fabricating 3-dimensional structures, especially engineered substrates such as SOI wafers or cavity wafers with and without insulating layers at the bonding interface. The investigations described here concern cavity SOI wafers without insulating layers, as used for discrete and integrated pressure sensors. Semiconductor direct bonding is the initial bonding by mechanical contacting of high-quality surfaces activated by wet chemical and/or plasma treatments, followed by thermal annealing at temperatures and times related to the chosen activation. This ultimately results in a very strong mechanical bond, which can survive all of the subsequent process steps, such as those needed to process MEMS pressure sensors. The requirement for the direct bonding is that the wafers to be bonded have a very high quality; this means very low roughness, low waviness and no surface residues or contamination. In this paper, the focus is on roughness in relation to the bonding process and process integration. It is well known that prime wafers with vendor polishing as the finishing step have a very good mirror polished surface, and can be bonded very easily – therefore they are often used for basic wafer bonding investigations, such as the effectiveness of surface activation. On the other hand, fresh polishing as the final step before wafer bonding is often used to reconfigure the surface, to allow a very good wafer bonding. In practice, especially in industrial processes, the problem is that wafers need to be processed before bonding to generate the required functional structures (the reference pressure cavity in case of the pressure sensors and alignment marks on the wafer backside to retrieve the sealed cavities after bonding). On the other hand, fresh polishing directly before bonding is not possible, either due to availability or because it cannot be used for the already-structured wafers (either the structure on the wafers or the polishing pads would be damaged). Here, one option is to protect the bonding surfaces with a hard coating, such as by growing a thermal oxide on a silicon wafer. In the case of the pressure sensors, this layer can fulfil a double function – protecting the bonding surface and acting as a hard mask for the cavity etching. Hence, the flow of the cavity wafer can be summarized as follows: thermal oxidation, back side lithography of the alignment marks, plasma etching of oxide back side (hard mask structuring), resist removal, front-to-back side lithography, plasma etching of the cavity hard mask on the front side, resist removal, KOH etching of silicon in an etch bath (simultaneously etching of cavities on front side and alignment marks on wafer back side), hard mask stripping using oxide etching baths. Due to availability, Buffered Oxide Etchant (BOE) has to be used for stripping the hard mask from the wafer, and it was found that this etchant can slightly attack the silicon surface, making it a little rougher, which makes the bonding more difficult. With respect to a safe process, the etching time has to be long enough to remove the oxide in all cases, (e.g. grown oxide thickness in upper spec range, BOE oxide etching range in lower spec range), to reduce all the oxide everywhere on the wafer, but it must be short enough to prevent the roughening of the surface. Therefore, the extra etching time the wafer is left in the bath after the oxide has been removed, which is needed to cover natural process variations, must be as short as possible. This was evaluated experimentally. As a measure of the surface roughness, the bonding process itself was used, in particular, the travelling speed (Figure1) of the bonding front across the wafer – since the higher this is, the better the surface and the safer the overall process. As result, it was found that reducing the over-etch time by about 50%, reduced the travelling speed of the direct wafer bonding front by 20%, which is very significant. From this, it can be concluded, that the bonding behaviour of the silicon is strongly influenced by the time the free silicon surface remains in the BOE – the longer this time, the rougher the silicon, and the more difficult the bonding. This is ultimately very important for the overall process integration and to achieve a safe bonding process for almost void-free engineered substrates such as cavity wafers (Figure 2). Figure 1

Analysis of the reduction of tensile stress by post‐growth annealing methods in multicrystalline silicon wafers produced by the RST process

AbstractIn this work, we analyze the residual stress, in both as‐grown and post‐growth annealed silicon ribbon on a sacrificial carbon template, by the simulation of the thermo‐mechanical behavior of the cooling ribbon using the Abaqus software, and the measurement of stress on the free silicon surface by µ‐Raman spectroscopy. The results of the simulations gave limits within which flat ribbons could be obtained for a combination of silicon thickness, ribbon width and pull rate. Stress relaxation by off‐line thermal treatments is used to optimize a post‐growth annealing furnace in line with the ribbon growth system. The fragile behavior of the ribbon during laser cutting can be considerably reduced by a short relaxation of the ribbon at medium temperatures around 850 °C, which were observed to give the best behavior in terms of residual tensile stress relaxation. (© 2014 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Relaxation-induced self-organization of a silicon crystal surface under microwave plasma micromachining

The results of comprehensive studies of the effect of low-energy microwave plasma micromachining with various impact selectivities on the nanomorphology of the surface of single-crystal silicon with the (100) crystallographic orientation with a native oxide layer are presented. The main characteristic parameters and model mechanisms of the processes providing control of the nanomorphology of a silicon crystal’s surface during microwave plasma micromachining under conditions of weak adsorption are considered. The fundamental causes and factors underlying the processes of relaxation-induced self-organization of the nanomorphology of both the free silicon surface of a given crystallographic orientation and the surface protected by the native oxide coating under plasma micromachining are stated.

Fluorinated saccharides on the Si(0 0 1) surface

The attachment of saccharide molecules directly to silicon surface has been for the first time. Oxygen free silicon surface was functionalized with monosacharides thanks to UV irradiation in acetonitryl solution (254nm). Selected derivatives of pentofuranose were protected at the C-1 and C-2 position. The remaining hydroxyl group at C-3 or C-5 was suitable for direct attachment to H-terminated Si(001) surface via SiOC bonds. The binding energy of the saccharide to the Si surface was investigated by quantum mechanical calculations method. The Parametric Method 5 (PM5) calculations confirmed that the formation of SiOC bonds was chemically possible. Synthesis of new fluorinated carbohydrates has been described. The resulting monolayers were characterized by Atomic Force Microscopy (AFM), X-ray photoelectron spectroscopy (XPS) and Attenuated Total Reflection (ATR) infrared spectroscopy. The effect of incorporating fluorine atom or CF3 group into self-assembled monosaccharide monolayers was studied using a water contact angle measurements. The resulting surface wettability of different fluorinated components on one kind of planar substrate enables an answer which of derivative is required for the preparation of the hydrophobic monolayer.

Three-dimensional capillary force assembly: Fabrication of white light emitters

This work uses convective assisted capillary force assembly from a collection of 100 nm fluorescent polystyrene nanoparticles to fabricate 4 μm wide and 1 μm high localized light-emitting superstructures. Large scale superstructures of about 10 000 particles are transferred on free silicon surfaces by microcontact printing. Optical characterization reveals that these sources emit polychromatic visible light from 400 to 800 nm equivalent to a white spectrum. Finally, single objects are studied to characterize the spatial distribution of the emitted color.

UV induced covalent assembly of gold nanoparticles in linear patterns on oxide free silicon surface

UV photon induced assembly of ω-alkenyl terminated gold nanoparticles (AuNPs) on pre-defined sites of crystalline silicon surface through covalent interaction is demonstrated. Highly ordered and stable hexadecyl monolayer on oxide free silicon surface is used to construct the photopattern and then the linear patterns of hydrogen-terminated sites were effectively used to assemble AuNPs by UV induced hydrosilylation. This approach is entirely based on oxide free interfaces, where both robust organic monolayer and AuNPs are assembled in a linear fashion. The developed strategy promises immense potential to miniaturize silicon based devices for technological applications, where electron coupling between the nanoparticles and the silicon surface is very significant. This work further paving the new direction to immobilize various types of nanoparticles in different architecture on oxide free crystalline silicon surface to exploit their utilization in technological applications.

Interaction of cobalt atoms with an oxidized Si(111)7 × 7 surface

The interaction of cobalt atoms with a Si(111)7 × 7 surface subjected to in situ oxidation in an oxygen atmosphere at a pressure of 10−5 Pa, an exposure of 20 L, and a temperature of 500°C is studied by high-decomposition (100 meV) photoelectron spectroscopy using synchrotron radiation. This surface treatment is shown to form an oxide film, which has a complex composition, occupies about 80% of the substrate surface, and has a thickness of ∼6 A. At room temperature and a coverage of up to six monolayers, cobalt atoms are found to migrate to free (unoxidized) silicon surface spots rather than being adsorbed on the formed oxide layer. In these spots, a thin layer of cobalt disilicide first forms and a Co-Si solid solution then grows on it. Some cobalt atoms penetrate under the oxide layer and form a three-component Co-Si-O interfacial phase and a metastable cobalt disilicide with a CsCl-type structure at the SiO x -Si interface.

High‐density guided growth of silicon nanowires in nanoporous alumina on Si(100) substrate: Estimation of activation energy

AbstractHigh‐density growth of silicon nanowires confined within a nanoporous alumina template is carried out. The growth rate is measured for several temperatures. An incubation time is observed and measured. The activation energy of this system is calculated and compared to that of growth on a free silicon surface. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Heavy Water in Gate Stack Processing

The high reactivity of the free silicon surface and its consequence: the “omnipresent” native silicon dioxide hinders the interface engineering in many processing steps of IC technology on atomic level. Methods known to eliminate the native oxide need in most cases vacuum processing. They frequently deteriorate the atomic flatness of the silicon. Hydrogen passivation by a proper DHF (diluted HF) treatment removes the native silicon oxide without roughening the surface while simultaneously maintains a “quasi oxide free” surface in a neutral or vacuum ambient for short time. Under such circumstances the last thermal desorption peak of hydrogen is activated at around 480-500°C where the free silicon surface suddenly becomes extremely reactive. In this study we show that deuterium passivation is a promising technology. Due to the fact that deuterium adsorbs more strongly on Si surface than hydrogen even at room temperature, deuterium passivation does not need vacuum processing and it ensures a robust process flow.

Molecular dynamics simulation of thermal transport at a nanometer scale constriction in silicon

To better understand thermal transport at nanoscale point contacts such as the tip-sample contact of a scanning probe microscope and at the contact between a nanotube and a planar surface, we have used a nonequilibrium molecular dynamics (MD) method to calculate the temperature distribution and thermal resistance of a nanometer scale constriction formed between two planar silicon substrates of different temperatures. Surface reconstruction was observed at the two free silicon surfaces and at the constriction. The radius of the heated zone in the cold substrate was found to approach a limit of about 20 times the average nearest-neighbor distance of boron doping atoms when the constriction radius (a) is reduced below the interdopant distance. The phonon mean free path at the constriction was found to be suppressed by diffuse phonon-surface scattering and phonon-impurity scattering. The MD thermal resistance is close to the ballistic resistance when a is larger than 1nm, suggesting that surface reconstruction does not reduce the phonon transmission coefficient significantly. When a is 0.5nm and comparable to the dominant phonon wavelength, however, the MD result is considerably lower than the calculated ballistic resistance because bulk phonon dispersion and bulk potential are no longer accurate. The MD thermal resistance of the constriction increases slightly with increasing doping concentration due to the increase in the diffusive resistance.

Potential influence on copper electrodeposition on scratched silicon surfaces

Various methods can be used to pattern surfaces with small features. In the present work, a micro-indenter was used to scratch the Si surface to create sub-micrometer structures. The influence of the electrochemical potential on copper nucleation, growth and morphology was studied on this scratched silicon surface. Copper deposition either in the opening of an insulating oxide layers made by scratching with an indenter tip or in oxide free Si surface was observed with Scanning Electron Microscopy (SEM). The nucleation and growth morphology of copper at high voltage pulse on both oxide covered and oxide free silicon surfaces were also studied. We demonstrate that thin oxide layers can act as a very efficient resist even at comparably high voltages.

Cofabrication of superconducting YBa2Cu3O7−δ and semiconducting devices on (100) Si substrates

We report the process technology for the modular integration of YBa2Cu3O7−δ (YBCO) and p-type metal-oxide-semiconductor (p-MOS) devices on the same silicon substrate. Basic test structures consisting of single p-MOS field-effect transistors with a Pt-based metallization and YBCO bridges were fabricated. After completion of the p-MOS fabrication, highly c-axis-oriented YBCO films showing a critical temperature of 86 K were grown on a free silicon surface. The electrical characteristics at 77 K of the p-MOS transistors were comparable to those of this technology with Al metallization. This means that no fatal degradation was introduced into the p-MOS process by the YBCO one. The cofabrication on the same silicon substrate of devices using such disparate technologies as YBCO and MOS is a very promising starting point for a new generation of monolithic integrated circuits combining the advantages of oxide and semiconductor properties.

Physical mechanisms of laser correction and stabilization of the parameters of Al-n-n +-Si-Al schottky barrier structures

Optical and scanning electron microscopy in combination with layer-by-layer chemical etching are used to study the physical processes of solid-state diffusion induced by pulsed laser radiation in package-less thin-film Al-n-n +-Si-Al Schottky barrier structures formed on free silicon surface and in SiO2 windows.

Generation of surface acoustic waves in silicon with energetic femtosecond laser pulses

The generation of surface acoustic wave (SAW) pulses in Si single crystal by femtosecond laser pulses with high energy of up to 30 mJ is studied. The generation is rather efficient even at a free silicon surface. In this case the shape of the observed SAW pulses corresponds to the thermoelastic mechanism despite the fact that a well developed ablation takes place. Excitation through a liquid layer is also studied and provides longer SAW pulses. SAW gratings are generated by focusing the laser beam through a mask and the changes in the spectrum of the pulse due to nonlinear interactions are observed.

First-principles study of the adsorption of PH3 on Ge(001) and Si(001) surfaces

Using a first-principles pseudopotential method we have compared the adsorption and dissociation of the common n-type dopant molecule PH3 on the Si(001)-(21) and Ge(001){(21) surfaces. We find that the dissociated state is energetically more favourable than the molecular state by 1.70(0.81) eV, whereas the latter is 0.58(0.25) eV more stable than the system composed of the free silicon(germanium) surface and PH3(g). The chemisorbed system is characterised by elongated Si{Si(Ge{Ge) dimers that are symmetric in the dissociative case and asymmetric in the molecular case and by the fact that the Si(Ge){PH2 as well as the PH3(ads) groups retain the pyramidal geometry of the phosphine molecule. Our dissociative adsorption model is further supported by our calculated vibrational modes, which are in good agreement with available experimental works.

Impurity segregation in LPE growth of silicon from CuAl solutions

Al segregation at the solid-liquid interface and Cu segregation at the free silicon surface were studied in liquid-phase epitaxy (LPE) of silicon thin layers from mixtures of CuAlSi. Using the multi-component regular solution model and experimental results, we found that SiAl and SiCu interactions in the liquid solution are repulsive, and AlCu interaction is attractive. As a result, Al doping in silicon epitaxial layers is controlled by both Cu and Al compositions in the growth solution to allow epitaxy at about 900°C, with a substantial amount of Al present in the liquid for substrate surface-oxide removal. On the other hand, Cu concentration in the grown layers is determined by both the solid-liquid interface segregation during growth and segregation at the silicon surface after growth. The surface segregation phenomenon can be used to getter Cu from the bulk of silicon layers so that its concentration is much lower than its solubility at the layer growth temperature and the reported 10 17 cm −3 degradation onset for solar-cell performance.

Transition metal silicide precipitation in silicon induced by rapid thermal processing and free-surface gettering

We have investigated the effect of nickel and copper on defect formation in silicon employing the rapid thermal processing (RTP) scheme. Treatment by RTP induces haze in the silicon wafer front side when its back side is contaminated by either nickel or copper. Transmission electron microscopy studies showed that the haze consisted of metal silicide precipitates, which negates a previous suggestion that ‘‘oxidation-induced stacking faults’’ are the main defect forming the haze. The morphology and nature of these precipitates have been analyzed. The nickel silicide precipitates were found to be NiSi2 and the copper silicide precipitates are most likely CuSi (zinc blende structure). Both kinds of precipitates exhibited an epitaxial relationship with the silicon substrate and adopted the shape of an inverted pyramid or section of a pyramid. The present CuSi precipitate morphology differs totally from that obtained using furnace annealing, and is attributed to the availability of free-silicon surface as the main silicon self-interstitial sink. Implications for low-temperature ultralarge scale integration processing are discussed.

The Use of Fresnel Contrast to Study the Initial Stages of The in situ Oxidation of Silicon

ABSTRACTWe describe the analysis of Fresnel contrast seen at a free silicon surface in order to characterise the initial clean surface and the formation in situ of the first atomic layers of oxide.