FPGA-based Digital Signal Processing Research Articles

A field-programmable gate array (FPGA)-based data acquisition system for closed-loop experiments.

We describe a custom and open source field-programmable gate array (FPGA)-based data acquisition (DAQ) system developed for electrophysiology and generally useful for closed-loop feedback experiments. FPGA acquisition and processing are combined with high-speed analog and digital converters to enable real-time feedback. The digital approach eases experimental setup and repeatability by allowing for system identification and in situ tuning of filter bandwidths. The FPGA system includes I2C and serial peripheral interface controllers, 1 GiB dynamic RAM for data buffering, and a USB3 interface to Python software. The DAQ system uses common HDMI connectors to support daughtercards that can be customized for a given experiment to make the system modular and expandable. The FPGA-based digital signal processing (DSP) is used to generate fourth-order digital infinite impulse response filters and feedback with microsecond latency. The FPGA-based DSP and an analog inner-loop are demonstrated via an experiment that rapidly steps the voltage of a capacitor isolated from the system by a considerable resistance using a feedback approach that adjusts the driving voltage based on the digitized capacitor current.

An FPGA Platform for Next-Generation Grating Encoders.

Among various nanometer-level displacement measurement methods, grating interferometry-based linear encoders are widely used due to their high robustness, relatively low cost, and compactness. One trend of grating encoders is multi-axis measurement capability for simultaneous precision positioning and small order error motion measurement. However, due to both lack of suitable hardware data processing platform and of a real-time displacement calculation system, meeting the requirements of real-time data processing while maintaining the nanometer order resolutions on all these axes is a challenge. To solve above-mentioned problem, in this paper we introduce a design and experimental validation of a field programmable gate array (FPGA)-cored real-time data processing platform for grating encoders. This platform includes the following functions. First, a front-end photodetector and I/V conversion analog circuit are used to realize basic analog signal filtering, while an eight-channel parallel, 16-bit precision, 200 kSPS maximum acquisition rate Analog-to-digital (ADC) is used to obtain digital signals that are easy to process. Then, an FPGA-based digital signal processing platform is implemented, which can calculate the displacement values corresponding to the phase subdivision signals in parallel and in real time at high speed. Finally, the displacement result is transferred by USB2.0 to the PC in real time through an Universal Asynchronous Receiver/Transmitter (UART) serial port to form a complete real-time displacement calculation system. The experimental results show that the system achieves real-time data processing and displacement result display while meeting the high accuracy of traditional offline data solution methods, which demonstrates the industrial potential and practicality of our absolute two-dimensional grating scale displacement measurement system.

Real-Time FPGA-Based Digital Signal Processing and Correction for a Small Animal PET

Small animal Positron Emission Tomography (PET) is dedicated to small animal imaging, which requires high position and energy precision, as well as good flexibility and efficiency of the electronics. This paper presents the design of a digital signal processing logic for a marmoset brain PET system based on LYSO crystal arrays, SiPMs, and the resistive network readout method. We implement 32-channel signal processing in a single Xilinx Artix-7 Field-Programmable Gate Array (FPGA). The logic is designed to support four online modes which are regular data processing mode, flood map construction mode, energy spectrum construction mode, and raw data mode. Several functions are integrated, including two-dimensional (2D) raw position calculation, crystal locating, events filtering, and synchronization detection. Furthermore, a series of online corrections is also integrated, such as photon peak correction to 511 keV and time measurement result correction with crystal granularity. A Gigabit Ethernet interface is utilized for data transfer, Look-Up Tables (LUTs) configuration, and command issuing. The pipeline logic works at 125 MHz with a signal processing capability beyond the required data rate of 1,000,000 events/s/channel. A series of initial tests are conducted. The results indicate that the logic design meets the application requirement.

A Comparative Study for Performance and Power Consumption of FPGA Digital Interpolation Filters

The development of FPGA-based digital signal processing devices has been gaining attention. Researchers seek to reduce power consumption and enhance signal processing quality in these devices with given resources and spatial limits. Hence, there is a need to investigate both the capability and the power consumption associated with the various digital filtering schemes commonly used in FPGA-based devices. We carry out a set of performance and power consumption measurements of interpolation filters using an FPGA and other basic signal processing building blocks. We compare the signal processing performance with theoretical prediction, and measure the power consumed by the filters. Our experimental measurements also confirm the accuracy of the numerical tools used for predicting FPGA power consumption. This paper is aimed at providing a framework to accurately test basic signal processing across various interpolation schemes and compare the respective schemes’ software-side contributions to power consumption and filtering quality.

Introduction to the Special Issue on Digital Signal Processing in Radio Astronomy

Advances in astronomy are intimately linked to advances in digital signal processing (DSP). This special issue is focused upon advances in DSP within radio astronomy. The trend within that community is to use off-the-shelf digital hardware where possible and leverage advances in high performance computing. In particular, graphics processing units (GPUs) and field programmable gate arrays (FPGAs) are being used in place of application-specific circuits (ASICs); high-speed Ethernet and Infiniband are being used for interconnect in place of custom backplanes. Further, to lower hurdles in digital engineering, communities have designed and released general-purpose FPGA-based DSP systems, such as the CASPER ROACH board, ASTRON Uniboard, and CSIRO Redback board. In this introductory paper, we give a brief historical overview, a summary of recent trends, and provide an outlook on future directions.

Development of a DAQ system for a plasma display panel-based X-ray detector (PXD)

Recently, a novel plasma display panel (PDP)-based X-ray detector (PXD) was developed. The goal of this study is to develop a data acquisition system for use with the PXD as an imaging detector. Since the prototype detector does not have any barrier ribs or a switching device in a detector pixel, a novel pixelation scheme—the line-scan method—is developed for this new detector. To implement line scanning, a multichannel high-voltage switching circuit and a multichannel charge-acquisition circuit are developed. These two circuits are controlled by an FPGA-based digital signal processing board, from which the information about the charge and position of each pixel can be sent to a PC. FPGA-based baseline compensation and switching noise rejection algorithms are used to improve the signal-to-noise ratio (SNR). The characteristic curve of the entire PXD system is acquired, and the correlation coefficients between the X-ray dose, and the signal intensity and the SNR were determined to be approximately 0.99 and 52.9, respectively.

Field Programmable Gate Array for Data Processing in Medical Systems

Twodimensional &Three–dimensional (3-D) image segmentation is on of the most demanding tasks in image processing. It has been proven that only the 14-neighborship of a rhombic dodecahedron can satisfy the aforementioned requirements. The 3-D-GSC process is executed in the following three phases ,coding phases,linking phases,splitting phases. An FPGA-based digital signal processing board optimized for applications needing large memory with high bandwidth has been developed and successfully used for the parallelization of a modern image segmentation algorithm for medical and industrial real-time applications.The Use of this 128-bit coprocessor board is not limited to image segmentation.We propose the perfectly parallelizable 3-D Gray-Value Structure Code (3-D-GSC) for image segmentation on a new FPGA custom machine. This 128-Bit FPGA coprocessing board features an up-to-date Virtex-II Pro architecture, two large independent DDR-SDRAM channels, two fast independent ZBT-SRAM channels, and PCI-X bus and CameraLink interfaces.

Development of FPGA-based digital signal processing system for radiation spectroscopy

Abstract We have developed an FPGA-based digital signal processing system that performs both online digital signal filtering and pulse-shape analysis for both particle and gamma-ray spectroscopy. Such functionalities were made possible by a state-of-the-art programmable logic device and system architectures employed. The system performance as measured, for example, in the system dead time and accuracy for pulse-height and rise-time determination, was evaluated with standard alpha- and gamma-ray sources using a CsI(Tl) scintillation detector. It is resulted that the present system has shown its potential application to various radiation-related fields such as particle identification, radiography, and radiation imaging.

Control of NI SbRIO-9631 prototype robot on the basis of hand movement

Abstract The NI SbRIO-9631 prototype robot is mobile electro-mechanic system with onboard FPGA-based reconfigurable digital control and signal processing. Its special hardware structure allows fast interfacing with sound- and image processing interface units for complex applications such as processing from advanced man-machine interfaces. This paper presents a new controlling mode of the NI LabVIEW Robotics Starter Kit by arm movement and gestures.

Real-time OFDM transmitter beyond 100 Gbit/s

Real-time OFDM transmitters breaking the 100 Gbit/s barrier require high-performance, usually FPGA-based digital signal processing. Especially the Fourier transform as a key operation of any OFDM system must be optimized with respect to performance and chip area utilization. Here, we demonstrate an alternative to the widely adopted fast Fourier transform algorithm. Based on an extensive yet optimized use of pre-set look-up tables, our FPGA implementation supports fast reconfigurable channel equalization and switching times in the nanosecond range without re-loading any code. We demonstrate the potential of the concept by realizing the first real-time single polarization OFDM transmitter generating a 101.5 Gbit/s data stream by modulating 58 subcarriers with 16QAM.

10.7 Gb/s transmission over 1200 km of standard single-mode fiber by electronic predistortion using FPGA-based real-time digital signal processing

A 10.7 Gb/s electronic predistortion transmitter using FPGA-based real time 2 Samples/bit digital signal processing based on 55-tap finite impulse response filters is described. Transmission over 1200 km of standard single-mode fiber without optical dispersion compensation is demonstrated with an OSNR penalty of only 2.5 dB, compared with back-to- back operation.

Fast and accurate tactile sense feedback estimation for innovative flexible digit for clinical applications

An embedded signal processing system that uses a low number of sensors and cascaded neural networks to provide tactile feedback for a novel flexible digit for clinical applications is described. The design has been implemented as an FPGA-based application-specific digital signal processing circuit that computes real-time tactile feedback with clinically significant accuracy.

Logic Foundry: Rapid Prototyping for FPGA-Based DSP Systems

We introduce the Logic Foundry, a system for the rapid creation and integration of FPGA-based digital signal processing systems. Recognizing that some of the greatest challenges in creating FPGA-based systems occur in the integration of the various components, we have proposed a system that targets the following four areas of integration: design flow integration, component integration, platform integration, and software integration. Using the Logic Foundry, a system can be easily specified, and then automatically constructed and integrated with system level software.

Performance evaluation and optimal design for FPGA-based digit-serial DSP functions

As field programmable gate array (FPGA) technology has steadily improved, FPGAs are now viable alternatives to other technology implementations for high-speed classes of digital signal processing (DSP) applications. Digit-serial DSP architectures have been effective implementation method for FPGAs. In this work, a method of implementing digit-serial DSP architectures on FPGAs is presented, and their performance is evaluated with the objective of finding and developing the most efficient digit-serial DSP architectures on FPGAs. This paper discusses area costs and operational delays of the various digit-serial DSP functions and presents the area/delay models on Xilinx XC4000-series FPGAs. These area/delay models can make predictions of performance and hardware resource utilization before a lengthy layout and synthesis process is undertaken. The results show that the area/delay models proposed here are valid and the digit-serial DSP designs are promising candidates for efficient FPGA implementations.