Field Programmable Gate Array for Data Processing in Medical Systems

Abstract

Twodimensional &Three–dimensional (3-D) image segmentation is on of the most demanding tasks in image processing. It has been proven that only the 14-neighborship of a rhombic dodecahedron can satisfy the aforementioned requirements. The 3-D-GSC process is executed in the following three phases ,coding phases,linking phases,splitting phases. An FPGA-based digital signal processing board optimized for applications needing large memory with high bandwidth has been developed and successfully used for the parallelization of a modern image segmentation algorithm for medical and industrial real-time applications.The Use of this 128-bit coprocessor board is not limited to image segmentation.We propose the perfectly parallelizable 3-D Gray-Value Structure Code (3-D-GSC) for image segmentation on a new FPGA custom machine. This 128-Bit FPGA coprocessing board features an up-to-date Virtex-II Pro architecture, two large independent DDR-SDRAM channels, two fast independent ZBT-SRAM channels, and PCI-X bus and CameraLink interfaces.