Forward Bias Region Research Articles

Carrier transport mechanism of diamond p+–n junction at low temperature using Schottky–pn junction structure

We elucidate the carrier transport mechanism from the p+-layer (metallic-conduction) to the n-layer (band-conduction) in a diamond p+–n junction, which is the basic structure of diamond devices. We fabricate Schottky–pn diodes containing p+–n junctions and analyze the temperature dependence of electrical properties in the forward bias region. At temperatures higher than the cryogenic region, free holes transport from the p+-layer to the n-layer. In the cryogenic region, which is insufficient to excite holes to the valence band, the direct transport of holes from the effective carrier conduction level in the p+-layer to the n-layer by tunneling becomes dominant.

On the applicability of Schottky diffusion theory to non-ohmic cathode contact P3HT:PCBM bulk-hetero junction solar cell

The classical Schottky diffusion theory is applied to a non-ohmic cathode contact P3HT:PCBM bulk-heterojunction solar cell under the assumption of a p-type doped active region. Analytical expressions of the dark current density/voltage (JD/V) characteristic and the open-circuit voltage under illumination VOC are, thus, derived for this cell. They are validated with reference to a complete numerical simulation by the analysis of microelectronic and photonic structures-one-dimensional simulator. The Schottky diffusion theory is shown to be reasonably applicable to modeling the JD/V characteristic in the forward bias region within the range below the built-in voltage Vbi and in the complete reverse bias region. It is demonstrated that depending on the p-doping density NA and the hole mobility μh of the active region, VOC is linearly controlled by the Schottky barrier height φB.

Current–voltage characteristics and photovoltaic effect of a Au/ZnFe2O4/GaN Schottky junction

A Au/ZnFe2O4/GaN Schottky junction with a semiconducting heteroepitaxial ZnFe2O4 insertion layer was prepared by using a combined synthesis process of pulsed laser deposition and sputtering. The current–voltage (I–V) and capacitance–voltage (C–V) characteristics of the Schottky junction, as well as its photovoltaic effect, were investigated under dark conditions or ultraviolet (UV) or blue illumination. Insertion of the semiconducting ZnFe2O4 interlayer clearly induced an increase in the rectification ratio. Based on I–V measurements in a forward bias region, the barrier height and ideality factor of the Au/ZnFe2O4/GaN junction were estimated to be about 0.89 eV and 1.58, respectively. On the other hand, C–V measurement in a reversed bias region suggested a relatively larger barrier height of ∼1.32 eV. The Au/ZnFe2O4/GaN junction showed an open-circuit voltage of ∼0.5 V under UV light and a clear switching photocurrent behavior with UV ON/OFF. A schematic band model with two interfaces, Au/ZnFe2O4 and ZnFe2O4/GaN, was proposed to explain the measured barrier heights in forward and reverse bias regions.

Temperature and voltage dependence C–V and G/ω–V characteristics in Au/n-type GaAs metal–semiconductor structures and the source of negative capacitance

To investigation the phenomena of negative capacitance, we examined the capacitance–voltage (C–V), conductance–voltage (G/ω–V), and series resistance–voltage (RS–V) properties of Au/n-type GaAs metal–semiconductor (MS) structure in the different temperatures (80–415 K) and + 5 V and − 5 V voltages at 500 kHz. Because metal–semiconductor structures play a crucial role not only for compensating the electronic devices but also in determining different functionalities in nano-structure devices. In the forward bias region (after 1.50 V), capacitance–voltage curves show a negative capacitance behavior. The experimental results obtained showed that the C–V and G/ω–V curves are strong functions of temperature and bias voltage especially in the accumulation region, and also the strong negative capacitance behavior is always accompanied after + 1.5 voltage for capacitance–voltage curves at all temperatures. That is, C–V characteristics are exhibited a behavior transition from the positive to negative value after 1.5 V. As the C values decreases, G/ω increases in the positive voltage region. This negative behavior for C–V curves in the forward bias regions is explainable by considering the losses of interface charge at occupied regions below Fermi level due to impact ionization processes. Also, these behavior values can also be attributed to the increase in the polarization particularly at low temperatures and the introduction of more carriers in the structure.

Negative capacitance effect of Cu–TiC thin film deposited by DC magnetron plasma

The quest for low power consumption devices with new functionalities has made the negative capacitance (NC) effect, the most captivating and studied phenomenon. The NC effect is observed in Cu–TiC thin film at a low-frequency range between 112.9 Hz and 2 kHz. The Cu–TiC thin film was deposited on Si (100) substrate by DC magnetron co-sputtering process and then annealed in a vacuum at different temperatures (100–600°C). The magnitude of NC increased from −0.016 to −27.5 µF after annealing. The NC behaviour is also observed in the forward biased region of the capacitance–voltage (C–V) characteristics. The current–voltage (I–V) characteristics reveal the decreasing static and dynamic resistance for higher annealed films. An improved electrical conductivity (27.70 × 103 to 384.62 × 103 S m−1) is evidenced with decreasing ideality factor (2.01–0.55) in the post-annealed films. The films were found to be polycrystalline from X-ray diffraction patterns with Cu and TiC phases. Raman studies have also confirmed the presence of Cu and TiC vibrational modes in all films. The intensity of C peaks detected at 1359 cm−1 (D peak) and at 1590 cm−1 (G peak) in the as-deposited film decreased after annealing. The annealing effect reduced the amount of unreacted carbon and contributed to form stoichiometric TiC from non-stoichiometric TiC.

Current-induced degradation process in (In)AlGaN-based deep-UV light-emitting diode fabricated on AlN/sapphire template

A comprehensive analysis of the degradation behavior of (In)AlGaN-based deep-ultraviolet light-emitting diode (DUV LED) stressed at a constant dc current of 60 mA has been presented. This work is based on combined X-ray diffraction (XRD), atomic force microscopy (AFM), electroluminescence (EL), cathodoluminescence (CL), current-voltage (I–V) and capacitance-voltage (C–V) characteristics. We used XRD and AFM data to investigate the structural properties of the epilayer. The EL spectrum shows two clear emission peaks at around 4.71 and 3.77 eV and a plateau region within 4.24 to 3.82 eV. To know the origin of the plateau region and the peak at 3.77 eV, we performed CL measurement. As a consequence of constant current stress, we obtained the following results: (1) a gradual degradation in EL power due to increase of Shockley–Read–Hall (SRH) recombination and the generation of new point defects in the active region; (2) a significant improvement in the leakage current, that is attributed to the enhance in trap assisted tunneling; and (3) a strong increment in the device capacitance in both reverse and forward bias regions, that is ascribed to the improvement in the net charge concentration and their redistribution in the active region of the LED.

Structural and Electrical Investigation of Porous GaAs Layers on Different Crystallographically Oriented GaAs Substrates

In this paper, electrochemical anodization was used to fabricate porous layers on n-type GaAs substrates with different orientations, i.e., (511)A, (100) and (111)B, under the same experimental conditions. Scanning electron microscopy (SEM), atomic force microscopy (AFM), and x-ray diffraction (XRD) were used to characterize the formed porous layers, with respect to the substrate orientation. Results obtained from SEM and AFM data are evidence of the formation of GaAs nanocrystallites and reveal that pores grow along definite crystallographic directions. XRD analysis confirm the single crystalline structure of porous layers and a relative peak shift as compared to GaAs, indicating a change in the lattice constant due to strain effects. The photoluminescence spectra of the porous layers showed red PL bands attributed to quantum confinement effects in GaAs nanocrystallites. The investigated current–voltage (I–V) in the forward bias region demonstrates that the transport mechanism in the Au/porous-GaAs/GaAs structures was governed by space-charge-limited current (SCLC). In fact, non-saturating behavior was observed in the reverse bias I–V characteristics due to both the effective barrier height dependence on the electric field and the thermionic field emission.

A SYSTEMATIC STUDY ON THE DIELECTRIC RELAXATION, ELECTRIC MODULUS AND ELECTRICAL CONDUCTIVITY OF Al/Cu:TiO2∕n-Si (MOS) STRUCTURES/CAPACITORS

The various levels (5%, 10% and 15%) of Cu-doped TiO2 thin films were grown on the [Formula: see text]-type silicon (Si) wafer by spin coating technique to obtain Al/(Cu:TiO[Formula: see text]/[Formula: see text]-Si (MOS) capacitors. Both the real and imaginary components of complex dielectric ([Formula: see text], complex electric modulus ([Formula: see text], loss tangent (tan [Formula: see text] and alternating electrical conductivity ([Formula: see text] of the obtained Al/(Cu:TiO[Formula: see text]-Si (MOS) capacitors were studied by taking into account the effects of Cu-doping levels into TiO2 viaimpedance spectroscopy method (ISM) in the wide range voltage ([Formula: see text][Formula: see text]V) and frequency (10[Formula: see text]kHz–1[Formula: see text]MHz). All the obtained dielectric parameters were obtained as strongly dependent on frequency, voltage and Cu doping level. The observed anomalous peak in the forward bias region both in the real and imaginary components of [Formula: see text], tan [Formula: see text], complex electric modulus ([Formula: see text] and [Formula: see text] were attributed to the Cu:TiO2 interlay er, series resistance ([Formula: see text], surface states ([Formula: see text], interfacial/surface and dipole polarizations. The higher values of [Formula: see text] at low and intermediate frequencies implied that [Formula: see text] have enough time to follow external ac signal, and also dipoles respond to the applied field to reorient themselves. Consequently, the fabricated Al/(Cu:TiO[Formula: see text]-Si can be successfully used as MOS capacitor or MOS-field-effect transistor (MOSFET) in the industrial applications in near future.

Temperature and frequency effects on electrical and dielectric properties of n-4H SiC based metal–insulator-semiconductor (MIS) diode interlayered with Si3N4 thin film

Effects of frequency and temperature variations on the electrical properties of Au/Si3N4/n-4H SiC diode were investigated. The diode responses to the change in frequency with applied AC signal of varying frequencies and to the change in temperature controlled by cryogenic control system were discussed with considering possible deviation from ideality and effects of interface states at the junction. Depending on its capacitive and conductive characteristics, internal parasitic resistances were associated with the observed dielectric behaviors of the diode. With the use of Si3N4 layer, the values of complex dielectric constant were extracted and this parameter was found to be in a strong dependence of interface changes in low frequency region whereas this variation was very low at higher frequencies. In addition, there is a slight decrease in the dielectric constant with increasing temperature whereas the values of dielectric loss give a remarkable response to the temperature at forward bias region. Depending on these profiles, AC conductivity values were found in decreasing behavior with both frequency and temperature. From the temperature dependent behaviors, activation energies were calculated from the corresponding Arrhenius plots. Together with the series resistance of the diode and density of interface states, interface polarization was found in a dominant role in both complex dielectric and electric modulus characteristics of the diode.

Charge-Based Compact Model of Gate Leakage Current for AlInN/GaN and AlGaN/GaN HEMTs

The gate leakage current is analytically modeled for AlInN/GaN and AlGaN/GaN high-electron mobility transistor (HEMT) devices using a charge-based approach. Four different current mechanisms, namely Fowler–Nordheim tunneling (FNT), Poole–Frenkel emission (PFE), thermionic emission (TE), and defect-assisted tunneling (DAT) are considered. FNT and PFE are two dominant mechanisms in the reverse bias region, while TE and DAT are significant in forward and near zero gate bias regions, respectively. This model is implemented in Verilog-A and validated by comparison with experimental data for both AlInN/GaN and AlGaN/GaN HEMTs. It is shown that the model is able to capture the effects of Al molar fraction, barrier thickness, and temperature on gate leakage current over a wide range of gate and drain voltages.

Frequency and voltage dependent electrical properties of YMn0.90Os0.10O3 thin film on the SiO2/p-Si substrate

The YMn0.90Os0.10O3 (YMOO) thin film was deposited on the SiO2/p-Si substrate via using radio frequency (rf) magnetron sputter method. Voltage dependent electrical properties of the Al/YMOO/SiO2/p-Si/Al structure were investigated at various frequency and ambient condition. Capacitance-voltage (C-V) measurements showed that the capacitance has an accumulation region at positive or forward bias region. Conductance-voltage (G-V) characteristics of the device displayed that the G increases with increasing frequency. Series resistance, Rs, of the device was derived from C-V and G-V measurements and the Rs-V characteristic exhibited strongly frequency dependency. Frequency dependent interface state density, Nss, was calculated according to the Hill-Coleman relation, which decreases as frequency increases. The corrected capacitance (Cc) and conductance (Gc) results revealed that the effect of series resistance on the electrical properties cannot be ignored.

Identifying of series resistance and interface states on rhenium/n-GaAs structures using C–V–T and G/ω–V–T characteristics in frequency ranged 50 kHz to 5 MHz

In this study, Re/n-GaAs with a native oxide layer based on metal–semiconductor (MS) structures were produced and then, the capacitance–voltage–temperature (C–V–T) and the conductance–voltage–temperature (G/ω–V–T) data of them were obtained in the frequency ranged 50 kHz to 5 MHz. Using the raw data, the electronic parameters was calculated by the developed LabVIEW-based program. Methodologically, the series resistance (Rs) values were calculated from the measured capacitance (Cm) and conductivity (Gm) values, while the interface state (Nss) values were obtained from using the combined high (CHF)–low (CLF) frequency capacitance method by Nicollian and Brews. Experimentally, the C values increased with a decreasing frequency, while decreased with increasing temperatures in the depletion and accumulation regions. On the other hand, G/ω values decreased with increasing frequency in forward and reverse bias regions. It can be attributed that, the C and the G/ω values are quite affected by the presence of the Rs and the Nss in the forbidden energy gap and a native oxide layer between M and S. The Rs–V–T curves have especially peaks in accumulation and depletion regions at low frequency values, whereas these peaks decreased at high frequencies. In addition, the Nss–V–T curves give peaks in the range of − 0.1 V to 0.7 V at variable temperatures and the Nss values decrease with increasing temperature and shift towards negative bias regions. Experimental results indicate that the Rs and Nss are important parameters and so, these parameters must be considered in sensor applications based on Re/n-GaAs structures.

Analysis of forward and reverse biased current–voltage characteristics of Al/Al2O3/n-Si Schottky diode with atomic layer deposited Al2O3 thin film interlayer

The dark current–voltage ( $$I{-}V$$ ) characteristics of Al/Al2O3/n-Si Schottky diode are investigated in a wide temperature range of 260–360 K. The diode shows four orders of magnitude rectification. In forward and reverse bias regions, the temperature-dependent $$I{-}V$$ characteristics are detailed in terms of diode parameters and dominant conduction mechanisms. Due to the existence of Al2O3 film layer and series resistance in the diode structure, current flow under the forward bias is observed in a deviation from pure exponential characteristics. The diode parameters are estimated from thermionic emission model with non-unity ideality factor, and this non-ideal behavior is resulted in the ideality factors greater than two. In addition to these values, zero-bias barrier height is found to be strongly temperature dependent, and this variation indicates a presence of inhomogeneties in the barrier according to Gaussian distribution (GD) approximation. This fact is investigated plotting characteristic plot of this model and by extracting mean barrier height with its standard deviation. In order to complete the work on the forward I–V region, the carrier transport characteristics of the diode are explained on the basis of thermionic emission mechanism with a GD of the harrier heights. In accordance with this approximation, the conventional Richardson plot exhibits non-linearity behavior and modified current relation based on GD model is used to calculate mean barrier height and Richardson constant. In addition, the values of parasitic resistances are determined using Ohm’s law as a function of temperature for all bias voltage spectra. In the reverse bias region, Poole–Frenkel effect is found to be dominant on the conduction associated with the barrier lowering, and barrier height in the emission process from the trapped states, and high-frequency dielectric constant of Al2O3 film layer is calculated.

Significant Degradation of AlGaN/GaN High-Electron Mobility Transistors With Fast and Thermal Neutron Irradiation

The AlGaN/GaN high-electron mobility transistors (HEMTs) were irradiated with fast and thermal neutrons at various fluences. Output, transfer, and gate-leakage characteristics were analyzed in detail before and after irradiation. After irradiation by 14-MeV neutrons, the electrical characteristics of the devices gradually degraded as the fluence increased. After irradiation by thermal neutrons at a fluence of $2.12 \times 10^{16}$ cm−2, the electrical characteristics of devices significantly decreased. Neutrons are believed to introduce a negatively charged acceptorlike deep level in the AlGaN layer, which can deplete 2DEG in the channel, raise the energy band, and shift the threshold voltage to positive values. Such an enhanced barrier can significantly suppress the gate Schottky leakage current of AlGaN/GaN HEMTs in both the reverse and forward bias regions. After the thermal neutron radiation, the quality of Schottky contacts deteriorated significantly.

Effects of (0.01Ni-PVA) interlayer, interface traps (Dit), and series resistance (Rs) on the conduction mechanisms(CMs) in the Au/n-Si (MS) structures at room temperature

In order to determine effects of interlayer, Dit, and Rs on the CMs, both Au/n-Si and Au/(0.01Ni-PVA)/n-Si (MPS) structures were fabricated on the n-Si wafer and their electrical parameters were extracted from the current-voltage (I-V) and capacitance-voltage (C-V) measurements. The ideality factor (n), zero-bias barrier height (ΦBo), rectifying rate (RR at ±5V), Rs, shunt resistances (Rsh), and density of Dit (at 0.40eV) values were found from the I-V data as 1.944, 0.733 eV, 3.50×103, 64.8 , 0.23 M, 1.62x1013 eV-1cm-2 for MS and 1.533, 0.818 eV, 1.15×107, 5.0 , 57.5 M, 8.82x1012 eV-1cm-2 for MPS. Fermi energy (EF), barrier height (ΦB(C-V)), depletion-layer width (WD) values were obtained from the C-V data as 0.239 eV, 0.812 eV, 1.14x10-4 cm for MS and 0.233 eV, 0.888 eV, 9.31x10-5 cm for MPS. These results indicated that the MPS structure has lower Rs, Dit, leakage current and higher RR, Rsh, BH compared with MS and so this interlayer can be successfully used instead of conventional insulator interlayer. The Ln(I)-Ln(V) plot at forward-bias region has three linear parts corresponding to the low, intermediate, and higher voltages. In these regions; conduction mechanism (CM) is governed by ohmic, trap charge-limited current (TCLC) and space charge-limited current (SCLC), respectively.

Low-Power Graphene/ZnO Schottky UV Photodiodes with Enhanced Lateral Schottky Barrier Homogeneity.

The low-power, high-performance graphene/ZnO Schottky photodiodes were demonstrated through the direct sputter-growth of ZnO onto the thermally-cleaned graphene/SiO2/Si substrate at room temperature. Prior to the growth of ZnO, a thermal treatment of the graphene surface was performed at 280 °C for 10 min in a vacuum to desorb chemical residues that may serve as trap sites at the interface between graphene and ZnO. The device clearly showed a rectifying behavior with the Schottky barrier of ≈0.61 eV and an ideality factor of 1.16. Under UV illumination, the device exhibited the excellent photoresponse characteristics in both forward and reverse bias regions. When illuminating UV light with the optical power density of 0.62 mW/cm2, the device revealed a high on/off current ratio of >103 even at a low bias voltage of 0.1 V. For the transient characteristics upon switching of UV light pulses, the device represented a fast and stable photoresponse (i.e., rise time: 0.16 s, decay time: 0.19 s). From the temperature-dependent current–voltage characteristics, such an outstanding photoresponse characteristic was found to arise from the enhanced Schottky barrier homogeneity via the thermal treatment of the graphene surface. The results suggest that the ZnO/graphene Schottky diode holds promise for the application in high-performance low-power UV photodetectors.

Surface plasmonic effect of nanoparticle-like silver nanostructure on the high responsivity of visible/infrared silver-based heterojunction photodetector

ABSTRACTThe fabrication of a silver (Ag) based photodetector on a silicon dioxide/p-silicon (SiO2/p-Si) substrate using direct current (DC) magnetron sputtering is demonstrated. The proposed method deposits a nanoparticle-like Ag thin film that favours the photoconduction mechanism under light illumination at 468 nm and laser illumination at 660 and 980 nm. The thin film is characterized using scanning electron microscope (SEM), energy dispersive x-ray (EDX), x-ray diffraction (XRD), Raman scattering, photoluminescence (PL) and ultraviolet–visible (UV–VIS) analysis. Current–voltage (I–V) analysis and the calculated rectifying ratio (RR) suggests the establishment of good Schottky contacts for incident light/laser at 468, 660 and 980 nm, with good responsivity towards light and laser illumination in the forward and reverse DC bias regions. The responsivity increases as the wavelength decreases from 980 nm → 660 nm → 468 nm, with the highest responsivity of 213.7 mAW−1 at 468 nm indicating better photoconduction at low light powers.

Evaluation of temperature dependent electrical transport parameters in Fe3O4/SiO2/n-Si metal–insulator-semiconductor (MIS) type Schottky barrier heterojunction in a wide temperature range

In this manuscript, we reported the electrical characteristics and structural analysis of In/Fe3O4/SiO2/n-Si/In MIS-type SBD heterostructure comprehensively in the temperature range 10–300 K using I–V, XRD, TEM and AFM measurements. Pulsed laser deposition in association with DC magnetron sputtering techniques has been utilized to fabricate the proposed In/Fe3O4/SiO2/n-Si/In heterojunction. The fabricated heterojunction revealed that the I–V curves are non-linear and asymmetric in nature. Using these I–V curves in the forward-bias region, SBH is calculated as 0.02 eV at 10 K and 0.74 eV at 300 K. On the other hand, the ideality factor (n) value was calculated as 7.55 at 10 K and 1.37 at 300 K. The series resistance (RS) values were also evaluated using Chenug’s method and the values were 1121 Ω at 10 K and 334 Ω at 300 K. The dependence of important diode parameters such as SBH, ‘n’ and ‘RS’ on measurement temperature was effectively explained firstly on account of triple Gaussian distribution of barrier heights with the help of barrier inhomogeneities of the prepared heterojunction. The value of the Richardson’s constant calculated for the fabricated In/Fe3O4/SiO2/n-Si/In heterojunction in the 110–300 K temperature regime was calculated to be 115.26 A/cm2K2 and is approximately equal to the theoretical value of 120 A/cm2K2 for n-type Si. In addition, the higher value (greater than one) of ideality factor at all operating temperatures from 10–300 K demonstrated that the probable current transport across the Fe3O4/SiO2/n-Si junction is not only due to the thermionic emission (TE) mechanism. Hence, to reveal the origin of current transport mechanism i.e., other than TE, we noticed that the governing current transport process through the fabricated hetrojunction is mainly due to the tunneling assisted Poole–Frenkel class of emission across the Fe3O4/SiO2/n-Si junction which is found to be temperature-dependent.

Volatile Memory Characteristics of a Solution-Processed Tin Oxide Semiconductor

In this letter, we demonstrate and study the volatile memory characteristics of the sol-gel SnOx semiconductor. The SnOx exhibits a significant self-rectifying behavior and high nonlinearity. Low reverse-biased currents and high forward-biased currents are observed in the positive and negative voltage regions, respectively. The rectifying ratio can reach $\textsf {3.7} \times \textsf {10}^{\textsf {5}}$ , and the selection ratio (I@ $\text{V}_{\textsf {read}}$ /I@0.5V $_{\textsf {read}}$ ) is $10^{\textsf {2}}$ . A pinched current hysteresis is found in the forward-biased region, which indicates the volatile memory characteristics of the SnOx memory. The resistance ratio between the high-resistance state and low-resistance state is ~ $10^{\textsf {5}}$ . In addition, the stability test reveals that the memory can repeatedly operate for over $\textsf {1.5}\times \textsf {10}^{\textsf {3}}$ cycles.

Electrical Characterization of ZnInSe2/Cu0.5Ag0.5InSe2 Thin-Film Heterojunction

ZnInSe2/Cu0.5Ag0.5InSe2 diode structures have been fabricated by thermal evaporation of stacked layers on indium tin oxide-coated glass substrates. Temperature-dependent dark current–voltage measurements were carried out to extract the diode parameters and to determine the dominant conduction mechanisms in the forward- and reverse-bias regions. The heterostructure showed three order of magnitude rectifying behavior with a barrier height of 0.72 eV and ideality factor of 2.16 at room temperature. In the high forward-bias region, the series and shunt resistances were calculated with the help of parasitic resistance relations, yielding room-temperature values of 9.54 × 102 Ω cm2 and 1.23 × 103 Ω cm2, respectively. According to the analysis of the current flow in the forward-bias region, abnormal thermionic emission due to the variation of the ideality factor with temperature and space-charge-limited current processes were determined to be the dominant conduction mechanisms in this heterostructure. In the reverse-bias region, the tunneling mechanism was found to be effective in the leakage current flow with trap density of 106 cm−3. Spectral photocurrent measurements were carried out to investigate the spectral working range of the device structure. The main photocurrent peaks observed in the spectrum corresponded to the band-edge values of the active thin-film layers.