Flat Band Condition Research Articles

Substrate-dependent electronic structure and film formation of MAPbI3 perovskites

We present investigations on the interface formation between the hybrid perovskite MAPbI3 and various substrates, covering a wide range of work functions. The perovskite films are incrementally evaporated in situ while the electronic structure is evaluated using photoelectron spectroscopy. Our results show that there is an induction period in the growth of the perovskite during which volatile compounds are formed, catalyzed by the substrate. The duration of the induction period depends strongly on the nature of the substrate material, and it can take up to 20–30 nm of formal precursor deposition before the surface is passivated and the perovskite film starts forming. The stoichiometry of the 2–3 nm thin passivation layer deviates from the expected perovskite stoichiometry, being rich in decomposition products of the organic cation. During the regular growth of the perovskite, our measurements show a deviation from the commonly assumed flat band condition, i.e., dipole formation and band bending dominate the interface. Overall, the nature of the substrate not only changes the energetic alignment of the perovskite, it can introduce gap states and influence the film formation and morphology. The possible impact on device performance is discussed.

Internal luminescence efficiencies in InGaP/GaAs/Ge triple-junction solar cells evaluated from photoluminescence through optical coupling between subcells.

In-situ characterization is one of the most powerful techniques to improve material quality and device performance. Especially in view of highly efficient tandem solar cells this is an important issue for improving the cost-performance ratio. Optical techniques are suitable characterization methods, since they are non-destructing and contactless. In this work, we measured the power dependence of photoluminescence (PL) from the InGaP and GaAs subcells of an industry-standard triple-junction solar cell. High luminescence yields enhance the luminescence coupling, which was directly verified by time-resolved PL measurements. We present a new method to determine the internal luminescence efficiencies of InGaP and GaAs subcells with the aid of luminescence coupling. High luminescence efficiencies of 90% for GaAs and more than 20% for InGaP were found, which suggest that the material quality of the grown GaAs layer is excellent while the intrinsic luminescence limit of InGaP is still not reached even for high excitation conditions. The PL method is useful for probing the intrinsic material properties of the subcells in flat band condition, without influence of transport. Since no calibration of absolute PL is required, a fast screening of the material quality is possible, which should be extremely helpful for the solar cell industry.

Extraction of bulk and interface trap densities in amorphous InGaZnO thin-film transistors

The authors determine the density of interface and bulk trap states in the amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) by using a simple extraction method. To determine the bulk trap density, the current–voltage curve is measured between the source and drain electrodes of the TFT at room temperature under the flat-band condition. In the high voltage region, the carrier transport is well described by the space charge limited current controlled by the bulk trap states that are exponentially distributed in energy with a trap density at the conduction band edge of 6.27 × 1017 cm−3 eV−1 and an inverse slope for the trap distribution of 0.12 eV. The density of traps at the a-IGZO/gate dielectric interface is calculated by subtracting the bulk trap components from the density of total subgap trap states extracted from the subthreshold slope in the transfer curve and the frequency-independent capacitance-voltage characteristics. The experimental results show that the contribution of the interface trap is more significant compared to that of the bulk trap in the subgap density of states of the fabricated a-IGZO TFTs.

New Advances in Ambient Pressure X-Ray Photoelectron Spectroscopy: Operando Probing of the Electrical Double Layer at the Solid/Liquid Interfac

The conceptual model of the electrical double layer (EDL) constitutes one of the pillars of modern electrochemistry. Although structural and electrical models of the organization of ions and solvent in the EDL have been developed and used, a direct operando observation (defined here as a function of the applied potential) of the potential drop within the EDL has not been achieved so far because of the unavailability of the appropriate experimental tools. To address this missing need, we performed operando ambient pressure X-ray photoelectron spectroscopy (APXPS) ( [i] , [ii] ) at the working electrode/liquid electrolyte interface ( [iii] , [iv] , [v] , [vi] , [vii] ) using an excitation energy of 4.0 keV ( [viii] , [ix] ). The advantage of using ‘tender’ X-rays (2.0 keV – 8.0 keV) relies on the fact that the photoelectron inelastic mean free path (IMFP) in an aqueous electrolyte and for escaping photoelectrons with a kinetic energy >3500 eV is about 10 nm. This provides the ability to directly probe the electrical potential experienced by ions and molecules ( [x] , [xi] , [xii] ) in a 10-30 nm-thick electrolyte layer (the probed volume given by 3 IMFP), a dimension that coincides with the thickness of the double layer for a dilute solution (Figure 1). For a metal/liquid interphase, the metal core level binding energies remain constant with respect to various applied potentials, i.e. flat-band conditions are maintained because metals cannot support electric fields in their bulk, and thus have a constant potential within the metal. Therefore, the Galvani potential at the junction drops across the EDL (Figure 1). The key spectroscopic parameter used in our study to probe the potentials within the EDL is the FWHM of the core level peaks from elements within the electrolyte, which undergo a broadening as the potential drop in the EDL changes with the applied potential (Figure 1). The observed spectral broadening for elements in the electrolyte (such as O 1s from the water if using an aqueous solution), is caused by the electric field in the double layer originated by the potential drop. The water molecules in the electrolyte experience different electric potentials as function of their position within the potential drop (distance normal to the electrode surface); consequently, the corresponding escaping O 1s photoelectrons are characterized by different apparent binding energies (referenced to the Fermi level of the electrode) [xiii] . The final result of the convolution of the single shifted O 1s core level photoelectron peaks leads to the experimentally observed spectral broadening, which becomes broader the larger the electrode potential for a given EDL thickness (i.e. the higher the potential drop within the double layer, compared to the potential of zero charge (PZC) conditions) [xiii] . The current results pave the way for studying the EDL dynamics in more complicated systems, such as redox reactions at photoactive semiconductor interfaces and in non-aqueous electrolytes, to name a few. The knowledge gained from this method will thus impact a wide range of scientific fields, including electrochemical conversion and storage of energy, environmental sciences and biology. [i]. M. Salmeron, R. Schlögl, Surf. Sci. Rep., 2008, 63, 169. [ii]. D. E. Starr, Z. Liu, M. Hävecker, A. Knop-Gericke, H. Bluhm, Chem. Soc. Rev., 2013, 42, 5833. [iii]. H. Siegbahn, K. Siegbahn, J. Electron Spectrosc. Relat. Phenom., 1973, 2, 319. [iv]. H. S. Casalongue, S. Kaya, V. Viswanathan, D. J. Miller, D. Friebel, et al., Nat. Comm., 2013, 4:2817. [v]. R. Arrigo, M. Hävecker, M. E. Schuster, C. Ranjan, E. Stotz et al., Angew. Chem. Int. Ed., 2013, 52, 1. [vi]. Y. T. Law, S. Zafeiratos, S. G. Neophytides, A. Orfanidi, D. Costa, et al., Chem. Sci., 2015, 6, 5635. [vii]. J.-J. Velasco-Velez, V. Pfeifer, M. Hävecker, R. S. Weatherup, R. Arrigo, et al., Angew. Chem. Int. Ed., 2015, 54, 14554. [viii]. S. Axnanda, E. J. Crumlin, B. Mao, S. Rani, R. Chang, et al., Sci. Rep., 2015, 5:9788. [ix]. M. F. Lichterman, S. Hu, M. H. Richter, E. J. Crumlin, S. Axnanda, et al., Energy Environ. Sci., 2015, 8, 2409. [x]. M. F. Lichterman, M. H. Richter, S. Hu, E. J. Crumlin, S. Axnanda, et al., J. Electrochem. Soc., 2016, 16 3, 139. [xi]. S. Nemšák, A. Shavorskiy, O. Karslioglu, I. Zegkinoglou, A. Rattanachata, et al., Nature Comm., 2014, 5:5441. [xii]. O. Karslioglu, S. Nemšák, I. Zegkinoglou, A. Shavorskiy, M. Hartl, et al., Faraday Discuss., 2015, 180, 35. [xiii]. M. Favaro, B. Jeong, P. N. Ross, J. Yano, Z. Hussain, Z. Liu, E. J. Crumlin, submitted. Figure 1

Manipulation and control of the interfacial polarization in organic light-emitting diodes by dipolar doping

Most of the commonly used electron transporting materials in organic light-emitting diodes exhibit interfacial polarization resulting from partially aligned permanent dipole moments of the molecules. This property modifies the internal electric field distribution of the device and therefore enables an earlier flat band condition for the hole transporting side, leading to improved charge carrier injection. Recently, this phenomenon was studied with regard to different materials and degradation effects, however, so far the influence of dilution has not been investigated. In this paper we focus on dipolar doping of the hole transporting material 4,4-bis[N-(1-naphthyl)-N-phenylamino]-biphenyl (NPB) with the polar electron transporting material tris-(8-hydroxyquinolate) aluminum (Alq3). Impedance spectroscopy reveals that changes of the hole injection voltage do not scale in a simple linear fashion with the effective thickness of the doped layer. In fact, the measured interfacial polarization reaches a maximum value for a 1:1 blend. Taking the permanent dipole moment of Alq3 into account, an increasing degree of dipole alignment is found for decreasing Alq3 concentration. This observation can be explained by the competition between dipole-dipole interactions leading to dimerization and the driving force for vertical orientation of Alq3 dipoles at the surface of the NPB layer.

Current transport mechanisms in mercury cadmium telluride diode

This paper reports the results of modelling of the current-voltage characteristics (I-V) of a planar mid-wave Mercury Cadmium Telluride photodiode in a gate controlled diode experiment. It is reported that the diode exhibits nearly ideal I-V characteristics under the optimum surface potential leading to the minimal surface leakage current. Deviations from the optimum surface potential lead to non ideal I–V characteristics, indicating a strong relationship between the ideality factor of the diode with its surface leakage current. Diode's I–V characteristics have been modelled over a range of gate voltages from −9 V to −2 V. This range of gate voltages includes accumulation, flat band, and depletion and inversion conditions below the gate structure of the diode. It is shown that the I–V characteristics of the diode can be very well described by (i) thermal diffusion current, (ii) ohmic shunt current, (iii) photo-current due to background illumination, and (iv) excess current that grows by the process of avalanche multiplication in the gate voltage range from −3 V to −5 V that corresponds to the optimum surface potential. Outside the optimum gate voltage range, the origin of the excess current of the diode is associated with its high surface leakage currents. It is reported that the ohmic shunt current model applies to small surface leakage currents. The higher surface leakage currents exhibit a nonlinear shunt behaviour. It is also shown that the observed zero-bias dynamic resistance of the diode over the entire gate voltage range is the sum of ohmic shunt resistance and estimated zero-bias dynamic resistance of the diode from its thermal saturation current.

Band alignments in Fe/graphene/Si(001) junctions studied by x-ray photoemission spectroscopy

The control of tunnel contact resistance is of primary importance for semiconductor-based spintronic devices. This control is hardly achieved with conventional oxide-based tunnel barriers due to deposition-induced interface states. Manipulation of single 2D atomic crystals (such as graphene sheets) weakly interacting with their substrate might represent an alternative and efficient way to design new heterostructures for a variety of different purposes including spin injection into semiconductors. In the present paper, we study by x-ray photoemission spectroscopy the band alignments and interface chemistry of iron–graphene-hydrogenated passivated silicon (001) surfaces for a low and a high n-doping concentration. We find that the hydrogen passivation of the Si(001) surface remains efficient even with a graphene sheet on the Si(001) surface. For both doping concentrations, the semiconductor is close to flat-band conditions which indicates that the Fermi level is unpinned on the semiconductor side of the Graphene/Si(001):H interface. When iron is deposited on the graphene/Si(001):H structures, the Schottky barrier height remains mainly unaffected by the metallic overlayer with a very low barrier height for electrons, a sought-after property in semiconductor based spintronic devices. Finally, we demonstrate that the graphene layer intercalated between the metal and semiconductor also serves as a protection against iron-silicide formation even at elevated temperatures preventing from the formation of a Si-based magnetic dead layer.

Performance Enhancement of Metal Floating Gate Memory by Using a Bandgap Engineered High-k Tunneling Barrier

With conventional nonvolatile flash memories approaching their scaling limit from cell-to-cell coupling and stress induced leakage current, many studies have been performed to explore the next generation memory technologies. Metal floating gate (FG) memory is one of the most promising candidates because of its less ballistic transport even with ultrathin floating gate (<10 nm). Enhancd memory performance including fast program speed, excellent data retention and program/erase (P/E) cycling endurance have been repored by P. Blomme et. al from IMEC. Moreover, S. Jayanti et. al explored that full Metal-FG could scaled down to even 1 nm thickness with excellent memory performance. Nevertheless, less attention had been paid on the study of tunneling layer which matches with full Metal-FG. Sufficient gate coupling ratio could obtained by using tunneling barrier without compromising the device performance. In our previous work , both the P/E speed and retention characteristic has been improved in the TaN floating gate flash memory based on the SiO2/HfO2 dual tunneling layer structure.The HfO2 layer adjacent to TaN was expected to suppress the inter-diffusion between tunneling dielectric and TaN FG. In this letter, bandgap engineered of the triple tunneling layer (SiO2/HfO2/Al2O3) has been demonstrated to be an effective method to optimize the performance of TaN Metal-FG. Compared to a device with a single SiO2 tunneling layer, faster program/erase speed and better data retention characteristics have been simultaneously achieved in this proposed structure. The schematic structure of a metal floating gate device is illustrated in Figure 1. P-type Si (100) wafers were cleaned by the standard Radio Corporation of America process. Devices with SiO2 (SiO2-4.5nm), SiO2/HfO2 (SiO2-2.7nm/HfO2-8nm) and SiO2/HfO2/Al2O3 (SiO2-2.7nm/HfO2-4nm/Al2O3-2nm) as tunneling layers are denoted as O-TaN , OH-TaN and OHA-TaN respectively. The thicknesses of tunneling layers were chosen for achieving the same effective oxide thickness (EOT). The memory characteristics such as operation speed and data retention were measured by using Agilent B1500A. The C-V hysteresis memory window of both O-TaN and OH-TaN device have been test. The improvement in the memory window for the OH-TaN device indicates the better carrier trapping capability of the stacked SiO2/HfO2 structure.It also can be attributed to the difference of the effective tunneling distance, which is resulted from the different potential drop when low-k and high-k dielectrics are employed as tunneling layer. Devices with SiO2/HfO2/Al2O3 (OHA) as tunneling layer was further characterized and compared with O-TaN and OH-TaN device. Compared to the O-TaN device, fast P/E speed along with large memory window is achieved with the OH-TaN and OHA-TaN device. Moreover, the device with OHA is slightly more advanced than the device with OH. The improvement of P/E speed in the OH-TaN and OHA-TaN structure can be explained by the energy band diagram under the program bias condition. Owing to the difference of voltage drop and bandgap between SiO2 and high-k (HfO2 and Al2O3), the effective tunneling distance is reduced in a high-k engineered tunneling layer structure. In addition, The reason that devices with OHA as tunneling layer shows slightly faster P/E speed than devices with OH as tunneling layer may attribute to a high defect state density at the interface of HfO2 and Al2O3. We also programmed the devices with an identical initial flat-band voltage to compare their room temperature retention characteristics. The OH-TaN and OHA-TaN structure exhibits negligible decrease in flatband voltage, whereas the control sample shows a significant loss of 2.7 V in flatband voltage in 104s. This can be attributed to the larger physical tunneling layer thicknesses of the engineered ones. The tunneling can be suppressed by large physical thickness under flat band or low electric field conditions. In this paper, a stacked high-k tunneling layer is proposed and investigated for TaN metal floating gate memory application. Compared to a single SiO2 tunneling layer, a stacked SiO2/HfO2 (SiO2-2.7nm/HfO2-8nm) and SiO2/HfO2/Al2O3 (SiO2-2.7nm/HfO2-4nm/Al2O3-2nm) tunneling layer structure have several memory performance improvements: a larger memory window, faster program/erase speed and better data retention characteristics. The improvement of P/E speed in the high-k tunneling barrier structure can be explained by the energy band diagram under the P/E bias condition. the effective tunneling distance is reduced Owing to the difference of voltage drop and bandgap between SiO2 and high-k (HfO2 and Al2O3). The performance enhancement of retention is attributed to the larger physical tunneling layer thicknesses of the high-k engineered ones. This work was supported by the National Natural Science Foundation of China (Grant No. 61306107, No. 61474137, No. 61404168, No. 61404160), China Postdoctoral Science Foundation funded project (No.2014M550866), and the Scientific Research Foundation of CUIT (KYTZ201318, J201404). Figure 1

Suppression of surface leakage current in InSb photodiode by ZnS passivation

We have investigated the suppression of surface leakage current in InSb photodiodes using ZnS passivation. Capacitance-voltage characteristics for metal-insulator-semiconductor (MIS) devices showed that positive fixed charges were introduced in the ZnS film and they compensated the negative fixed charges in InSb. AES and PL analysis revealed that the ZnS films were S-deficient and the positive fixed charges were originated from the sulphur vacancy. An InSb pn photodiode structures passivated with ZnS film deposited at 1.5 A/s showed the lowest surface leakage current, which is consistent with the result that it was close to the ideal flat-band condition. This indicates that deposition of S-deficient ZnS film is an effective way to suppress the dark current in InSb photodiode.

Demonstration of isotype GaN/AlN/GaN heterobarrier diodes by NH3-molecular beam epitaxy

The results of vertical transport through nitride heterobarrier structures grown by ammonia molecular beam epitaxy are presented. Structures are designed with binary layers to avoid the effects of random alloy fluctuations in ternary nitride barriers. The unintentional incorporation of Ga in the AlN growth is investigated by atom probe tomography and is shown to be strongly dependent on both the NH3 flowrate and substrate temperature growth parameters. Once nominally pure AlN layer growth conditions are achieved, structures consisting of unintentionally doped (UID) GaN spacer layers adjacent to a nominally pure AlN are grown between two layers of n+ GaN, from which isotype diodes are fabricated. Varying the design parameters of AlN layer thickness, UID spacer layer thickness, and threading dislocation density show marked effects on the vertical transport characteristics of these structures. The lack of significant temperature dependence, coupled with Fowler-Nordheim and/or Milliken-Lauritsen analysis, point to a prevalently tunneling field emission mechanism through the AlN barrier. Once flatband conditions in the UID layer are achieved, electrons leave the barrier with significant energy. This transport mechanism is of great interest for applications in hot electron structures.

Commensurability oscillations in a lateral superlattice with broken inversion symmetry

We investigate both, experimentally and theoretically, commensurability oscillations in the low-field magnetoresistance of lateral superlattices with broken inversion symmetry. We find that pronounced minima develop in the resistivity when the flat band conditions of several relevant harmonics of the periodic potential nearly coincide.

Electronic Structures of a Well-Defined Organic Hetero-Interface: C&lt;sub&gt;60 &lt;/sub&gt;on Pentacene Single Crystal

Electronic structures of donor-acceptor hetero-interfaces are crucial for performance of organic solar cell devices. In the present study, a well-defined organic molecular interface of pentacene single crystal and C60 overlayer is elucidated by x-ray and ultraviolet photoelectron spectroscopy (XPS and UPS) and photoelectron yield spectroscopy (PYS). An energy level diagram at this hetero-molecular contact in the “head-on” orientation is derived, which reveals the vacuum level alignment and flat-band conditions. [DOI: 10.1380/ejssnt.2015.59]

Effect of thin gate dielectrics and gate materials on simulated device characteristics of 3D double gate JNT

In this paper a novel Silicon based three dimensional (3D) double-gate Junctionless Nanowire Transistor (JNT) of 20nm gate length is proposed. The device characteristics such as gate characteristics and drain characteristics are studied with the help of Sentaurus TCAD by using different gate materials such as Al, Ti, n+ Polysilicon, Au and using different ultra thin gate dielectrics such as SiO2, Si3N4 and HfO2. The effect of various work functions and dielectrics on the threshold voltage of the JNT is also analysed. From the TCAD simulation results it is observed that high-K material (HfO2) as gate dielectric shows better drain characteristics with respect to others. The JNT with Al as gate material gives better current characteristics with respect to others. It is also analysed that under flat-band condition the driving of drain current does not directly depend on the gate-oxide capacitance but depends upon the channel doping concentrations. Thus by choosing the proper gate material and gate dielectric combinations, the desired device characteristics could be obtained for JNT.

Electron-hole recombination on ZnO(0001) single-crystal surface studied by time-resolved soft X-ray photoelectron spectroscopy

Time-resolved soft X-ray photoelectron spectroscopy (PES) experiments were performed with time scales from picoseconds to nanoseconds to trace relaxation of surface photovoltage on the ZnO(0001) single crystal surface in real time. The band diagram of the surface has been obtained numerically using PES data, showing a depletion layer which extends to 1 μm. Temporal evolution of the photovoltage effect is well explained by a recombination process of a thermionic model, giving the photoexcited carrier lifetime of about 1 ps at the surface under the flat band condition. This lifetime agrees with a temporal range reported by the previous time-resolved optical experiments.

Temperature dependent switching behaviour of nickel silicided undoped silicon nanowire devices

AbstractIn this work, we investigate the temperature dependence of electrical switching properties of back‐gated, undoped Si‐nanowire field‐effect transistors with Ni‐silicided source/drain contacts. A simple, phenomenological model illustrates the leading order temperature dependence of the source‐drain current, which originates predominantly from charge carrier injection by tunneling through the Schottky junction. Drain current versus gate voltage measurements have been performed for various temperatures and several drain voltages on a single nanowire device. The temperature dependence of the drain‐source current for specific gate and drain voltages is analysed within the framework of voltage dependent effective barrier heights. As a result, the temperature dependence of the tunnelling current is not only important for the sub‐threshold region, but also plays a significant role in the transistor “on‐state”. In addition, the effective barrier heights for electrons and holes tend towards the natural Schottky barriers of the NiSi2‐Si interface, if the applied external fields generate the case of flat band condition at the injection Schottky barrier, i.e. in the deep “off‐state” region. (© 2014 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Electron-Hole Recombination Time at TiO2 Single-Crystal Surfaces: Influence of Surface Band Bending.

Photocatalytic activity is determined by the transport property of photoexcited carriers from the interior to the surface of photocatalysts. Because the carrier dynamics is influenced by a space charge layer (SCL) in the subsurface region, an understanding of the effect of the potential barrier of the SCL on the carrier behavior is essential. Here we have investigated the relaxation time of the photoexcited carriers on single-crystal anatase and rutile TiO2 surfaces by time-resolved photoelectron spectroscopy and found that carrier recombination, taking a nanosecond time scale at room temperature, is strongly influenced by the barrier height of the SCL. Under the flat-band condition, which is realized in nanometer-sized photocatalysts, the carriers have a longer lifetime on the anatase surface than the rutile one, naturally explaining the higher photocatalytic activity for anatase than rutile.

Electrical characterization of thulium silicate interfacial layers for integration in high-k/metal gate CMOS technology

This work presents a characterization of the electrical properties of thulium silicate thin films, within the scope of a possible application as IL (interfacial layer) in scaled high-k/metal gate CMOS technology. Silicate formation is investigated over a wide temperature range (500–900°C) through integration in MOS capacitor structures and analysis of the resulting electrical properties. The results are compared to those obtained from equivalent devices integrating lanthanum silicate interfacial layers. The thulium silicate IL is formed through a gate-last CMOS-compatible process flow, providing IL EOT of 0.1–0.3nm at low formation temperature and interface state density at flatband condition below 2×1011cm−2eV−1. The effects of a possible integration in a gate-first process flow with a maximum thermal budget of 1000°C are also evaluated, achieving an IL EOT of 0.2–0.5nm, an interface state density at flatband condition ∼1×1011cm−2eV−1 and a reduction in gate leakage current density of one order of magnitude compared to the same stack without IL.

Energy band line-up of atomic layer deposited Al2O3 on β-Ga2O3

Electrical properties of atomic layer deposited Al2O3/β-Ga2O3 interface were investigated. We determined the conduction band offset and interface charge density of Al2O3/β-Ga2O3 interface by analyzing the capacitance-voltage characteristics. The conduction band offset at the Al2O3/β-Ga2O3 interface was found to be 1.7 eV. A large positive sheet charge density of 3.6 × 1012 cm−2 is induced at the Al2O3/β-Ga2O3 interface, which caused a non-zero field of 0.7 MV/cm in the Al2O3 under flat-band conditions in the β-Ga2O3. The forward current-voltage characteristics were found to be related to trap-assisted tunneling.

Band Alignment Measurement of Tunneling Field Effect Transistor Heterojunction

The electrical performance of a tunnel field effect transistor (TFET) depends critically on the band offset at their semiconductor heterojunction. Historically it has been rather difficult to experimentally determine how the electronic band is aligned at the interface. In this talk, I will present and discuss an experimentally unique measurement design to ascertain a complete energy band alignment of the heterojunction using internal photoemission (IPE) spectroscopy. Examples of all three types (I, II, and III) of the band alignment of technologically relevant TFET heterojunction will be presented. Due to small band offsets, IPE usually requires high intensity light sources such as free-electron laser which is not easily accessible. However, it will be shown by using conventional IPE with an experiment procedure that was specifically designed and tailored to enhance sensitivity of electron photoemission from each semiconductor component of the heterojunction over a large band gap insulator, we were able to successfully characterize band alignments of W / Al2O3 / InGaAs / InAs / InP and W / Al2O3 / n+-InAs / p+-Al0.45Ga0.55Sb TFET heterojunction [1]. In both cases, the measurement technique was possible only when the larger band gap semiconductor is on top of the other with the thickness of each layer that was specifically designed to control light absorption and penetration depth. As a results, at the oxide flat-band condition, the barrier height from the top of the InGaAs/InAs valence band and the top of the InP valence band to the bottom of the Al2O3 conduction band is determined to be 3.5 and 2.8 eV, respectively, resulting a 0.7 eV valence band offset at InGaAs / InP interface (Fig. A) . Similarly, for W/ Al2O3 / n+-InAs / p+-Al0.45Ga0.55Sb structure, a 0.4 eV valence band offset at the n+-InAs / p+-Al0.45Ga0.55Sb interface was observed (Fig. B). We have further advanced the method to a more elaborate approach which simultaneously resolves both valence and conduction band offsets at the heterojunction interface without the required layer configuration used in the above case of InGaAs/InAs and InAs/p+ AlGaSb. In the traditional IPE measurement, the hole photocurrent (if present) from semiconductor is negligible compared to the electron photocurrent from the semi-transparent gate (usually a thin metal) due to the much lower quantum yield for hole emission. Recently, we first reported using graphene as transparent electrode to measure the hole photoemission [2]. The two main reasons for graphene as transparent electrode to enhance the hole photocurrent and make it measurable are as follows. First, the high (~97.7%) broad range light transmittance of graphene allows most of the light to reach to the emitter and thus increase external quantum efficiency of the hole emission. Secondly, the availability of large area graphene and its high conductivity make the collection of the emitted carriers more efficient. This new method is demonstrated on a broken gap (type III) InAs / GaSb TFET. The barrier height from the top of InAs and GaSb valence band to the bottom of Al2O3 conduction band is inferred from electron emission whereas hole emissions reveal the barrier height from the top of Al2O3 valence band to the bottom of InAs and GaSb conduction band. As a result, the offset at the broken gap InAs / GaSb interface was uniquely determined and is summarized in Fig. C.This new IPE approach can be extended to determine band alignment of the other technologically relevant heterojunction and 2-dimentional materials as well.

Gallium nitride laser diodes with integrated absorber: on the dynamics of self‐pulsation

AbstractThe dynamics of self‐pulsation in monolithic multi segment GaN‐based laser diodes (LDs) with integrated absorber, and operating at 410 nm is investigated. The bias‐dependent modal absorption of the devices is determined by high resolution Hakki‐Paoli gain spectroscopy. Using a streak camera detection system we measure the pulsation frequency, applying bias voltages up to –40 V to the absorber section of the multi segment LD. Under moderate reverse voltages, to approximately –15 V, the absorption features a quadratic dependence on the bias voltage with a clear minimum corresponding to the flat band conditions. In this regime we observe stabilized relaxation oscillations, with a pulse repetition rate which depends only on the current in the gain section, but not on the reverse bias in the absorber section. At higher reverse voltages a linear increase of the modal absorption is observed. There, the devices switch to the self‐Q‐switching regime which exhibits a linear decrease of the pulsation frequency with increasing reverse bias. (© 2014 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)