Field-effect Transistor Structure Research Articles

Design of Polymer-Based Trigate Nanoscale FinFET for the Implementation of Two-Stage Operational Amplifier

The major motivation behind transistor scaling is the requirement for high-speed transistors with lower fabrication costs. When the fin thickness or breadth is smaller than 10 nm in a trigate FET, charges travel in a nonconfined fashion, resulting in the creation of energy subbands and causing volume inversion. In comparison to the carrier near a surface inversion layer, volume inversion experiences less interface scattering. In large-scale integrations, we have focused on developing a 3D model for surface potential by establishing the three-dimensional Poison’s equation and building a unique fin field-effect transistor (FinFET) structure. In this context, there is a growing interest in developing a low-cost, simple solution that combines plastic (polymer) as a substrate and organic materials to create electronics such as monitors and sensors. The research examines characteristics such as silicon width, oxide thickness, doping concentration, metal work-function about gate, and various surface potentials. For different circuit configurations, it also examines the DC and AC characteristics of the FinFET structure. A differential amplifier is built for RF application based on the device specifications. This work is aimed at improving the semiconductor design structure by adjusting device parameters, analyzing the results, establishing the best FinFET device preferences, and selecting an application for the optimized device. The 3D Poisson’s equation may be used to create an analytical model of a trigate nanosize FinFET, which can then be tested using a TCAD simulator. By constructing such a FinFET, we can structure and analyze various electrostatic parameters. To facilitate the creation of FinFET-based circuits, including product development, a novel transistor needs a creative device basis. The infrastructure’s support denotes a computationally advantageous numerical model that accurately depicts a FinFET. The work presents a compact model for semiconductor manufacturing that permits separate IC productions while achieving higher levels of excellence and using less power. The design outperforms the CMOS by 22.7% in gain, 31.48% in power consumption, and 12.72% in CMRR, while operating at a 5 GHz unity gain frequency.

An enhanced high frequency performance SiC MOSFET with self-adjusting P-shield region potential

An enhanced high frequency (HF) performance SiC metal oxide semiconductor field effect transistor (MOSFET) with self-adjusting P-shield region potential (SA-MOS) is proposed and characterized in this paper. The potential of P-shield region (ground or floating potential) can be adjusted by a depletion P-channel metal oxide semiconductor field effect transistor (PMOS) structure integrated in the SA-MOS. During turn-on of SA-MOS, the channel of integrated PMOS is pinched off and the P-shield region can be at a floating potential. Therefore, SA-MOS shows about 21% specific on-resistance (R on,sp) reduction as compared to the conventional trench gate SiC MOSFET with grounded P-shield (GP-MOS) due to the retraction of depletion layer in drift region. During turn-off of SA-MOS, the integrated PMOS is turned on and the P-shield region is grounded to the source contact. Thus, the high on-state oxide electric field and slower switching speed caused by the floating P-shield region could be eliminated by SA-MOS structure. Furthermore, the gate-to-drain charge (Q gd) of SA-MOS is only 217 nC cm−2 owing to smaller overlap area between drift region and trench gate, which is about 40% lower than that of GP-MOS. The HF figures of merit (HF-FOM= R on,sp × Q gd) for SA-MOS can be as low as 50% or more of GP-MOS. Finally, an analytical model is also developed to describe the variation of P-shield potential in SA-MOS. With the overall improved performance, SA-MOS shows a significant advantage in HF field in comparison with the GP-MOS.

A nanogapped hysteresis-free field-effect transistor

We propose a semi-suspended device structure and construct nanogapped, hysteresis-free field-effect transistors (FETs), based on the van der Waals stacking technique. The structure, which features a semi-suspended channel above a submicrometer-long wedge-like nanogap, is fulfilled by transferring ultraclean boron nitride-supported MoS2 channels directly onto dielectric-spaced vertical source/drain stacks. Electronic characterization and analyses reveal a high overall device quality, including ultraclean channel interfaces, negligible electrical scanning hysteresis, and Ohmic contacts in the structures. The unique hollow FET structure holds the potential for exploiting reliable electronics as well as nanofluid and pressure sensors.

Artificial Synapse Based on 1D/2D Hybrid Heterostructure

Molecular functional devices have been investigated through the study of molecular structure and its corresponding discrete orbital states since it determines the transport behaviors. [1,2] In contrast to the conventional strategy, we have demonstrated a novel strategy and design rule for realizing molecular-scale functions based on the energy band engineering in molecular heterojunction with two-dimensional (2D) semiconductors [3,4]. Recently, we have designed molecular heterojunction selector and the nonlinearity design rule with the role of the molecular dipole moment orientation which controls the band bending of the 2D semiconductor [4]. Likewise, various role of the molecular self-assembled monolayer (SAM) in hybrid heterostructure device with 2D semiconductor can give a novel and diverse functionality to the device that it can be a powerful platform for the next-generation functional devices. We implemented ferrocene substituted alkanethiol SAMs, which is a redox active molecule [5], in 2D MoS2 field-effect transistor (FET) structure. The redox state (oxidation or reduction) of the SAM is controlled through the gate bias and the oxidized molecular states (Fc -> Fc+) can act as a localized gate at the interface between molecule/2D semiconductor (MoS2) which the conductance of the n-type MoS2 channel can be modulated. This MoS2 FET with non-volatile multistate MoS2 channel can be suggested as electrochemically programmed molecular heterojunction artificial synapse.[1] L. A. Bumm, J. J. Arnold, M. T. Cygan, T. D. Dunbar, T. P. Burgin, L. Jones, D. L. Allara, J. M. Tour, P. S. Weiss, Science 271, 1705 ( 1996),.[2] H. Song, Y. Kim, Y. H. Jang, H. Jeong, M. A. Reed, T. Lee, Nature 462, 1039 ( 2009).[3] J. Shin, S. Yang, Y. Jang, J. S. Eo, T.-W. Kim, T. Lee, C.-H. Lee, G. Wang, Nat. Commun. 11, 1 (2020).[4] J. S. Eo, J. Shin, S. Yang, T. Jeon, J. Lee, S. Choi, C.-H. Lee, G. Wang, Adv. Sci. 2101390 (2021).[5] Y. Zhao, S. Bertolazzi, M. S. Maglione, C. Rovira, M. Mas-Torrent, P. Samori, Adv. Mater. 32, 2000740 (2020).

Design and investigation of dielectric modulated triple metal gate-oxide-stack Z-shaped gate horizontal pocket TFET device as a label-free biosensor

In this article, a dielectric modulated triple metal gate-oxide-stack Z-shaped gate horizontal source pocket tunnel field-effect transistor (DM-TMGOS-ZHP-TFET) structure has been investigated for the application of label free-biosensor. This work explores the advantage of gate work function engineering along with the gate-oxide-stack approach for the ZHP-TFET for the first time. An asymmetric nano-cavity is created adjacent to the source-channel junction to immobilize the target biomolecules conjugation to the proposed device. The sensitivity of the device is thoroughly investigated in terms of average subthreshold swing (SS), threshold voltage (V th) and the switching ratio (I on/I off) of the proposed device with the variation of the dielectric constant value inside the nano-gap under the gate electrode. The device characteristics are investigated with different combinations of metal work functions to match the desired feature and sensitivity of the device. In addition, the sensitivity analysis of the proposed device is analyzed in the presence of both positive and negative charged biomolecules in the cavity region to study the charge effect on label-free detection of the device. A comparative study is conducted between a single metal gate (SMG) ZHP-DM-TFET biosensor with the DM-TMGOS-ZHP-TFET biosensor explores the advantage of gate-work function engineering with a gate-oxide-stack approach. Interestingly the DM-TMGOS-ZHP-TFET biosensor shows superior results with a high current ratio sensitivity of 103 which is ten times more than the SMG-ZHP-DM-TFET biosensor and this device also exhibits low subthreshold characteristics.

Ferroelectric Memory Based on Topological Domain Structures: A Phase Field Simulation

The low storage density of ferroelectric thin film memory currently limits the further application of ferroelectric memory. Topologies based on controllable ferroelectric domain structures offer opportunities to develop microelectronic devices such as high-density memories. This study uses ferroelectric topology domains in a ferroelectric field-effect transistor (FeFET) structure for memory. The electrical behavior of FeFET and its flip properties under strain and electric fields are investigated using a phase-field model combined with the device equations of field-effect transistors. When the dimensionless electric field changes from −0.10 to 0.10, the memory window drops from 2.49 V to 0.6 V and the on-state current drops from 2.511 mA to 1.951 mA; the off-state current grows from 1.532 mA to 1.877 mA. External tensile stress increases the memory window and off-state current, while compressive stress decreases it. This study shows that a ferroelectric topology can be used as memory and could significantly increase the storage density of ferroelectric memory.

Highly Sensitive Photodetectors Based on Monolayer MoS2 Field-Effect Transistors.

Molybdenum disulfide (MoS2) is a promising candidate for the development of high-performance photodetectors, due to its excellent electric and optoelectronic properties. However, most of the reported MoS2 phototransistors have adopted a back-gate field-effect transistor (FET) structure, requiring applied gate bias voltages as high as 70 V, which made it impossible to modulate each detecting device in the fabricated array. In this paper, buried-gate FETs based on CVD-grown monolayer MoS2 were fabricated and their electric and photoelectric properties were also systematically investigated. A photoresponsivity of around 6.86 A/W was obtained at 395 nm, under the conditions of zero gate bias voltage and a light power intensity of 2.57 mW/cm2. By application of a buried-gate voltage of 8 V, the photoresponsivity increased by nearly 10 times. Furthermore, the response speed of the buried-gate MoS2 FET phototransistors is measured to be around 350 ms. These results pave the way for MoS2 photodetectors in practical applications.

A novel 4H–SiC MESFET with P-type doping zone and recessed buffer layer

Based on the double recessed 4H–SiC metal semiconductor field effect transistor (DR-MESFET) structure, a new 4H–SiC MESFET with p-type doping zone in drain drift region and recessed buffer layer under the source drift region (PDRB-MESFET) is proposed in this paper. The simulation results show that the breakdown voltage of this novel structure is improved by 63.76% compared with that of DR-MESFET. Thus, the maximum output power density of the device is increased by 72.85%. As for RF, the cutoff frequency decreases by 4.42% due to the increase of gate source capacitance, and RF performance deteriorates slightly. But in general, it is meaningful to exchange a slight decline in RF performance for a significant improvement in DC performance. The length and width of the p-type doping region are optimized and the optimal size of the p-type doping region is obtained.

A Novel S-Gate-Assisted SOI n-MOSFET for Total Ionizing Dose Radiation Reinforcement

In this article, a novel S-gate-assisted silicon-on-insulator n-channel metal–oxide–semiconductor field-effect transistor (SGA SOI n-MOSFET) structure is proposed in order to suppress the total ionizing dose (TID) effect. The new structure settles the radiation-induced leakage current by isolating both the source and drain from the shallow trench isolation (STI) oxides and introducing two auxiliary gates. This work simulates the TID irradiation of three SOI n-MOSFET devices by Sentaurus TCAD and verifies the anti-TID irradiation characteristics of the proposed SGA SOI n-MOSFET. After the novel SGA SOI n-MOSFET was irradiated with 500 krad(Si), the OFF-state leakage current is only marginally increased, the ON-state leakage current is almost unchanged, the threshold voltage drift is 9.423%, and the transconductance degradation is only 7.453%. The simulation results demonstrated the proposed SGA SOI n-MOSFET resisted TID radiation doses up to 500 krad(Si). Meanwhile, the SGA SOI n-MOSFET is much more compact and saves tremendous cost compared with the H-gate-assisted (HGA) SOI n-MOSFET during very large scale integration (VLSI) fabrication and mass production. Moreover, the SGA SOI n-MOSFET solves the disadvantages of the ring-gate-assisted (RGA) SOI n-MOSFET complex aspect ratio <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${W}/{L}$ </tex-math></inline-formula> design. The SGA SOI n-MOSFET offers a better alternative for nonultrahigh radiation dose environments.

A dimethyl methylphonate sensor based on HFIPPH modified SWCNTs

In order to meet the requirements of ultra-fast real-time monitoring of sarin simulator with high sensitivity and selectivity, it is of great significance to develop high performance dimethyl methylphonate (DMMP) sensor. Herein, we proposed a DMMP sensor based on p-hexafluoroisopropanol phenyl (HFIPPH) modified self-assembled single-walled carbon nanotubes (SWCNTs) with field effect transistor (FET) structure. The self-assembly method provides a 4 nanometres thick and micron sized SWCNT channel, with high selectivity to DMMP. The proposed SWCNTs-HFIPPH based sensor exhibits remarkably higher response to DMMP than bare SWCNT based gas sensor within only few seconds. The gas sensing response of SWCNTs-HFIPPH based sensor for 1 ppm DMMP is 18.2%, and the response time is about 10 s. What’s more, the gas sensor we proposed here shows excellent selectivity and reproducibility, and the limitation of detection is as low as ppb level. The proposed method lays the foundation for miniaturization and integration of DMMP sensors, expecting to develop detection system for practical sarin sensing application.

A 4H-SiC trench MOSFET structure with wrap N-type pillar for low oxide field and enhanced switching performance

An optimized silicon carbide (SiC) trench metal-oxide-semiconductor field-effect transistor (MOSFET) structure with side-wall p-type pillar (p-pillar) and wrap n-type pillar (n-pillar) in the n-drain was investigated by utilizing Silvaco TCAD simulations. The optimized structure mainly includes a p+ buried region, a light n-type current spreading layer (CSL), a p-type pillar region, and a wrapping n-type pillar region at the right and bottom of the p-pillar. The improved structure is named as SNPPT-MOS. The side-wall p-pillar region could better relieve the high electric field around the p+ shielding region and the gate oxide in the off-state mode. The wrapping n-pillar region and CSL can also effectively reduce the specific on-resistance (R on,sp). As a result, the SNPPT-MOS structure exhibits that the figure of merit (FoM) related to the breakdown voltage (V BR) and R on,sp () of the SNPPT-MOS is improved by 44.5%, in comparison to that of the conventional trench gate SJ MOSFET (full-SJ-MOS). In addition, the SNPPT-MOS structure achieves a much faster-witching speed than the full-SJ-MOS, and the result indicates an appreciable reduction in the switching energy loss.

The proton flux influence on electrical characteristics of a dual-channel hemt based on GaAs

The results of the simulation the influence of the proton flux on the electrical characteristics of the device structure of dual-channel high electron mobility field effect transistor based on GaAs are presented. The dependences of the drain current ID and cut-off voltage on the fluence value and proton energy, as well as on the ambient temperature are shown.

Toward Efficient Logic-in-Memory Computing With Magnetic Reconfigurable Logic Circuits

Logic-in-memory (LIM) structures are promising candidates to obviate limitations of the conventional von Neumann architecture, especially in big data applications, such as image processing. In this paradigm, simple logic operations are embedded in memory to perform basic processes and consequently decrease the workload of the main processor. This letter presents an efficient hybrid fin field-effect transistor and magnetic tunnel junction (MTJ) logic structure compatible with all kinds of memory and which performs <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nor/or</small> and <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">nand/and</small> operations. The design utilizes MTJs to obtain different voltage levels and two sense amplifiers to generate the outputs. Simulation results assert that the design improves the delay and power by 33% and 20%, respectively, compared to its state-of-the-art counterparts. Moreover, the magnetic LIM structure is appropriately utilized in image processing applications, such as minimum and maximum image filters, for preparing intermediate data. In the case study, high-level simulations indicate that the design reduces the delay and power by 31% and 21%, respectively.

Simulation insights of a new dual gate graphene nano-ribbon tunnel field-effect transistors for THz applications

This paper introduces a dual gate Graphene Nano-Ribbon Tunnel Field Effect Transistor (DG GNR TFET) structure and its performance characteristics are analysed. Technology Computer-Aided Design (TCAD) tool is used to simulate this novel non-silicon GNR TFET and to characterize various parameters of the device. A DG GNR TFET shows better device performance in terms of its surface potential, electric field and ON current (ION). The simulation results show that the proposed structure exhibits better ION/IOFF (109), average sub-threshold swing (43.16 mv/Dec) and threshold (0.3 V) when compared to a conventional Silicon TFET. Design parameters for the device such as dielectric thickness, body thickness, work function, source doping concentration, and channel length are analysed to deduce the fact that GNR can be used as an effective material in TFETs for low power electronics applications. Moreover, key parameters such as transconductance, transconductance generation efficiency and cut-off frequency (THz) are greatly improved in this proposed structure, which is highly desirable for analog/RF applications.

Design, simulation and optimization of multi-layered MoS2 based FET devices

Transition-metal Dichalcogenides (TMDs) materials are getting attention in the emerging trends of electronic devices development for a variety of applications. One of such materials is Molybdenum Disulphide (MoS2) which is best suited for developing deeply scaled field effect transistors (FETs). With the plethora of TMDs available, MoS2 is the most widely studied and used material because of its tunable properties like bandgap, morphology, optical, structural, electrical, flexible etc. This paper represents the design and simulation aspect of the multi-layered MoS2 Based FET devices. Evidence of change in comparative electrical characteristics of MoS2 based FET devices due to variation of thickness and doping of the gate layer are also presented. In this contribution, we have simulated a full-wave model using the COMSOL Multiphysics module for two different thicknesses 0.7 nm and 1 nm. The FET device with 1 nm MoS2 offers a better dynamic range of operation and has a broader spectrum of threshold potential. The characteristic plots of the 1 nm device showed very less deviation from ideal trends than in the 0.7 nm device. The optimized FET structure offers better performance and efficiency in terms of electrical properties.

Self-selective ferroelectric memory realized with semimetalic graphene channel

A new concept of read-out method for ferroelectric random-access memory (FeRAM) using a graphene layer as the channel material of bottom-gated field effect transistor structure is demonstrated experimentally. The transconductance of the graphene channel is found to change its sign depending on the direction of spontaneous polarization (SP) in the underlying ferroelectric layer. This indicates that the memory state of FeRAM, specified by the SP direction of the ferroelectric layer, can be sensed unambiguously with transconductance measurements. With the proposed read-out method, it is possible to construct an array of ferroelectric memory cells in the form of a cross-point structure where the transconductance of a crossing cell can be measured selectively without any additional selector. This type of FeRAM can be a plausible solution for fabricating high speed, ultra-low power, long lifetime, and high density 3D stackable non-volatile memory.

Enhancement-mode normally-off β-Ga2O3:Si metal-semiconductor field-effect deep-ultraviolet phototransistor

In this work, a solar-blind ultraviolet (UV) photodetector based on a three-terminal enhancement-mode (E-mode) Si-doped β-Ga2O3 (β-Ga2O3:Si) metal-semiconductor field-effect transistor structure is demonstrated, whose threshold voltage (V th) and subthreshold swing are 4.04 V and 1.4 V dec−1, respectively. A 400 nm thick β-Ga2O3:Si thin film is prepared on sapphire substrate by using metal-organic chemical vapor deposition method. Controlling the channel currents by the Schottky gate voltage in the dark and under illuminations, the photodetector shows dark current (I dark) as low as 13.4 pA, photo-to-dark current ratio of 4.85 × 104 and linear dynamic range of 29.6 dB, illuminated by 254 nm UV light of 245 μW cm−2. As the UV light is turned on and off, the output current rise and decay time (τ r and τ d) are 420 ms and 350 ms. Moreover, at drain voltage (V ds) of 5 V and gate voltage (V gs) of 0 V, the responsivity (R), specific detectivity (D*) and external quantum efficiency are achieved as 74 A W−1, 2.15 1014 cm Hz1/2 W−1 (Jones) and 3.6 104%, respectively.

Monolayer MoS2 photodetectors with a buried-gate field-effect transistor structure

Unlike zero-bandgap graphene, molybdenum disulfide (MoS2) has an adjustable bandgap and high light absorption rate, hence photodetectors based on MoS2 have attracted tremendous research attention. Most of the reported MoS2 photodetectors adopted back-gate field-effect transistor (FET) structure due to its easy fabrication and modulation features. However, the back-gate FET structure requires very high gate voltage up to 100 V, and it is impossible to modulate each device in an array with this structure independently. This work demonstrated a monolayer MoS2 photodetector based on a buried-gate FET structure whose experimental results showed that both the electrical and photoelectrical properties could be well modulated by a gate voltage as low as 3 V. A photoresponsivity above 1 A W−1 was obtained under a 395 nm light-emitting diode light illumination, which is over 2 orders of magnitude higher than that of a reported back-gate photodetector based on monolayer MoS2 (7.5 mA W−1). The photoresponsivity can be further improved by increasing the buried gate voltage and source-drain voltage. These results are of significance for the practical applications of MoS2 photodetectors, especially in the low voltage and energy-saving areas.

A Study on Nano-Flow Control of Bio-Inspired Nanosized Ion Channel

This study presents the possibility of control of nanofluidics in the bio-inspired nanosized ion channel using a field effect transistor (FET) structure. We analyzed effects from main dominant factors to control the ion flow in nanosized channel such as electro-osmosis, diffusion effect, Coulomb force between ions and pressure force. Additionally, we suggest a strategy to control the ion flow accurately at the specific position in the nanochannel by handling the viscosity, ion molecular density, pressure, gate and trans-cis voltages of FET structure.

Asymmetric doping induced nonlinear electron mobility in double V-shaped quantum well based FET structure under external electric field

The effect of asymmetric doping profile on the electron mobility μ is studied in a Field Effect Transistor (FET) structure based on Al x Ga 1−x As double V-shaped quantum well (D-VQW) in presence of an external electric field F. We introduce asymmetry in the structure by considering different doping concentrations in the side barriers along the substrate and surface. The resultant asymmetric potential is varied as a function of F. Accordingly the energy levels E l and wave functions ξ l within the coupled structure alter. By varying F suitably the resonance of subband states can be realized between the wells. Around the point of resonance, ξ l rearranges significantly. The change in ξ l influences the screened scattering potentials through intersubband effects leading to nonlinear μ. We consider ionized impurity (Imp-) scattering and alloy disorder (Al-) scattering for the D-VQW structure and show that under double subband occupancy, μ has an oscillatory behavior, basically due to Imp-scattering. The oscillatory μ enhances by increasing the well width and central barrier width and also by decreasing the height of the V-shaped well. Our results of nonlinear electron mobility can be employed to tune the transistor performance with gate electric field by adopting an optimized set of structure parameters.