The growing interest for 5G radios pushes technology development towards low-cost and high-performance solutions for operating at microwave and mm-wave. Downscaling CMOS technology has allowed the integration of high-speed transceivers on silicon chips, but high-power amplifiers rely on III-V technologies to deliver the power and efficiency levels required by modern radios.In this work, we motivate the interest of non-Si technologies to meet 5G requirements, and we explore two routes to enable the fabrication of compound semiconductor devices on a large-scale manufacturable Si platform [1,2]. We provide insight on the potential of these new technologies for the design of advanced front-end modules, including modelling and reliability challenges.In the first route (Figure 1(a)), we report on Al(Ga,In)N HEMTs, MISHEMTs and MOSFETs integrated on 200 mm Si wafers using Au-free processing in standard Si CMOS tools, and discuss the performance trade-offs, limitations and solutions. State-of-the-art contact resistance of 0.14 Ω.mm is demonstrated for a non-Au, low thermal budget (<600 oC) contact scheme, as well as a high vertical breakdown voltage (VBD) of >300 V. We show that MISHEMTs, which feature the highest field effect mobility (μFE), >2000 cm2/V.s, and the best 1/f noise performance, have the potential to outperform the other device types in terms of device scalability for high frequency operation. The GaN-on-Si substrate optimization for low RF losses and nonlinear distortion is further discussed.The second route (Figure 1(b)) includes the formation of HBT on Si wafer by selective epitaxy. We demonstrate GaAs/InGaP HBTs grown on a 300 mm Si substrate. A DC current gain of ~112 and breakdown voltage, BVCBO, of 10 V is achieved. The emitter-base and base-collector diodes show an ideality factor of ~1.2 and ~1.4, respectively. This demonstration shows the potential for enabling a hybrid III-V CMOS/ technology for 5G and mm-wave applications, not limited to GaAs but which can also be extended to InGaAs on a 300 mm Si substrate. Figure 1