Ferroelectric Field-effect Transistors Research Articles

Nonvolatile logic inverters based on 2D CuInP2S6 ferroelectric field effect transistors

With the capability of in-memory computing, integrated nonvolatile logic devices can mitigate the back-and-forth movement of data between storage and logic units, thus effectively enhancing computational speed and reducing power consumption. In this work, two-dimensional (2D) CuInP2S6, which reveals robust polarization within a few nanometer thicknesses, was utilized as gate dielectric for ferroelectric field effect transistor (FeFET). Device with a ReS2 channel demonstrated a high on/off ratio of current of 105, accompanied by a substantial hysteresis window of 2.8 V. Additionally, ReS2 FETs, gated with an h-BN layer, exhibited a switch ratio of 108 and minimal hysteresis of 61.6 mV at room temperature, attributed to the atomically flat heterointerface with negligible traps. Leveraging the performance of these devices enabled the creation of a nonvolatile logic inverter, wherein the ReS2/h-BN FET acts as the load transistor, and ReS2/h-BN/CIPS FeFET serves as the driving unit. This configuration stably operates with low power consumption of 0.45 μW and outstanding retention exceeding 1000 s. This work presents a viable device architecture for designing nonvolatile logic circuits applicable in in-memory computing.

Room-temperature modulation of microwave conductivity in ferroelectric-gated correlated oxides

We report the nonvolatile modulation of microwave conductivity in ferroelectric PbZr0.2Ti0.8O3-gated ultrathin LaNiO3/La0.67Sr0.33MnO3 correlated oxide channel visualized by microwave impedance microscopy. Polarization switching is obtained by applying a tip bias above the coercive voltage of the ferroelectric layer. The microwave conductivity of the correlated channel underneath the up- and down-polarized domains has been quantified by finite-element analysis of the tip-sample admittance. At room temperature, a resistance on/off ratio above 100 between the two polarization states is sustained at frequencies up to 1 GHz, which starts to drop at higher frequencies. The frequence-dependence suggests that the conductance modulation originates from ferroelectric field-effect control of carrier density. The modulation is nonvolatile, remaining stable after 6 months of domain writing. Our work is significant for potential applications of oxide-based ferroelectric field-effect transistors in high-frequency nanoelectronics and spintronics.

Ultralow-pressure-driven polarization switching in ferroelectric membranes

Van der Waals integration of freestanding perovskite-oxide membranes with two-dimensional semiconductors has emerged as a promising strategy for developing high-performance electronics, such as field-effect transistors. In these innovative field-effect transistors, the oxide membranes have primarily functioned as dielectric layers, yet their great potential for structural tunability remains largely untapped. Free of epitaxial constraints by the substrate, these freestanding membranes exhibit remarkable structural tunability, providing a unique material system to achieve huge strain gradients and pronounced flexoelectric effects. Here, by harnessing the excellent structural tunability of PbTiO3 membranes and modulating the underlying substrate’s elasticity, we demonstrate the tip-pressure-induced polarization switching with an ultralow pressure (down to 0.06 GPa). Moreover, as an application demonstration, we develop a prototype non-volatile ferroelectric field-effect transistor integrated on silicon that can be operated mechanically and electrically. Our findings underscore the great potential of oxide membranes for utilization in advanced non-volatile electronics and highly sensitive pressure sensors.

Enabling 2D Electron Gas with High Room-Temperature Electron Mobility Exceeding 100cm2 Vs-1 at a Perovskite Oxide Interface.

In perovskite oxide heterostructures, bulk functional properties coexist with emergent physical phenomena at epitaxial interfaces. Notably, charge transfer at the interface between two insulating oxide layers can lead to the formation of a 2D electron gas (2DEG) with possible applications in, e.g., high-electron-mobility transistors and ferroelectric field-effect transistors. So far, the realization of oxide 2DEGs is, however, largely limited to the interface between the single-crystal substrate and epitaxial film, preventing their deliberate placement inside a larger device architecture. Additionally, the substrate-limited quality of perovskite oxide interfaces hampers room-temperature (RT) 2DEG performance due to notoriously low electron mobility. In this work, the controlled creation of an interfacial 2DEG at the epitaxial interface between perovskite oxides BaSnO3 and LaInO3 is demonstrated with enhanced RT electron mobility values up to 119 cm2 Vs-1-the highest RT value reported so far for a perovskite oxide 2DEG. Using a combination of state-of-the-art deposition modes during oxide molecular beam epitaxy, this approach opens up another degree of freedom in optimization and in situ control of the interface between two epitaxial oxide layers away from the substrate interface. Thus this approach is expected to apply to the general class of perovskite oxide 2DEG systems and to enable their improved compatibility with novel device concepts and integration across materialsplatforms.

Plasma Etch of IGZO Thin Film and IGZO/SiO2 Interface Diffusion in Inductively Coupled CH4/Ar Plasmas

ABSTRACTIn this work, the etching characteristics of InGaZnO4 (IGZO) thin films were systemically investigated in inductively coupled CH4/Ar plasmas with various gas ratios, bias voltages, and surface temperatures. The ion flux in the CH4/Ar plasmas was analyzed using bias power and voltage, whereas the relative densities of CH and H radicals were quantified through optical actinometry. The change in CH3 radical density was also estimated based on plasma kinetics analysis. The correlations between the plasma properties and IGZO etch rate were investigated. In CH4/Ar plasmas with CH4 ratios below 80%, the IGZO etch rate increases with a higher CH4 proportion, aligning with the ascending trend of CH3 radical density, which suggests that CH3 radical density acts as a limiting factor (radical‐limited regime). However, the IGZO etch rate decreases when the CH4 ratio exceeds 80%, corresponding to the reduction in ion flux, which indicates that ion flux becomes a limiting factor in this ion‐limited regime. The IGZO etch rate shows a linear relationship with bias voltage and follows the Arrhenius equation with varying surface temperature in plasmas without bias voltage. A spontaneous etch model was proposed based on these relationships. In this model, the IGZO etch rate depends on CH3 radical density and IGZO surface reactivity, where ion bombardment contributes more significantly to surface reactivity than high surface temperature. IGZO thin film was deposited on SiO2 during the fabrication of a 3D stacked ferroelectric field‐effect transistor (FeFET) memory device. The interaction between IGZO and SiO2 during CH4/Ar plasma processing was investigated using time‐of‐flight secondary ion mass spectrometry. The efficacy of removing IGZO atoms that had diffused into the SiO2 network was enhanced when subjected to plasma with a bias voltage, compared to the process without a bias voltage. However, exposure to CH4/Ar plasma resulted in a deeper diffusion of IGZO atoms into the SiO2 network, primarily attributed to ion bombardment rather than elevated surface temperature. A significant improvement in surface smoothness was achieved after IGZO and SiO2 etch by introducing BCl3 into the SiO2 etching chemistry.

Compact Physical Implementation of Spiking Neural Network Using Ambipolar WSe2 n-Type/p-Type Ferroelectric Field-Effect Transistor.

Spiking neural networks (SNNs) are attracting increasing interests for their ability to emulate biological processes, offering energy-efficient computation and event-driven processing. Currently, no devices are known to combine both neuronal and synaptic functions. This study presents an experimental demonstration of an ambipolar WSe2 n-type/p-type ferroelectric field-effect transistor (n/p-FeFET) integrated with ferroelectric Hf0.5Zr0.5O2 (HZO) to achieve both volatile and nonvolatile properties in a single device. The nonvolatile n-FeFET, driven by the stable ferroelectric properties of HZO, exhibits highly linear synaptic behavior. In contrast, the volatile p-FeFET, influenced by electron self-compensation in the ambipolar WSe2, enables self-resetting leaky-integrate-and-fire neurons. Integrating neuronal and synaptic functions in the same device allows for compact neuromorphic computing applications. Additionally, simulations of SNNs using experimentally calibrated synaptic and neuronal models achieved a 93.8% accuracy in MNIST digit recognition. This innovative approach advances the development of SNNs with high biomimetic fidelity and reduced hardware costs.

Hafnia-based neuromorphic devices

The excellent complementary metal-oxide-semiconductor compatibility and rich physicochemical properties of hafnia-based materials, in particular the unique ferroelectricity that surpasses of conventional ferroelectrics, make hafnia-based devices promising candidates for industrial applications. This Perspective examines the fundamental properties of hafnia-based materials relevant to neuromorphic devices, including their dielectric, ferroelectric, antiferroelectric properties, and the associated ultra-high oxygen-ion conductivity. It also reviews neuromorphic devices developed leveraging these properties, such as resistive random-access memories, ferroelectric random-access memories, ferroelectric tunnel junctions, and (anti)ferroelectric field-effect transistors. We also discuss the potential of these devices for mimicking synaptic and neuronal functions and address the challenges and future research directions. Hafnia-based neuromorphic devices promise breakthrough performance improvements through material optimization, such as crystallization engineering and innovative device configuration designs, paving the way for advanced artificial intelligence systems.

Hf0.4Zr0.6O2 Thickness-Dependent Transfer Characteristics of InxZn1-xOy Channel Ferroelectric FETs.

We investigate how the threshold voltage (VT) is adjusted to create a memory window (MW) in ferroelectric field-effect transistors (FeFETs) composed of ferroelectric Hf0.4Zr0.6O2 and InZnO (In2O3:ZnO = 9:1 wt %). Temperature-dependent polarization measurements reveal a dipole switching in Hf0.4Zr0.6O2. The properties of the n-type InZnO channel are examined by fabricating an oxide transistor with an HfO2 gate dielectric. Upon replacement of HfO2 with Hf0.4Zr0.6O2 in the oxide transistor, a counterclockwise MW is observed. Specifically, as the Hf0.4Zr0.6O2 thickness increases from 16 to 24 nm, the VT of the FeFET after a + gate voltage (VG) sweep remains nearly constant, while the VT after a -VG sweep shifts significantly from -0.9 to 0.5 V. The enlarged MW of approximately 2 V, which is proportional to the Hf0.4Zr0.6O2 thickness in the FeFET, can be explained by considering the balance between VG controllability across the gate stack and the ferroelectric switching of Hf0.4Zr0.6O2.

Enhanced Electrical Polarization in van der Waals α-In2Se3 Ferroelectric Semiconductor Field-Effect Transistors by Eliminating Surface Screening Charge.

A van der Waals (vdW) α-In2Se3 ferroelectric semiconductor channel-based field-effect transistor (FeS-FET) has emerged as a next-generation electronic device owing to its versatility in various fields, including neuromorphic computing, nonvolatile memory, and optoelectronics. However, screening charges cause by the imperfect surface morphology of vdW α-In2Se3 inhibiting electrical polarization remain an unresolved issue. In this study, for the first time, a method is elucidated to recover the inherent electric polarization in both in- and out-of-plane directions of the α-In2Se3 channel based on post-exfoliation annealing (PEA) and improve the electrical performance of vdW FeS-FETs. Following PEA, an ultra-thin In2Se3-3xO3x layer formed on the top surface of the α-In2Se3 channel is demonstrated to passivate surface defects and enhance the electrical performance of FeS-FETs. The on/off current ratio of the α-In2Se3 FeS-FET has increased from 5.99 to 1.84 × 106, and the magnitude of ferroelectric resistance switching has increased from 1.20 to 26.01. Moreover, the gate-modulated artificial synaptic operation of the α-In2Se3 FeS-FET is demonstrated and illustrate the significance of the engineered interface in the vdW FeS-FET for its application to multifunctional devices. The proposed α-In2Se3 FeS-FET is expected to provide a significant breakthrough for advanced memory devices and neuromorphic computing.

Effects of random ferroelectric and dielectric phase distributions on junctionless ferroelectric field effect transistors

Effects of random ferroelectric and dielectric phase distributions on junctionless ferroelectric field effect transistors

Junctionless accumulation-mode SOI ferroelectric FinFET for synaptic weights

In this work, a novel silicon-on-insulator (SOI) based junctionless-accumulation-mode (JAM) ferroelectric (FE) fin field effect transistor (FinFET) is proposed along with its fabrication process flow at a 3-nm node for synaptic weights. The proposed JAM FE FinFET device can be easily integrated with the fabrication flow of p-FinFET in SOI process flow. The proposed device can be easily incorporated into standard FinFET SOI technology and thus is very attractive with respect to previously proposed devices. Further, using a well-calibrated 3D TCAD simulation setup, we show that the device effectively replicates the behavior required for neuromorphic computing applications. The outcomes of the proposed study emphasize the significance of using the JAM FE FinFET as a synaptic weight device that exhibits a 76 % higher nonvolatile conductance range in the ON-state over existing junctionless and conventional FE FinFET devices. Our simulations show that the proposed device offers continuous linear conductance variation and symmetric switching characteristics, which are essential for neuromorphic applications.

Al1−xScxSbyN1−y: An opportunity for ferroelectric semiconductor field effect transistor

For the in-memory computation architecture, a ferroelectric semiconductor field-effect transistor (FeSFET) incorporates ferroelectric material into the FET channel to realize logic and memory in a single device. The emerging group III nitride material Al1−xScxN provides an excellent platform to explore FeSFET, as this material has significant electric polarization, ferroelectric switching, and high carrier mobility. However, steps need to be taken to reduce the large band gap of ∼5 eV of Al1−xScxN to improve its transport property for in-memory logic applications. By state-of-the-art first principles analysis, here we predict that alloying a relatively small amount (less than ∼5%) of Sb impurities into Al1−xScxN very effectively reduces the band gap while maintaining excellent ferroelectricity. We show that the co-doped Sb and Sc act cooperatively to give a significant band bowing leading to a small band gap of ∼1.76 eV and a large polarization parameter ∼0.87 C/m2, in the quaternary Al1−xScxSbyN1−y compounds. The Sb impurity states become more continuous as a result of interactions with Sc and can be used for impurity-mediated transport. Based on the Landau-Khalatnikov model, the Landau parameters and the corresponding ferroelectric hysteresis loops are obtained for the quaternary compounds. These findings indicate that Al1−xScxSbyN1−y is an excellent candidate as the channel material of FeSFET.

First demonstration of 2T0C-FeDRAM: a-ITZO FET and double gate a-ITZO/a-IGZO FeFET with a record-long multibit retention time of >4-bit and >2000 s.

Conventional DRAM, consisting of one transistor and one capacitor (1T1C), requires periodic data refresh processes due to its limited retention time and data-destructive read operation. Here, we propose and demonstrate a novel 3D-DRAM memory scheme available with a single transistor and a single ferroelectric field-effect transistor (FeFET) DRAM (2T0C-FeDRAM), which offers extended retention time and non-destructive read operation. This architecture uses a back-end-of-line (BEOL)-compatible amorphous oxide semiconductor (AOS) that is suitable for increasing DRAM cell density. Notably, the device structures of a double gate a-ITZO/a-IGZO FeFET, used for data storage and reading, are engineered to achieve an enlarged memory window (MW) of 1.5 V and a prolonged retention time of 104 s. This is accomplished by a double gate and an a-ITZO/a-IGZO heterostructure channel to enable efficient polarization control in hafnium-zirconium oxide (HZO) layers. We present successful program/erase operations of the double gate a-ITZO/a-IGZO FeFET through incremental step pulse programming (ISPP), demonstrating multi-level states with remarkable retention characteristics. Most importantly, we perform 2T0C-FeDRAM operations by electrically connecting the double gate a-ITZO/a-IGZO FeFET and the a-ITZO FET. Leveraging the impressive performance of the double gate a-ITZO/a-IGZO FeFET technology, we have effectively showcased an exceptionally record-long retention time exceeding 2000 s and 4-bit multi-level states, positioning it as a robust contender among emerging memory solutions in the era of artificial intelligence.

Reconfigurable aJ-Level Ferroelectric Transistor-Based Boolean Logic for Logic-in-Memory.

Logic-in-memory (LIM) architecture holds great potential to break the von Neumann bottleneck. Despite the extensive research on novel devices, challenges persist in developing suitable engineering building blocks for such designs. Herein, we propose a reconfigurable strategy for efficient implementation of Boolean logics based on a hafnium oxide-based ferroelectric field effect transistor (HfO2-based FeFET). The logic results are stored within the device itself (in situ) during the computation process, featuring the key characteristics of LIM. The fast switching speed and low power consumption of a HfO2-based FeFET enable the execution of Boolean logics with an ultralow energy of lower than 8 attojoule (aJ). This represents a significant milestone in achieving aJ-level computing energy consumption. Furthermore, the system demonstrates exceptional reliability with computing endurance exceeding 108 cycles and retention properties exceeding 1000 s. These results highlight the remarkable potential of a FeFET for the realization of high performance beyond the von Neumann LIM computing architectures.

Nonvolatile ferroelectric control of electronic properties of Bi2Te3

Abstract Nonvolatile electric-field control of the unique physical characteristics of topological insulators (TIs) is essential for fundamental research and development of practical electronic devices. Electrically tunable transport properties through electrostatic gates have been extensively investigated. However, the relatively weak and volatile tunability limits its practical applications in spintronics. Here, we demonstrate the nonvolatile electric-field control of Bi2Te3 transport properties via constructing ferroelectric Rashba architectures, i.e., 2D Bi2Te3/α-In2Se3 ferroelectric field effect transistors. Through switching the polarization states of the α-In2Se3, the Fermi level, resistance, Fermi wave vector, carrier mobility, carrier density, and magnetoresistance (MR) of the Bi2Te3 film can be effectively modulated. Importantly, a shift of Fermi level toward band gap with surface state occurs as switching to negative polarization state, the contribution of the surface state to the conductivity increases, thereby increasing carrier mobility and electron coherence length significantly, and resulting in enhanced WAL effect. These results provide a nonvolatile electric-field control method to tune the electronic properties of TI and can further extend to the quantum transport properties.

Room-temperature ferroelectric, piezoelectric and resistive switching behaviors of single-element Te nanowires

Ferroelectrics are essential in memory devices for multi-bit storage and high-density integration. Ferroelectricity mainly exists in compounds but rare in single-element materials due to their lack of spontaneous polarization in the latter. However, we report a room-temperature ferroelectricity in quasi-one-dimensional Te nanowires. Piezoelectric characteristics, ferroelectric loops and domain reversals are clearly observed. We attribute the ferroelectricity to the ion displacement created by the interlayer interaction between lone-pair electrons. Ferroelectric polarization can induce a strong field effect on the transport along the Te chain, giving rise to a self-gated ferroelectric field-effect transistor. By utilizing ferroelectric Te nanowire as channel, the device exhibits high mobility (~220 cm2·V−1·s−1), continuous-variable resistive states can be observed with long-term retention (>105 s), fast speed (<20 ns) and high-density storage (>1.92 TB/cm2). Our work provides opportunities for single-element ferroelectrics and advances practical applications such as ultrahigh-density data storage and computing-in-memory devices.

Quasi-equilibrium growth of inch-scale single-crystal monolayer α-In2Se3 on fluor-phlogopite

Epitaxial growth of two-dimensional (2D) materials with uniform orientation has been previously realized by introducing a small binding energy difference between the two locally most stable orientations. However, this small energy difference can be easily disturbed by uncontrollable dynamics during the growth process, limiting its practical applications. Herein, we propose a quasi-equilibrium growth (QEG) strategy to synthesize inch-scale monolayer α-In2Se3 single crystals, a semiconductor with ferroelectric properties, on fluor-phlogopite substrates. The QEG facilitates the discrimination of small differences in binding energy between the two locally most stable orientations, realizing robust single-orientation epitaxy within a broad growth window. Thus, single-crystal α-In2Se3 film can be epitaxially grown on fluor-phlogopite, the cleavage surface atomic layer of which has the same 3-fold rotational symmetry with α-In2Se3. The resulting crystalline quality enables high electron mobility up to 117.2 cm2 V−1 s−1 in α-In2Se3 ferroelectric field-effect transistors, exhibiting reliable nonvolatile memory performance with long retention time and robust cycling endurance. In brief, the developed QEG method provides a route for preparing larger-area single-crystal 2D materials and a promising opportunity for applications of 2D ferroelectric devices and nanoelectronics.

Ferroelectric field effect transistors based on two-dimensional CuInP2S6 (CIPS) and graphene heterostructures

Ferroelectric field effect transistors based on two-dimensional CuInP2S6 (CIPS) and graphene heterostructures

Two-Dimensional Ferroelectric Materials: Synthesis, Characterization and Applications

In recent years, the continuous advancements in microelectronics have driven the evolution of electronic devices towards miniaturization and integration. However, at the nanoscale level, surface and size effects become significant, imposing constraints on the use of conventional bulk ferroelectric materials in contemporary industry. As a result, in the field of materials research, two-dimensional (2D) ferroelectric materials with stable spontaneous polarization and minimal size effects have gained significant attention. These novel 2D ferroelectric materials have great potential for future nano-level ferroelectric applications, enabling high levels of device integration. To begin with, this paper divides 2D ferroelectric materials into two categories: intrinsic ferroelectrics and sliding ferroelectrics. It also discusses the features and current state of research on each of these categories. Next, typical 2D ferroelectric material preparation and characterization techniques are outlined. Additionally, 2D ferroelectric memory devices like ferroelectric diodes (FD), ferroelectric field effect transistors (FeFET), ferroelectric semiconductor field-effect transistors (FeSFET), and ferroelectric tunnel junctions (FTJ) are introduced. Finally, this review also presents expectations and potential challenges in the domain of 2D ferroelectric materials.

Ferroelectric Aluminum Scandium Nitride Transistors with Intrinsic Switching Characteristics and Artificial Synaptic Functions for Neuromorphic Computing.

Aluminum Scandium Nitride (Al1-xScxN) has received attention for its exceptional ferroelectric properties, whereas the fundamental mechanism determining its dynamic response and reliability remains elusive. In this work, an unreported nucleation-based polarization switching mechanism in Al0.7Sc0.3N (AlScN) is unveiled, driven by its intrinsic ferroelectricity rooted in the ionic displacement. Fast polarization switching, characterized by a remarkably low characteristic time of 0.00183ps, is captured, and effectively simulated using a nucleation-limited switching (NLS) model, where the profound effect of defects on the nucleation and domain propagation is systematically studied. These findings are further integrated into Monte Carlo simulations to unravel the influence of the activation energy for ferroelectric switching on the distributions of switching thresholds. The long-term reliability of devices is also confirmed by time-dependent dielectric breakdown (TDDB) measurements, and the effect of thickness scaling is discussed. Ferroelectric field-effect transistors (FeFETs) are demonstrated through the integration of AlScN and 2D MoS2 channel, where biological synaptic functions can be emulated with optimized operation voltage. The artificial neural network built from AlScN-based FeFETs achieves 93.8% recognition accuracy of handwritten digits, demonstrating the potential of ferroelectric AlScN in future neuromorphic computing applications.