Fermi Level Unpinning Research Articles

Engineering TiOx interlayers in high vacuum for Al-contacted MoSe2 transistors

We present an enhanced performance of MoSe2 transistors via sequentially depositing Ti and Al in high vacuum to establish TiOx interlayers positioned between the MoSe2 channel and Ti/Al contacts. Transmission electron microscopy analysis revealed the presence of TiOx at the MoSe2/Ti interface. While MoSe2 transistors exhibited poor device performance in the absence of a TiOx interlayer, the introduction of a TiOx interlayer yielded a notable transistor performance, including an on/off ratio of ∼105, a field-effect mobility of ∼40 cm2 V−1 s−1, and a contact resistance of ∼100 kΩ μm. These enhancements were attributed to the beneficial effects of Fermi level unpinning and interfacial doping facilitated by TiOx interlayers. These results underscore the feasibility of incorporating TiOx interlayers to enable the use of conventional Al contacts in MoSe2 transistors, delivering significant implications for enhancing the performance of transition metal dichalcogenide transistors.

Realization of Fermi level unpinning and high-quality p-type contacts for 2D β-TeO2 by a built-in intercalation

Contriving an industry-compatible method for fabricating purely high-quality p-type two-dimensional (2D) field effect transistors (FETs) has been proved to be pressing but challenging due to the strong interfacial coupling and thus tight Fermi level pinning (FLP). Herein, by employing density functional theory calculations, a straightforward but effective strategy is proposed to achieve high-quality p-type contact in few-layer TeO2–Pt junction by using a build-in intercalation to suppress the FLP and shield the damage from electrodes to the excellent electrical properties of TeO2 such as its ultra-high hole mobility. Specifically, the increase of TeO2 layer number will make the charge distribution of VBM and CBM be more lumped in the inner core layer, as a result, the outlying Te–O sublayer can act as an inserting layer like BN to protect the semiconducting electronic states and avoid gap-state pinning. Thus, as the TeO2 layer increases from 1 L to 3 L, (Ⅰ) strong FLP in metal-TeO2 interfaces is gradually unpinned; (Ⅱ) the polarity of Pt–TeO2 contact reverses from n-type to p-type; (Ⅲ) the excellent electrical properties of TeO2 such as hole effective mass is preserved as original despite strong charge transfer occurring at the interface. Besides, the tunnelling barrier at the interface is close to zero. This is quite different from introducing an extern BN intercalation, in which case the tunnelling through BN will prominently reduce the overall hole current. In addition, the contacts between 2D metal electrodes and monolayer TeO2 are found to obey the Schottky-Mott rule, and thereby p-type Ohmic contacts can be obtained at TeO2-VS2, -NbS2 interfaces. Whereas, a relatively large tunnelling barrier exists at the 2D metal-TeO2 interfaces. Our findings are quite essential and beneficial for designing high-performance p-type 2D FETs.

Revealing the roles of surface treatments on hematite (α-Fe2O3) photoanode in the shift of the onset potential

In this study, we fabricated different types of Hematite (α-Fe2O3)-based photoanodes, treated with CeOx, FeOOH, and NiFeOx, and investigated the effect of each treatment on the onset potential shift. We revealed the Hematite films that were treated with either CeOx or FeOOH on the surface did not exhibit cathodic shifts of the onset potentials in photocurrent density–potential (J–V) curves, in which the significant improvements in charge transfer efficiencies were achieved, while charge separation efficiencies were not significantly enhanced. It means that the enhanced charge transfer efficiency resulting from the catalyzed oxygen evolution reaction did not significantly influence the shift of the turn-on voltage. On the other hand, we were able to observe the significant improvement of the photo-electrochemical performance of Hematite treated with NiFeOx, including the cathodic shift of the onset potential, which could be attributed to the enhancement of the charge separation efficiency, resulting from the Fermi level unpinning. Based on the results, we could believe that the cathodic shift of the onset potential was primarily due to the enhancement of the photovoltage.

Fermi level unpinning achievement and transport modification in Hf1-Yb O /Al2O3/GaSb laminated stacks by doping engineering

Fermi level pinning and interface instability have hindered the achievement of field-effect-transistors (FETs) with high performance. Interface passivation and doping engineering technology have become the main driving force to solve the issue. Herein, interface chemistry and transport characteristics determination of Hf1-xYbxOy/Al2O3/GaSb gate stacks have been achieved by passivation and doping process. X-ray photoelectron spectroscopy characterization and electrical measurements have demonstrated the existence of less intrinsic oxides and elemental Sb at Hf1-xYbxOy/Al2O3/GaSb interface with optimized doping content, as well as the minimum leakage current density of 2.23 × 10–5 A cm-2. The energy distribution of interface state based on conductance method has confirmed the achievement of the lowest interface state density of 1.98×1013 eV-1 cm-2, resulting in Fermi level unpinning. Carrier transport mechanisms of Hf1-xYbxOy/Al2O3/GaSb MOS capacitors as a function of temperature have been investigated systematically and some important electrical parameters have been extracted. Comprehensive analyses show that sputtering-derived Hf1-xYbxOy/Al2O3/GaSb (x = 0.32) gate stack has potential application in future GaSb-based metal-oxide-semiconductor field effect transistor (MOSFET) devices.

Time-resolved spectroscopic study of photo-excited charge carrier dynamics in hematite (α-Fe2O3): Effect of re-growth treatment

In order to figure out the origin of the improvement of the photo-electrochemical performance of the re-growth treated hematite, in which the deposition process was repeatedly performed, resulting in the reduction of the amount of the defect states, we investigated the photo-excited charge carrier dynamics in both bare and re-growth treated hematite films under the bias condition using heterodyne transient grating technique. In this study, we were able to observe the strong dependence of the signal intensities of the components appearing in the responses of the re-growth treated hematite film on the applied bias voltage, which was attributed to the Fermi level unpinning, caused by the reduction of the surface defect states.

Defect-Assisted Contact Property Enhancement in a Molybdenum Disulfide Monolayer.

Contact engineering for two-dimensional (2D) transition metal dichalcogenides (TMDCs) is crucial for realizing high-performance 2D TMDC devices, and most studies on contact properties of 2D TMDCs have mainly focused on Fermi level unpinning. Here, we investigated electrical and photoelectrical properties of chemical vapor deposition (CVD)-grown molybdenum disulfide (MoS2) monolayer devices depending on metal contacts, Ti/Pt, Ti/Au, Ti, and Ag, and particularly demonstrated the essential role of defects in MoS2 in contact properties. Remarkably, MoS2 devices with Ag contacts show a field-effect mobility of 12.2 cm2 V-1 s-1, an on/off current ratio of 7 × 107, and a photoresponsivity of 1020 A W-1, which are outstanding compared to similar devices with other metal contacts. These improvements are attributed to a reduced Schottky barrier height, thanks to the small work function of Ag and Ag-MoS2 orbital hybridization at the interface, which facilitates efficient charge transfer between MoS2 and Ag. Interestingly, X-ray photoelectron spectroscopic analysis reveals that Ag2S was formed in our defect-containing CVD-grown MoS2 monolayer, but such orbital hybridization is not observed in a nearly defect-free exfoliated MoS2. This distinction shows that defects existing in MoS2 enable Ag to effectively couple to MoS2 and correspondingly enhance multiple electrical and photoelectrical properties.

Fermi level unpinning of metal/p-type 4H-SiC interface by combination of sacrificial oxidation and hydrogen plasma treatment

An ideal metal/p-type 4H-SiC interface with a “free-pinned” Fermi level has been achieved by the combination of sacrificial thermal oxidation (SO) and hydrogen plasma treatment (HPT) on the SiC surface. It is found that the Fermi level pinning could be attributed to the contaminants and defects of the p-type 4H-SiC surface. According to the X ray photoelectron spectroscopy and deep-level transient spectroscopy results, the oxygen and carbon contaminants decreased after SO. However, high-density carbon interstitial-related defects were generated close to the valance band during oxidation. With the subsequent HPT, the chemical residues and detrimental carbon-induced defects were eliminated by the reaction with hydrogen atoms. The p-type 4H-SiC surface was chemically and electrically well saturated with the surface Fermi level position close to the bulk position. An analytical model for the elimination of surface contaminants and defects was proposed to reveal the underlying mechanism of Fermi level depinning.

Statistical Simulation Study of Metal Grain-Orientation-Induced MS and MIS Contact Resistivity Variability for 7-nm FinFETs

This paper presents a statistical simulation study of contact resistivity ( $\rho _{c}$ ) variability (CRV) of TiN and TaN metal–semiconductor (MS) and metal–interfacial layer–semiconductor (MIS) n-Ge(Si) source/drain (S/D) contacts resulting from variation in contact metal work function ( $\phi _{m}$ ) due to its different grain orientations, and its impact on FinFET performance at 7-nm node using 3-D TCAD simulations. Fermi-level unpinning enables MIS contacts to exhibit lower $\rho _{c}$ than MS contacts but increases their sensitivity to $\phi _{m}$ variation leading to higher CRV. CRV is shown to get worse with device scaling, especially for MIS contacts. However, increasing S/D doping, reducing grain size, and doping the interfacial layer (for MIS contacts) demonstrate reduction in CRV. At high S/D dopings, TiN MS contacts on Ge as well as Si meet International Technology Roadmap for Semiconductors requirements with nearly the same $\rho _{c}$ as MIS contacts but with significantly lower CRV.

Physics of Fermi-Level “Unpinning” at Metal/Ge Interfaces; First-Principles View

Because of high carrier mobility and small band gap, germanium (Ge) is expected as a next-generation material for electronic and optical devices. One of serious issues for application is the “Fermi-level pinning” at metal/Ge contact [1]; the Fermi energy of metal is located around 0.1eV above the valence-band top of Ge not depending on the kinds of metals, which interrupts desirable metal/n-Ge contacts. Recently, the breakdown of such pinning, i.e., Fermi-level “unpinning”, was observed at several interfaces such as Fe3Si/Ge, Sn/Ge, Al/GeO2/Ge, germanide/Ge, and TiN/Ge. For the former three interfaces, we have already clarified the origins of unpinning [2]. However, the TiN/Ge interface is the most interesting among these interfaces because this interface has the largest unpinning and the pinning/unpinning features depend on the growth conditions of interface [3]. In this work, by the first-principles calculations, we first clarify why the Fermi-level unpinning occurs at TiN/Ge interfaces and depends on the growth conditions, and then discuss what are the common key factors to promote the unpinning at various metal/Ge interfaces. The experiments showed that the unpinning occurs at TiN/Ge(001) interface when TiN is grown on Ge and some interface layers are produced in N-rich and low-temperature conditions [3]. Thus, we consider various N-rich interface layers such as TiN2 and Ge3N4. We adopt the (1x1)-(3x3) superlattice geometries to simulate these interfaces. Atomic/electronic structures and Schottky barriers of various TiN/Ge interfaces are calculated by the standard first-principles method using VASP code in the density-functional theory. The main results are summarized as follows; (1) In the case of plain flat interface, the pinning occurs, being consistent with experiments. This is because interface Ge atoms have many evanescent states (metal-induced gap states; MIGS) that are connected with Ti metallic states in the band gap of Ge. (2) In the case of N-rich TiN/Ge interfaces with transition interface layers, the penetration of MIGS into Ge layers is highly suppressed. This occurs because interface Ge atoms are terminated by N atoms and has no gap states (MIGS). As a result, reflecting interface N-Ge bonds, a definite electron transfer occurs from Ge to TiN sides, which promotes the large Fermi-level unpinning. (3) We found that the unpinning is also realized even when 20% of interface N-Ge bonds are broken at N-rich TiN/Ge interface or when interface Ge atoms are reacted with supplied N atoms to produce stable Ge3N4 interface layers. (4) By comparing various “unpinning” interfaces such as Al/GeO2/Ge and βSn/αSn/Ge, we found that the termination of Ge dangling bonds at the interface by the N-Ge, O-Ge, Sn-Ge, or Si-Ge bonding is the key factor to promote the Fermi-level unpinning. This is because such termination eliminates the appearance of evanescent states (MIGS) in interface Ge layers. These results are discussed, together with reviewing recent experiments and focusing on the fundamental physics at metal/Ge interfaces. <References> [1] T. Nishimura et al., Appl. Phys. Lett. 91 (2007) 123123. [2] T.Nakayama et al., ECS trans. 75 (2016) 643, Jpn. J. Appl. Phys. 55 (2016) 111302. [3] K.Yamamoto et al, Appl. Phys. Lett. 104 (2014) 132109. Figure 1

Schottky Barrier Height Engineering for Electrical Contacts of Multilayered MoS2 Transistors with Reduction of Metal-Induced Gap States.

The difficulty in Schottky barrier height (SBH) control arising from Fermi-level pinning (FLP) at electrical contacts is a bottleneck in designing high-performance nanoscale electronics and optoelectronics based on molybdenum disulfide (MoS2). For electrical contacts of multilayered MoS2, the Fermi level on the metal side is strongly pinned near the conduction-band edge of MoS2, which makes most MoS2-channel field-effect transistors (MoS2 FETs) exhibit n-type transfer characteristics regardless of their source/drain (S/D) contact metals. In this work, SBH engineering is conducted to control the SBH of electrical top contacts of multilayered MoS2 by introducing a metal-interlayer-semiconductor (MIS) structure which induces the Fermi-level unpinning by a reduction of metal-induced gap states (MIGS). An ultrathin titanium dioxide (TiO2) interlayer is inserted between the metal contact and the multilayered MoS2 to alleviate FLP and tune the SBH at the S/D contacts of multilayered MoS2 FETs. A significant alleviation of FLP is demonstrated as MIS structures with 1 nm thick TiO2 interlayers are introduced into the S/D contacts. Consequently, the pinning factor ( S) increases from 0.02 for metal-semiconductor (MS) contacts to 0.24 for MIS contacts, and the controllable SBH range is widened from 37 meV (50-87 meV) to 344 meV (107-451 meV). Furthermore, the Fermi-level unpinning effect is reinforced as the interlayer becomes thicker. This work widens the scope for modifying electrical characteristics of contacts by providing a platform to control the SBH through a simple process as well as understanding of the FLP at the electrical top contacts of multilayered MoS2.

Universal Metal-Interlayer-Semiconductor Contact Modeling Considering Interface-State Effect on Contact Resistivity Degradation

We present a universal metal-interlayer- semiconductor (MIS) contact model to demonstrate the effect of Fermi-level unpinning, considering both the extrinsic interface-state density (D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> ) and the density of metal-induced gap states (D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MIGS</sub> ) at the semiconductor surface. Previous studies on MIS contact modeling have quantified only the impact of D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">MIGS</sub> on Fermi-level pinning. However, the extrinsic interface states such as interface traps and local vacancies significantly affect the contact resistivity degradation in MIS contacts. Moreover, field emission (FE) and thermionic FE (TFE) current density models in MIS contact are described in detail, for the extraction of the specific contact resistivity (ρ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> ). The physical validity of the proposed model is demonstrated by comparing its calculated ρ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> with those obtained in prior experimental studies employing a GaAs substrate (Ti/ZnO/n-GaAs and Ti/TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /n-GaAs). The ρ <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">c</sub> values for the MIS contacts are also evaluated with various D <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">it</sub> levels and the interlayers. This model is promising for the development of a comprehensive next-generation MIS contact for the sub-10-nm complementary metal-oxide- semiconductor technology.

Significantly Enhanced Thermoelectric Performance of γ-In2Se3 through Lithiation via Chemical Diffusion

γ-In2Se3 is selected as a thermoelectric candidate because it has a unique crystal structure and thermal stability at relatively high temperatures. In this work we have prepared lithiated γ-In2Se3 through chemical diffusion and investigated its band structures and thermoelectric performance. After 30 h lithiation of γ-In2Se3 in lithium acetate (CH3COOLi) solution at 50oC, we have observed a high Hall carrier concentration (nH) up to 1.71×1018 cm-3 at room temperature (RT), which is about 4 orders of magnitude compared to that of pristine γ-In2Se3. The enhancement in nH is directly responsible for the remarkable improvement in electrical conductivity, and can be elucidated as the Fermi level (Fr) unpinning and moving towards the conduction band (CB) through the dominant interstitial occupation of Li+ in the γ-In2Se3 lattice. Combined with the minimum lattice thermal conductivity (κL=0.30~0.34 WK-1m-1) at ~923 K, the highest ZT value of 0.62~0.67 is attained, which is about 9~10 times that of pristine γ-In2...

Scalable and Solid‐State Redox Functionalization of Transparent Single‐Walled Carbon Nanotube Films for Highly Efficient and Stable Solar Cells

This study reports a scalable and room‐temperature solid‐state redox functionalization process for single‐walled carbon nanotubes (SWNTs) with instant efficacy and high stability. By drop‐casting/spin‐coating CuCl2/Cu(OH)2 colloidal ethanol solution onto SWNT films, the sheet resistance of the SWNT films achieves 69.4 Ω sq−1 at 90% transparency without noticeable increase for more than 12 months. The charge transfer mechanism between the redox and the SWNTs is revealed by Raman and X‐ray photoelectron spectroscopies. The SWNT/silicon solar cells are utilized as a benchmark to evaluate the effectiveness of the redox functionalization process and its compatibility for device integration. The power conversion efficiency of the SWNT/Si solar cell increases by 115% after redox functionalization, reaching the value of 14.09% without degradation in the ambient for over 12 months. Temperature‐dependent operation characteristics of the redox functionalized SWNT/Si solar cells demonstrate that the Fermi level unpinning and enhanced tunneling of the charge carriers contribute to the significant improvement of the photovoltage and fill factor. The CuCl2/Cu(OH)2 redox also serves as an antireflection layer, resulting in a 20% increase of the photocurrent. The proposed redox functionalized SWNTs are promising as multifunctional transparent conductive films for wide‐range solar cell applications.

(Invited) Rapid In-Situ Carbon and Oxygen Cleaning of In0.53Ga0.47As(001) and Si0.5Ge0.5(110) Surfaces via a H2 RF Downstream Plasma

Channel passivation of SiGe and InGaAs requires removal of dangling bonds and formation of a thermally stable interface. On InGaAs, one solution is the deposition by self-limiting CVD or ALD of a few monolayer of silicon, silicon oxide, or silicon nitride. To form an Si-OH terminated In0.53Ga0.47As(001) surface, two monolayers of Si were deposited at 350°C with self-limiting CVD using Si2Cl6 dosing following by dosing anhydrous HOOH(g). Scanning tunneling microcopy (STM) shows and ordered surface is form while scanning tunneling spectroscopy (STS) shows the surface Fermi level position moves towards midgap due to a surface dipole formation from –OH groups and oxygen bonding to the surface. TMA was dosed at 250°C onto the Si-OH terminated InGaAs(001), and XPS shows the emergence of the Al 2p and C 1s peaks indicative of TMA surface nucleation. The TMA shifts the InGaAs Fermi level back towards the conduction band, consistent with unpinning. MOSCAPs were fabricated to further demonstrate Fermi level unpinning using the Si-OH termination of InGaAs. While this same Si deposition process could be employed on SiGe, a simple annealing process can be employed to form a silicon terminated SiGe surface. A saturation dose of H2O2(g) at 25oC chemisorbs to on Si0.5Ge0.5(110) and Si0.47Ge0.53(001) surfaces leaving the Fermi level on the surface unpinned, and the surface is functionalized with mainly Si-OH, Ge-OH and Si-O-Ge bond. After a subsequent TMA dose at 25oC and annealing at 300oC, XPS and STM verify that a thermally stable and well-ordered monolayer of Al2O3 is formed on SiGe(110) and (001) surfaces with only Al-O-Si bonds and no detectable Ge-O-Si bonds. The H2O2(g) functionalization provides 3 times higher O sites on the surface and 3 times higher TMA nucleation density than H2O(g) at 25°C and 120°C. A variety of strongly bound passivating atoms can induce formation of a nearly pure Si interfacial layer between high-k dielectrics and SiGe. This annealing procedure was employed to form MOSCAP on SiGe(001) using Al2O3 and HfO2 gate oxides after either (NH4)2S or NH3 plasma passivation. For NH3 plasma passivation, angle-resolved XPS showed that the annealing allows formation of nearly Ge-free SiON layer. For higher Ge concentrations, the annealing process is unlikely to form a nearly Ge-free SiON layer so a novel plasma-free chemistry has been develop to deposit SiON using ALD with N2H4(g) as a precursor. Figure 1

Formation of Low-Resistivity Metal/Germanium Contact with Ultra-Thin Interlayer and Plasma Oxidation for n-Channel Germanium FET

Germanium (Ge) has emerged as a new channel material substituting traditional silicon (Si) in CMOS technology due to its high carrier mobility and process compatibility with Si. However, n-channel Ge MOSFET has not exhibited high performance because of some bottlenecks. High source/drain (S/D) contact resistance resulted from Fermi-level pinning (FLP) between the metal and Ge is the most serious obstacle for the development of Ge n-MOSFET. The metal/n-Ge contact has very large Schottky barrier height, approximately 0.55eV, regardless of metal work function because the Fermi-level on the metal side is strongly pinned to the edge of the valence band of Ge. Metal-induced gap states (MIGS) are the main cause of Fermi-level pinning, however, effect of interface states at the Ge surface on FLP is turned out to be not small by previous researches [1, 2]. Therefore, it is important to reduce both MIGS and interface states in order to alleviate FLP and form low-resistance Ge S/D contact. In this work, moderately-doped n-Ge wafer (N d = 1×1017 cm–3) was used as a substrate. In order to alleviate FLP of metal/n-Ge contact, 1.5 nm-thick ultra-thin TiO2 layer is inserted between the metal and n-Ge to block MIGS penetration into the energy gap of Ge, and plasma oxidation process is introduced before and after TiO2 deposition, respectively, to passivate Ge surface and reduce interface states [3]. Two approaches of plasma oxidation are applied; pre-oxidation and post-oxidation. The plasma oxidation process was carried out using ICP-RIE system. For pre-oxidation process, Ge substrate was oxidized prior to the TiO2 deposition with source power of 500 W, no bias power, gas flow of O2 40 sccm/Ar 5 sccm, pressure of 10 mTorr, and process time of 70 sec. For post-oxidation process, Ge substrate was oxidized after the TiO2 deposition with bias power of 50 W and process time of 30 sec with other plasma conditions not changed. The TiO2interlayer was deposited using atomic layer deposition (ALD) system at process temperature of 250 °C. As a result, a back-to-back reverse current density of Ti/TiO2/GeOx/n-Ge structure is improved compared to that of Ti/TiO2/n-Ge structure for both pre-oxidation and post-oxidation as shown in Fig. 1, which means Fermi-level on the metal side was more unpinned due to the GeOx passivation layer. It exhibits 4 orders of magnitude of reverse current improvement than the Ti/n-Ge structure does. Besides, the TiO2/GeOx stack shows better electrical properties than single TiO2 does when they have the same total thickness, approximately 2.1 nm (not shown here). It means an increase of single interlayer thickness in metal-interlayer-semiconductor (M-I-S) structure cannot be the best solution for FLP, and multi-layered structure should be introduced to reduce both MIGS and interface states. The Ti/TiO2/pre-GeOx/n-Ge shows slightly better performance than the Ti/TiO2/post-GeOx/n-Ge does. This is because the amount of GeOx formed by post-plasma oxidation process is smaller than that formed by pre-oxidation process due to the presence of TiO2 interlayer as shown in Fig. 2. Thicker GeOx can block MIGS more resulting in slight increase of reverse current density, however, GeOx layer formed by post-oxidation process has more GeO2-like characteristics which can passivate Ge surface better. For this reason, the Ti/TiO2/post-GeOx/n-Ge structure exhibits more ohmic-like (i.e., more linear) I–V characteristics, and post-oxidation process is considered to have more potential to plasma passivation process for the M-I-S structure. In conclusion, we successfully demonstrate the effect of pre- and post-oxidation process on Ge M-I-S structure. The GeOx layer formed by plasma oxidation between the metal and the TiO2 interlayer can reduce interface state density resulting in additional Fermi-level unpinning. Therefore, this plasma oxidation process with M-I-S structure can be a key technology to overcome the bottleneck of Ge n-channel MOSFET development by alleviating FLP effectively and reducing S/D contact resistance. [1] G.-S. Kim et al., IEEE Electron Device Lett., 36, 8 (2015) [2] J.-R. Wu et al., Appl. Phys. Lett., 99, 25 (2011) [3] J. Kang et al., Opt. Express, 23, 13 (2015) Figure 1

Low resistivity contact on n-type Ge using low work-function Yb with a thin TiO2 interfacial layer

This work demonstrates the benefit of a lower contact barrier height, and hence reduced contact resistivity (ρc), using a low work-function metal (Yb) in unpinned metal-interfacial layer-semiconductor (MIS) contacts on n-type Ge. Fermi-level unpinning in MIS contacts on n-Ge is first established by introducing a 2 nm TiO2−x interfacial layer between various contact metals (Yb, Ti, Ni, Pt) and n-Ge. Further, Yb/TiO2−x/n-Ge MIS contact diodes exhibit higher current densities (up to 100×) and lower effective contact barrier height (up to 30%) versus Ti/TiO2−x control devices over a wide range of TiO2−x thickness (1–5 nm). Finally, low work-function Yb combined with doped TiO2−x having a low conduction band offset with Ge and high substrate doping (n+-Ge: 2.5×1019 cm−3) is shown to result in an ultra-low ρc value of 1.4 × 10−8 Ω cm2, 10 × lower than Ti/TiO2−x control devices.

Fermi-Level Unpinning Using a Ge-Passivated Metal–Interlayer–Semiconductor Structure for Non-Alloyed Ohmic Contact of High-Electron-Mobility Transistors

We demonstrate the use of germanium passivation in conjunction with a ZnO interlayer in a metal-interlayer- semiconductor structure in a source/drain (S/D) contact. The Fermi-level pinning problem resulting in the large contact resistances in S/D contacts is effectively alleviated by inserting a thin Ge passivation layer and a ZnO interlayer, passivating the GaAs surface and reducing the metal-induced gap states on the GaAs surface, respectively. The specific contact resistivity for the Ti/ZnO/Ge/n-GaAs (~2 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">18</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-3</sup> ) structure exhibits a ~1660× reduction compared with that of a Ti/n-GaAs structure. These results suggest that the proposed structure shows promise as a nonalloyed ohmic contact in high-electron-mobility transistors.

Strong Schottky barrier reduction at Au-catalyst/GaAs-nanowire interfaces by electric dipole formation and Fermi-level unpinning

Nanoscale contacts between metals and semiconductors are critical for further downscaling of electronic and optoelectronic devices. However, realizing nanocontacts poses significant challenges since conventional approaches to achieve ohmic contacts through Schottky barrier suppression are often inadequate. Here we report the realization and characterization of low n-type Schottky barriers (~0.35 eV) formed at epitaxial contacts between Au-In alloy catalytic particles and GaAs-nanowires. In comparison to previous studies, our detailed characterization, employing selective electrical contacts defined by high-precision electron beam lithography, reveals the barrier to occur directly and solely at the abrupt interface between the catalyst and nanowire. We attribute this lowest-to-date-reported Schottky barrier to a reduced density of pinning states (~10(17) m(-2)) and the formation of an electric dipole layer at the epitaxial contacts. The insight into the physical mechanisms behind the observed low-energy Schottky barrier may guide future efforts to engineer abrupt nanoscale electrical contacts with tailored electrical properties.

Interface properties of MBE grown epitaxial oxides on GaAs

Single crystal SrTiO3 layers were grown on GaAs using both molecular and atomic oxygen and the interfaces were probed using room temperature photoluminescence and in-situ X-ray photoemission spectroscopy. The increase in PL intensity for the oxide/GaAs structure in which molecular oxygen was used suggest a decrease in the density of interfacial defects resulting in some level of Fermi level unpinning. When atomic oxygen was used during growth the interface appears to have an increase in the density of defects and a pinned Fermi level similar to that of a GaAs layer with a native oxide. X-ray photoemission measurements indicate an increase in the Ga–O bonding at the interface when the plasma source was used with an addition of As–As bonding not present in the sample grown using molecular oxygen. These results suggest the possibility of using a crystalline oxide as a gate dielectric in III–V MOSFET devices.

Fermi-level unpinning and low resistivity in contacts to n-type Ge with a thin ZnO interfacial layer

We report low resistance Ohmic contacts on n-Ge using a thin ZnO interfacial layer (IL) capped with Ti. A 350°C post metallization anneal is used to create oxygen vacancies that dope ZnO heavily n-type (n+). Rectifying Ti/n-Ge contacts become Ohmic with 1000× higher reverse current density after insertion of n+-ZnO IL. Specific resistivity of ∼1.4×10−7 Ω cm2 is demonstrated on epitaxial n+-Ge (2.5×1019 cm−3) layers. Low resistance with ZnO IL can be attributed to (a) low barrier height from Fermi-level unpinning, (b) good conduction band alignment between ZnO and Ge, and (c) thin tunneling barrier due to the n+ doping.