Error Resilience Mechanisms Research Articles

Security Threat Analyses and Attack Models for Approximate Computing Systems

Approximate computing (AC) represents a paradigm shift from conventional precise processing to inexact computation but still satisfying the system requirement on accuracy. The rapid progress on the development of diverse AC techniques allows us to apply approximate computing to many computation-intensive applications. However, the utilization of AC techniques could bring in new unique security threats to computing systems. This work does a survey on existing circuit-, architecture-, and compiler-level approximate mechanisms/algorithms, with special emphasis on potential security vulnerabilities. Qualitative and quantitative analyses are performed to assess the impact of the new security threats on AC systems. Moreover, this work proposes four unique visionary attack models, which systematically cover the attacks that build covert channels, compensate approximation errors, terminate normal error resilience mechanisms, and propagate additional errors. To thwart those attacks, this work further offers the guideline of countermeasure designs. Several case studies are provided to illustrate the implementation of the suggested countermeasures.

Video Error-Resilience Research Based on Error-Resilient Screen Content

In order to make video transmission more stable, various error-resilient mechanisms are proposed on video coding in the literature. However, the redundancy mechanism behind classical redundant coding algorithms is relatively simple and is not suitable for the network environment and video content in the context of screen content sequence with multiple abrupt frames and still frames. Motivated by this, a frame-level coding selection mechanism is proposed in this paper for the error-resilience transmission of screen content, where additional code stream or redundant information is considered to improve error-resilient performance with redundant coding and acceptable video quality is obtained in the case of frame transmission error. In addition, selective allocation redundancy is conducted to take the importance of the video frame ROI (region of interest) area into account in the co-encoding process. As a result, the redundancy insertion efficiency and the reliability are improved in return. The corresponding experiments validate the effectiveness of the schemes proposed in this paper.

Game Theoretic Feedback Control for Reliability Enhancement of EtherCAT-Based Networked Systems

EtherCAT has become one of the leading real-time Ethernet solutions for networked industrial systems, where a reliable communication infrastructure is needed due to highly error-prone environments. However, existing work on EtherCAT mainly focuses on clock synchronization and timeliness improvement. The reliability of EtherCAT-based networked systems has largely been ignored. In this paper, we present a proportional integral derivative (PID)-based feedback control scheme that aims at enhancing reliability of networked systems under timing and system resource constraints. Instead of retransmitting data upon error detection, we use forward error control technique based on inequality of arithmetic and geometric means to achieve the required system reliability at a low deadline miss rate of messages. We further optimize the forward error control technique and design a fast and fair error resilient mechanism by using a cooperative game. In addition to reliability enhancement, our PID-based error control scheme can also improve the stability of a system in terms of deadline miss rate in the presence of burst errors. Simulation results show that the proposed scheme can achieve reliability enhancement of up to 91% compared to benchmarking methods.

Error-Resilient Integrated Clock Gate for Clock-Tree Power Optimization on a Wide Voltage IOT Processor

Energy-efficiency optimization occupies an important position in the Internet of Things application. The error-resilience technique has begun to emerge and brought the performance and energy benefits as a new vision for alternative computing, because it eliminates the overconstrained margin in current processor design flow and protects the system from process, supply voltage, temperature, and aging variations through an error-resilient mechanism rather than expensive guardbands. However, as a traditional clock-tree power optimization technique, the clock gating mechanism cannot work in such a system when it faces the timing violation problem. In this paper, we propose an error-resilient integrated clock gate (ERICG) and its automatic integration methodology in error detection and correction (EDAC) system design flow. ERICG can provide the ability of in situ timing EDAC with only four additional transistors compared with a conventional integrated clock gate. The SPICE simulation shows that it is a metastable-hardened cell and can work well in the wide voltage operation (0.5~ 1.1 V) including the near-threshold region. We implement it in a commercial C-SKY CK802 processor based on an SMIC 40-nm technology. The result shows that it improves the energy efficiency by 68% compared with the non-EDAC design and lowers the total power by 28.72% over the conventional EDAC design at 0.6 V.

A framework for evaluating comprehensive fault resilience mechanisms in numerical programs

As HPC systems approach Exascale, their circuit features will shrink while their overall size will grow, both at a fixed power limit. These trends imply that soft faults in electronic circuits will become an increasingly significant problem for programs that run on these systems, causing them to occasionally crash or worse, silently return incorrect results. This is motivating extensive work on program resilience to such faults, ranging from generic mechanisms such as replication or checkpoint/restart to algorithm-specific error detection and resilience mechanisms. Effective use of such mechanisms requires a detailed understanding of (1) which vulnerable parts of the program are most worth protecting and (2) the performance and resilience impact of fault resilience mechanisms on the program. This paper presents FaultTelescope, a tool that combines these two and generates actionable insights by presenting program vulnerabilities and impact of fault resilience mechanisms in an intuitive way.

Exploiting Timing Error Resilience in Processor Architecture

Escalating variations in modern CMOS designs have become a threat to Moore’s law. In light of the increasing costs of standard worst-case design practices, timing speculation has become a popular approach for dealing with static and dynamic non-determinism and increasing yield. Timing speculative architectures allow conservative guardbands to be relaxed, increasing efficiency at the expense of occasional errors, which are corrected or tolerated by an error resilience mechanism. Previous work has proposed circuit- or design-level optimizations that manipulate the error rate behavior of a design to increase the efficiency of timing speculation. In this article, we investigate whether architectural optimizations can also manipulate error rate behavior to significantly increase the effectiveness of timing speculation. To this end, we demonstrate how error rate behavior indeed depends on processor architecture and that architectural optimizations can be used to manipulate the error rate behavior of a processor. Using timing speculation-aware architectural optimizations, we demonstrate enhanced overscaling and up to 29% additional energy savings for processors that employ Razor-based timing speculation.

Recovery-Driven Design: Exploiting Error Resilience in Design of Energy-Efficient Processors

Conventional computer-aided design (CAD) methodologies optimize a processor module for correct operation and prohibit timing violations during nominal operation. We propose recovery-driven design, a design approach that optimizes a processor module for a target timing error rate (ER) instead of correct operation. The target ER is chosen based on how many errors can be gainfully tolerated by a hardware or software error resilience mechanism. We show that significant power benefits are possible from a recovery-driven design approach that deliberately allows errors caused by voltage overscaling to occur during nominal operation, while relying on an error resilience technique to tolerate these errors. We present a detailed evaluation and analysis of such a CAD methodology that minimizes the power of a processor module for a target ER. We show how this design-level methodology can be extended to design recovery-driven processors-processors that are optimized to take advantage of hardware or software error resilience. We also discuss a gradual slack recovery-driven design approach that optimizes for a range of ERs to create soft processors-processors that have graceful failure characteristics and the ability to trade throughput or output quality for additional energy savings over a range of ERs. We demonstrate significant power benefits over conventional design-11.8% on average over all modules and ER targets, and up to 29.1% for individual modules. Processor-level benefits were 19.0%, on average. Benefits increase when recovery-driven design is coupled with an error resilience mechanism or when the number of available voltage domains increases.

TFMCC versus ASMP: lessons learned from performance evaluation

In this article we present a simulation-based comparison of one of the best-known multicast congestion control schemes—TCP-friendly Multicast Congestion Control (TFMCC)—against our proposed Adaptive Smooth Multicast Protocol (ASMP). ASMP consists of a single-rate multicast congestion control mechanism which takes advantage of the RTCP Sender (SR) and Receiver Reports (RR) in order to adjust the sender's transmission rate in respect of the network conditions. The innovation in ASMP lays in the ‘smooth’ transmission rate, which is TCP-friendly and prevents oscillations. We use an integrated simulation environment named Multi-Evalvid-RA for the evaluation of the two congestion control schemes. Multi-Evalvid-RA provides all the necessary tools to perform simulation studies and assess video quality by using both network-centric metrics along with video quality measurements. Performance evaluation results show that ASMP is a very efficient solution for rate-adaptive multimedia applications and a serious competitor to well-known TFMCC. Copyright © 2012 John Wiley & Sons, Ltd. (Uncontrolled video transmission without any flow/congestion control mechanisms should be avoided as it leads to poor-quality service due to packet losses. Therefore, moderate transmission rates that satisfy the video application requirements are preferable to avoid packet losses. Otherwise, error resilience mechanisms should be applied to recover from losses, especially from I-frames that cannot be recovered by the video decoders. More efficient video encoding techniques along with error resilience and higher access capacity are the key elements for increasing video quality.)

An Adaptive Systematic Lossy Error Protection Scheme for Broadcast Applications Based on Frequency Filtering and Unequal Picture Protection

Systematic lossy error protection (SLEP) is a robust error resilient mechanism based on principles of Wyner-Ziv (WZ) coding for video transmission over error-prone networks. In an SLEP scheme, the video bitstream is separated into two parts: a systematic part consisting of a video sequence transmitted without channel coding, and additional information consisting of a WZ supplementary stream. This paper presents an adaptive SLEP scheme in which the WZ stream is obtained by frequency filtering in the transform domain. Additionally, error resilience varies adaptively depending on the characteristics of compressed video. We show that the proposed SLEP architecture achieves graceful degradation of reconstructed video quality in the presence of increasing transmission errors. Moreover, it provides good performances in terms of error protection as well as reconstructed video quality if compared to solutions based on coarser quantization, while offering an interesting embedded scheme to apply digital video format conversion.

A Robust Error Detection Mechanism for H.264/AVC Coded Video Sequences Based on Support Vector Machines

Current trends in wireless communications provide fast and location-independent access to multimedia services. Due to its high compression efficiency, H.264/AVC is expected to become the dominant underlying technology in the delivery of future wireless video applications. The error resilient mechanisms adopted by this standard alleviate the problem of spatio-temporal propagation of visual artifacts caused by transmission errors by dropping and concealing all macroblocks (MBs) contained within corrupted segments, including uncorrupted MBs. Concealing these uncorrupted MBs generally causes a reduction in quality of the reconstructed video sequence.

Error-Resilient Performance of Dirac Video Codec Over Packet-Erasure Channel

Video transmission over the wireless or wired network requires error-resilient mechanism since compressed video bitstreams are sensitive to transmission errors because of the use of predictive coding and variable length coding. This paper investigates the performance of a simple and low complexity error-resilient coding scheme which combines source and channel coding to protect compressed bitstream of wavelet-based Dirac video codec in the packet-erasure channel. By partitioning the wavelet transform coefficients of the motion-compensated residual frame into groups and independently processing each group using arithmetic and forward error correction (FEC) coding, Dirac could achieves the robustness to transmission errors by giving the video quality which is gracefully decreasing over a range of packet loss rates up to 30% when compared with conventional FEC only methods. Simulation results also show that the proposed scheme using multiple partitions can achieve up to 10 dB PSNR gain over its existing un-partitioned format. This paper also investigates the error-resilient performance of the proposed scheme in comparison with H.264 over packet-erasure channel.

Adaptive video redundancy coding for scene and channel adaptation over error-prone network

In this paper, a new error-resilient video coding method with scene adaptation is proposed, which is based on video redundancy coding (VRC) of H.263 version 2, formerly known as H.263+. The proposed error-resilient mechanism adaptively changes the VRC coding parameters for multiple threads according to the channel status. Also, the scene-adaptation is incorporated into the network-aware error resilient method in order to reduce the motion-jerkiness occurred by an abrupt scene change. Simulation results show that the proposed adaptive VRC mechanism does not only react properly to the time-varying network status, but also reduce fluctuations of the video quality.

Extending an Open Media-Streaming Platform to Support Differentiated Services

In this paper, architectural extensions for enhancing an open media-streaming platform with Differentiated Services (DiffServ) mechanisms are studied, implemented, and experimentally evaluated. Towards this end, an appropriate layering is adopted in order to enable the definition of Quality of Service (QoS) specifications and their mapping to network parameters during transmission. Furthermore, a component dedicated to the off-line study of quality requirements is specified and integrated into the QoS aware platform. This component enables to preview the effects of quality violations on media streams, before they are transmitted to the network, by simulating packet losses/delays during the packetization process. Based on this component, a suitable quality metric is introduced for video streams, which is sensitive both to spatial and temporal distortion effects and can be easily applied to other types of streams, or to groups of related streams (e.g. synchronized audio-video). The aforementioned extensions are implemented on the open source MPEG4IP platform. The applicability of certain QoS policies is experimentally evaluated over a laboratory-based DiffServ testbed. In this case, QoS specifications are mapped to DiffServ compliant Type of Service (ToS) values during transmission. Experiments are conducted with an MPEG-4 encoded video stream under different network configurations, QoS policies, and error resilience mechanisms. The performance of the stream is evaluated based on the proposed quality metric.

Adaptive transmission control for error-resilient multimedia synchronization

Multimedia streams impose tight temporal constraints since different kinds of continuous multimedia streams have to be played synchronously. We devise in this paper a adaptive transmission scheme to ensure the error-resilient and synchronous playback of audio and video streams based on the real-time transport protocol. Realization of our adaptive transmission control is composed of a series of operations in three stages, namely, (1) dynamic reordering mechanism, (2) error-resilient mechanism, and (3) adaptive synchronization mechanism. In this paper, an empirical study is conducted to provide insight into our adaptive transmission scheme. As validated by our performance study, the adaptive transmission mechanism is able to strike a good balance of both stable playback and the end-to-end delay reduction. Furthermore, we analyze the jitter resistance, the end-to-end delay, and video quality in order to enhance the applicability of this scheme to more applications that require the transmission of multimedia data.

Error concealment algorithm using interested direction for JPEG 2000 image transmission

Digital image transmission is widely used in consumer products, e.g., digital camera and cellular phone, etc. The newly defined JPEG 2000 delivers image with lower bit rate in the Internet and wireless communications. However, JPEG 2000 decoding is processed bitplane by bitplane. Any data loss in bitstream affects the consequent bitplanes and even possible destroy the whole picture. We propose a new algorithm to recover the damaged bitplanes data according to the interested directional sets (IDS) of in-subband. The proposed algorithm is quite simple, but is very efficient in concealing the loss data of any subband in streaming real-time video data in the Internet and wireless communications. The simulation results show that the proposed algorithm has 1.5-3dB improvements than previously presented error resilient mechanism. In a subjective view, the proposed concealment algorithm can achieve much smoother edges on the reconstructed images.

Loss-resilient ATM protocol architecture for MPEG-2 video communications

MPEG-2 video communications over ATM networks is one of the most active research areas in the field of computer communications. In the transmission process of a variable bit rate video signal over an ATM network, cells are inevitably exposed to delays, errors, and losses due to the statistical multiplexing used in these networks. These phenomena affect the quality of the video signal, and without adequate measures to control the propagation of the impairments, the quality of the service may fall below acceptable levels. In this paper, we study the impact of cell losses on the quality of an MPEG-2 video sequence encoded in a variable bit rate mode. We introduce a set of control mechanisms at different levels of the protocol architecture to be used in MPEG-2-based video communications systems using ATM networks as their underlying transmission mechanism. Our results (using different video sequences) show the effectiveness to improve the video quality by using a structured set of control mechanisms to overcome for the loss of cells carrying VBR MPEG-2 video streams. We argue that in order to be able to create video systems able to cope with cell losses encountered in computer communications systems, a structured set of error-resilient protocol mechanisms is needed.

Media Coding and Distribution over Unreliable Networks: Some Issues

The field of distributed multimedia computing and systems has shown extraordinary growth as witnessed by new technologies and trends. With ever increasing demand for sharing multimedia information across the Internet and in distributed environments, there is a large demand to come up with cost-effective and graceful solutions on Desktops and PCs using the current installed base of networks.The present paper is meant as an overview of the various issues involved in media coding and its playback at remote receivers after being transmitted on error prone and unreliable networks. Limitation of the current networks in providing the performance required by real-time multimedia streams and the issues which need to be addressed to provide acceptable multimedia playback presentation at remote receivers is also presented. Issues such as synchronization, error resilient mechanisms and end-to-end delay are discussed in detail. The present paper also considers Quality-of-Service (QoS) and Quality-of-Presentation (QoP) requirements.

An efficient protocol architecture for error-resilient MPEG-2 video communications over ATM networks

MPEG-2 video communications over ATM networks is one of the most active research areas in the field of computer communications. In the transmission process of a variable bit rate video signal over an ATM network, cells are inevitably exposed to delays, errors and losses due to the statistical multiplexing used in these networks. These phenomena affect the quality of the video signal and without adequate measures to control the propagation of the impairments the quality of the service may fall below acceptable levels. In this paper, we study the impact of cell losses on the quality of a MPEG-2 video sequence encoded in a variable bit rate mode. We introduce a set of control mechanisms at different levels of the protocol architecture to be used in MPEG-2-based video communications systems using ATM networks as their underlying transmission mechanism. Our results (using different video sequences) show the effectiveness to improve the video quality by using a structured set of control mechanisms to overcome for the loss of cells carrying VBR MPEG-2 video streams. We argue that in order to be able to create video systems able to cope with cell losses encountered in computer communications systems, a structured set of error-resilient protocol mechanisms is needed.

Application of H.263+ Video Coding Modes in Lossy Packet Network Environments

The quality of real-time audio and video information transmitted via today's Internet suffers severely from often significant packet losses. While this problem is well understood and solved for existing audio coding schemes, support from the video coding standards themselves is required for video streams. This paper presents the newly introduced error resilience mechanisms built into the second version of H.263 (1998), known under its working name H.263+, and addresses the corresponding packetization format issues that together significantly improve the image quality at packet loss rates up to 20%. In particular, it is support from the video coding algorithm itself, paired with appropriate transport layer mechanisms, that leads to significant improvements of perceived image quality for communicative as well as retrieval applications at moderate bit rates up to some 100 kbit/s.