Equivalent Switching Frequency Research Articles

Research on transformer based online condition monitoring method for IPM

Abstract The Intelligent Power Module (IPM) has the integrated packaging, leading to the advantages of convenient use, safety and reliability. However, once it fails, it will cause the whole power supply system to be inoperative, and it is necessary to perform online Condition Monitoring (CM) of the IPM. In this paper, we extract the aging characteristics such as dynamic equivalent resistance, peak-to-peak value, switching frequency, and turn-off time only from the voltage and current of IPM drain–source port, and then propose a non-intrusive online CM method for the IPM based on the transformer neural network (TNN). We analyse the internal aging mechanism of the IPM, the changing law of aging features, and construct multi-dimensional aging fusion features, and then the TNN model is used to monitor early parameters drift of multi-dimensional fusion feature vectors and realize the accurate online prediction of IPM health condition. The experimental analysis results show that the fault prediction accuracy reaches 96%, and can realize the health CM under the condition of noise interference, weak aging features and few external observable points.

Circulating Current Suppression Scheme for Interleaved Active Neutral Point Clamped Nine-Level Inverter

The interleaved active neutral point clamped nine-level (ANPC-9L) inverter can be used in 1500V photovoltaic power generation because of its advantages of low voltage stress, high equivalent switching frequency and small filter size. Circulating current between sub modules is a key problem for ANPC-9L. A simple scheme to realize circulating current suppression for ANPC-9L inverter is presented in this paper. The operation of the ANPC-9L is briefly discussed, and the model of coupled inductor is given. Analysis shows that the redundant working states of the inverter with same output voltage can be used to suppress the circulating current. Another objective is to analyze circulating current imbalance at the band transition when using phase disposition pulse width modulation (PD SPWM) strategy. A solution is proposed to cancel current imbalance. Simulation and experiment verify the effectiveness of the proposed strategy.

Model predictive control of modular multilevel converter based on fixed switch state set for offshore wind power

AbstractThis paper aims at the problems of the traditional modular model predictive control (MPC) of modular multilevel converter (MMC) with huge computational complexity and high equivalent switching frequency. In this paper, a model predictive control method based on fixed switch state set (FSS‐MPC) is proposed. In this method, two cost functions are used to control phase current and circulating current. Meanwhile, the number of the upper and lower on‐state sub‐modules (SM) is obtained by cost functions. In order to obtain the optimal switching sequence of SM, FSS‐MPC adopts a SM capacitive voltage balancing strategy which has low sorting frequency. Under the control of the FSS‐MPC, the amount of switch combination and sorting computation are greatly reduced. In addition, the switching frequency is extremely low. Finally, to verify the effectiveness and feasibility of the proposed control strategy, a simulation system of 11‐level MMC for offshore wind power has built on the MATLAB/Simulink platform.

A monolithic gallium nitride‐based two‐phase synchronous buck converter with high operating frequency

AbstractThe need for a high‐frequency and high‐efficiency gallium nitride (GaN)‐based buck converter that can be controlled directly by a low swing pulse width‐modulated (PWM) signal, without the need for additional buffers or preamplifiers, poses a significant challenge in the field of power conversion and dynamically power supply applications. To solve this problem, this letter presents a monolithic two‐phase synchronous buck converter, fabricated using a 0.25‐um GaN‐on‐Si process, integrated both the drivers and power stage transistors, without requiring additional buffers or preamplifiers. So, the proposed converter can be directly controlled by a PWM signal with a swing of only 1 V (−0.5 to 0.5 V). At a 100‐MHz switching frequency, the converter achieves a maximum output power of 12 W with a power stage efficiency of 82%. The converter includes two identical half‐bridge Monolithic Microwave Integrated Circuit (MMICs), and with the frequency multiplication property of multi‐phase topology, the equivalent switching frequency can reach 200 MHz in the open‐loop operating mode. The experimental results show that the converter can track a 40‐MHz bandwidth envelope signal (256 QAM, 6 dB PAPR) with 80.1% efficiency.

Evaluation and Performance of Three-Phase Inverter Using Multiple Bidirectional Choppers Intended for 1.5-kVdc PV Systems

This article focuses on the chopper-cell number of a novel three-phase inverter for utility-scale photovoltaic (PV) systems where multiple cascaded bidirectional chopper cells and a three-phase line-frequency transformer with a three-legged core are used. The inverter per phase is composed of a main converter, which is equivalent to the conventional bidirectional chopper, and an auxiliary converter, which is composed of multiple cascaded chopper cells. Although the inverter performance can be improved by increasing the chopper-cell number because of increased switching frequency and reduced voltage steps, the increased cell number may result in increased converter loss and cost. However, no paper has evaluated the chopper-cell number of the inverter to the best of the authors’ knowledge. Further, no paper has carried out experimental verification of the inverter during the power faults. This article evaluates the inverter using two cells per phase (two-cell inverter) with the one using three cells per phase (three-cell inverter) under the same equivalent switching frequency in terms of converter loss, efficiency, and steady/transient state performance. The numerical analysis shows that the two-cell inverter shows superiority over the three-cell inverter in converter efficiency. Further, the experiments using a 1.5-kW downscaled model verify the inverter performance under the normal and fault conditions.

Reconfigurable Large-Current and High-Voltage Test Bench for HVDC Circuit Breaker Verification

This article presents a novel circuit configuration of a high-voltage direct current circuit breaker (HVdcCB) test bench that is based on a modified H-bridge modular multilevel cascaded converter (MMCC). The modified MMCC is composed of fewer H-bridge cells, and it can be reconfigured during operation to allow the proposed test bench to output large current or high voltage for the current breaking and dielectric withstand tests. Although simultaneous output of large current and high voltage is not possible, the maximum transient interrupt voltage (TIV) withstand test can be performed with reduced ratings. The controllable output allows generation of complex waveforms to simulate a wide range of fault conditions. Furthermore, the modified MMCC has some inherent safety features that can reduce the need for additional protective equipment in case of operational failure of the HVdcCB. In contrast, the conventional charged capacitor and inductor-based designs cannot generate arbitrary waveforms, are only suitable for current breaking tests, and require additional circuits to generate initial conditions for the HVdcCB. AC short-circuit generator-based designs offer one degree of freedom for control of the output waveforms and can sustain the maximum TIV withstand test. However, the ac output is unsuitable for the dielectric withstand test, and additional circuits are required to provide initial conditions for the HVdcCB. The proposed test bench circuit configuration is verified using a downscaled experimental test bench that consists of a total of nine H-bridge cells with an equivalent switching frequency of 92.5 kHz.

EMI-Regulated SiC-Based Motor Drives With Markov Chain Pseudo-Random Frequency Space Vector Pulse Width Modulation Strategy

Compared with traditional silicon-based (Si) power devices, wide-bandgap (WBG) power devices have broader application prospects in AC motor drive due to their high-temperature reliability, low conduction, and switching losses. However, a fast switching process and high switching frequency will cause more serious conducted electromagnetic interference (EMI) emission. To solve the problem, this paper proposed a pseudo-random frequency space vector pulse width modulation (PRF-SVPWM) strategy based on a carrier with a pseudo-random frequency. There are two sawtooth waves with the same frequency but opposite phases as alternatives. The proposed method randomly selects only one sawtooth wave during a complete control period. After random combination, the generated carrier is no longer a regular sawtooth wave. This new carrier contains 4 different modes including 2 sawtooth (positive and negative) and 2 triangular waves (positive and negative). A 2-state Markov chain is introduced to produce a PRF control signal which is regarded as the law of choice. In this way, the equivalent switching frequency keeps constant but the real-time switching frequency will randomly vary within the determined range. EMI emission level can be significantly reduced. The effectiveness of the proposed PRF-SVPWM is verified by several sets of experiment results.

High Bandwidth Series-Form Switch-Linear Hybrid Envelope Tracking Power Supply With Reduced Bandwidth Envelope and Step-Wave Edge Adjustment Methods

The series-form switch-linear hybrid envelope tracking (ET) power supply is constituted by a multilevel converter and a linear amplifier connected in series, featuring high efficiency and wide tracking bandwidth. With the development of wireless communication, the envelope bandwidth of the radio-frequency signal reaches tens of megahertz and even hundreds of megahertz, leading to a high switching loss in the multilevel converter and thus degraded overall efficiency of the ET power supply. To reduce the switching loss and ensure high tracking bandwidth, this article proposes to let the multilevel converter track the reduced bandwidth envelope signal and the linear amplifier track the original one. Then, a step-wave edge adjustment method is proposed to adjust or eliminate the rising and falling edges of the step-wave voltage for further reducing the equivalent switching frequency of the multilevel converter and the voltage across the power device of the linear amplifier. As a result, the switching loss in the multilevel converter and the power loss in the linear amplifier could be reduced, leading to a notably higher overall efficiency. A prototype with 40 MHz tracking bandwidth, 7–27 V output voltage, and 15 W average output power is fabricated and tested in the lab, and the experimental results are provided to verify the effectiveness of the proposed method.

A Phase-Disposition PWM-Enabled Model Predictive Control for a Nine-Level Inner-Interleaved Hybrid Multilevel Converter

This article brings forward a phase-disposition pulsewidth modulation-enabled model predictive control (PDPWM-MPC) for a nine-level inner-interleaved hybrid multilevel converter (9L-IHMC). First, three layers of virtual space vector diagrams (VSVDs) are established based on the sign patterns of the original and virtual reference vectors in the abc-frame to achieve the phase-disposition pulsewidth modulation (PD-PWM) in a nonindependent three-phase way. Then, three adjacent virtual vectors in the third-layer VSVD, together with their optimized duty cycles, are applied to guarantee the optimal current tracking. Finally, through the use of the duty-cycle alternation approach, dc-link and floating capacitors voltages are balanced and circulating currents are mitigated as well. The proposed PDPWM-MPC can not only enable the decoupling of the low- and high-frequency stages in the 9L-IHMC but also reduce both output current ripples and computational burden. In addition, it can achieve a constant equivalent switching frequency and address the disproportion of power losses associated with the PD-PWM. Both simulations and experiments on a silicon carbide device-based prototype substantiate the effectiveness of the proposed control strategy.

A Step-Down Resonant Modular Multilevel DC/DC Converter With Extendable ZVS Range Based on Asymmetric Triangular Current

In this article, a new step-down resonant modular multilevel dc/dc converter is proposed for medium-voltage applications. The proposed converter is derived from the combination of the modular multilevel converter (MMC) and resonant converter with a passive auxiliary circuit. It can achieve zero voltage switching (ZVS) over a wide input voltage range for all switches compared with the conventional dc/dc MMC. Specifically, the asymmetric triangular compensating current provided by the passive auxiliary circuit is first introduced to flow into the bridge arms. Then, the current bias caused by the MMC structure is eliminated in the lower side switches of the submodules to achieve ZVS. Moreover, asymmetrical pulsewidth modulation is applied to double the equivalent switching frequency and obtain a high step-down ratio. In this way, the resonant current is reduced, and the conversion efficiency is improved. Besides, the simulation and experimental results of the prototype are presented to demonstrate the viability of the proposed converter. The results convincingly verify the ability of the proposed converter to offer ZVS for all the switches over a wide input voltagerange.

A Hybrid Multivector Model Predictive Control for an Inner-Interleaved Hybrid Multilevel Converter

A hybrid multivector model predictive control strategy for an inner-interleaved hybrid multilevel converter is brought forward in this article, which can enable the separation of the low- and high-frequency stages. It initiates with the use of sign patterns of the reference vector in the stationary reference frame to determine switching states of the low-frequency stage. Then, the reference vector is converted to the inner virtual space vector diagram, which is further transformed into a 120° oblique coordinate system, where the adjacent vectors are selected. Further, the current tracking is realized through the duty cycle optimization of the chosen vectors. Finally, a symmetric switching sequence (SS), which serves as the best one for dc capacitors voltages balancing and circulating current suppression, is selected among all the SSs that belong to the three chosen vectors with optimal duty cycles. The proposed method reduces both current ripples and computational burden while achieving a constant equivalent switching frequency. Comprehensive experimental results performed on an all silicon-carbide prototype verify the effectiveness of the proposed control.

A Hybrid Model Predictive Control With Integrated Phase-Disposition and Phase-Shifted PWM for an Inner-Interleaved Hybrid Multilevel Converter

This article puts forward a hybrid model predictive control (H-MPC) for an inner-interleaved hybrid multilevel converter (IHMC). The sign patterns of the original and shifted reference vectors in the original and virtual space vector diagrams (VSVDs) are used, respectively, to realize the phase-disposition pulsewidth modulation (PWM) and determine the low-frequency switching states. Then, the three adjacent vectors are selected in the second-layer VSVD and the optimal current tracking is safeguarded by the duty cycle optimization of the three adjacent vectors. Finally, through applying the phase-shifted PWM to the two interleaved legs, a constant and doubled equivalent switching frequency can be achieved, which further paves the way for dc-link and floating capacitor voltages balancing and circulating current mitigation with the use of the straightforward duty cycle adjustments. The proposed H-MPC enables the decoupling of the low- and high-frequency stages in the IHMC and also reduces both output current ripples and computational burden while achieving a constant switching frequency simultaneously. Comprehensive simulation and experimental studies on an all silicon carbide prototype verify the effectiveness of the proposed control strategy.

Dual-Circuit-Based Test Bench Design for HVDC Circuit Breaker Verification

High-voltage direct current (HVDC) circuit breaker development and deployment strongly depend on the testing process, which ensures that the HVDC circuit breakers will satisfy design requirements. This article presents an HVDC circuit breaker test bench circuit configuration that can provide controllable large output currents to simulate different fault conditions for the current breaking test and high output voltage for the dielectric withstand test. The current breaking test circuit is based on multiple cascaded power converters connected in parallel to provide the necessary output current capability. Each cascaded power converter is composed of multiple cells that are operated by a phase-shifted pulsewidth-modulated signal for greater controllability and higher quality of the output waveform. The dielectric withstand test circuit is a simple high-voltage source with a low power rating that can also be used to charge the test bench and the internal circuitry of the circuit breaker that is to be tested. The proposed test bench ensures that fault conditions can be replicated accurately and offers greater flexibility by being able to test mechanical, semiconductor-based, or hybrid HVDC circuit breakers with different current and voltage ratings on the same hardware without any changes. The idea and the operating principle of the proposed test bench are verified experimentally on a downscaled system that consists of three cascaded power converters connected in parallel with three cells per cascaded power converter and with a total equivalent switching frequency of 92.5 kHz.

Modeling and Analysis of Voltage Harmonic for Three-Level Neutral-Point-Clamped H-Bridge Inverter Considering Dead-Time

The advantages of three-level neutral-point-clamped (NPC) H-bridge inverters, such as simple topological structure, low device voltage stress, high equivalent switching frequency, and highly expansible capacity, have made them the preferred choice for inverters matching with medium voltage high-capacity multi-phase open-end winding vessel propulsion motors. To quantitatively evaluate the propulsion motors’ harmonics, electromagnetic vibration, and noise caused by pulse-width modulation (PWM) and device dead-time, it is necessary to research the mathematical modeling of pulse-width modulated output voltage harmonics in consideration of dead-time. In this paper, the principle of the phase-disposition PWM method of the 3L-NPC H-bridge inverters was firstly introduced. Then, the analytical models of output voltage harmonics with and without considering the effect of dead-time were established based on the double Fourier series approach and the harmonic distribution of the dead-time effect was accurately characterized. On the basis of the above, the experimental platform was established to verify the proposed analytical model. Simulation and experimental results are consistent with the theoretical analysis in low and high-frequency output voltage harmonics, which proves the correctness and the feasibility of the analytical modeling method researched by this paper. This will provide a theoretical basis for subsequent studies, which include the quantitative analysis and the suppression of output harmonics of the H-bridge inverter considering dead-time.

A Synchronous Distributed Communication and Control System for SiC-Based Modular Impedance Measurement Units

Single-phase modular impedance measurement unit (IMU) is a promising solution to power system stability analysis. Yet, existing designs only have modularity at the power-stage level other than the control-platform level, which restricts the scalability of modular IMUs. As such, this article proposes a distributed communication and control system (DCCS) for high-frequency large-scale modular IMUs with tight synchronization and low latency to enhance the controller-level modularity and scalability. The new architecture is realized on a widely adopted DSP+FPGA control platform that can be adapted from most existing centralized control systems (CCSs) of modular converters. In this article, the influence of synchronization accuracy (SA) on converter harmonics under carrier-based PWM is first investigated, followed by the study of communication latency’s impact on the system control frequency. Subsequently, the synchronization method of a combined oversampling clock and data recovery (CDR) plus precision time protocol (PTP) method is presented. Furthermore, a communication protocol to maximize control frequencies and a system-level control strategy are elaborated. Finally, controller- and converter-level experimental results are demonstrated on a 520-V, 20-A, SiC-MOSFET-based IMU prototype at 120-kHz equivalent switching frequency, achieving a well-performed ±12.5-ns SA and 60-kHz control frequency.

Variable Voltage Variable Frequency Modular Multilevel AC/AC Converter With High-Frequency Harmonics Filtering Capability

This article proposes a variable voltage variable frequency modular multilevel ac/ac converter (VVVF-MMC) with a high-frequency isolation link, which can realize voltage and frequency conversion simultaneously with insulated-gate bipolar transistors (IGBTs) of the same rated voltage and current level. The parallel connection of multiple modules is realized by coupling reactors, which can realize large-scale voltage and current transformation and save volume. It combines parallel multiplexing and serial multiplexing technology of submodules (SMs) to increase the equivalent switching frequency, thereby canceling nonzero sequence high-frequency voltage and current harmonics, so it has good power quality in the steady-state. Under the improved carrier phase-shifted pulsewidth modulation (CPS-PWM) strategy, the pulse flip circuit can realize soft switching operation, thereby improving energy conversion efficiency. Furthermore, dc capacitor voltage balancing and parallel SM current balancing control strategies are designed. With the strong filtering ability, the proposed ac/ac converter can be used as the onshore converter station of fractional frequency offshore wind power system. Due to the advantages of small size and high efficiency, it also has broad application prospects in distribution networks and electric drive. Simulation and experimental results validate the effectiveness of the proposed converter topology.

A Parallel Topology Based Power-Stage PMSM Emulator With Accurate Ripple Current Reproduced

As a power hardware-in-the-loop (PHIL) technology, the power-stage motor emulator (ME) can be employed for the port characteristics emulation of motors. Meanwhile, the ripple current reproduction is one of the key technologies for achieving the high precision emulation of the port characteristics. Commonly, the high requirement for the hardware topology and the modulation strategy with rapid response and low harmonics are the main challenges. Aiming to obtain the precision ripple current, a ME scheme with dual-branch parallel topology is proposed in this paper, of which the equivalent switching frequency can be increased greatly by mean of interleaving switch. Furthermore, a new three-level space vector modulation strategy based on the idea of virtual transformation is presented. With the proposed strategy, the dual-branch parallel topology can be equivalently transformed into a specific three-phase three-level back-to-back topology. Finally, simulation and bench experiments have been conducted to validate the effectiveness of the proposed scheme. The results indicate that the proposed topology combined with the modulation strategy has a superior performance in improving the ripple current tracking accuracy of ME. Moreover, the proposed method can provide an excellent insight into improving the emulation accuracy of motor characteristics in practical applications.

Design and Analysis of a Novel HVDC Circuit Breaker Test Bench Based on an H-Bridge Cell MMCC

This paper proposes a novel circuit configuration for a high-voltage direct-current circuit breaker (HVDCCB) test bench that differs significantly from conventional test benches. The proposed test bench consists of a modular multilevel cascaded converter (MMCC) that is based on H-bridge cells, an output inductor, and an auxiliary capacitor bank. The proposed test bench is capable of generating controllable output currents up to several kiloamperes and output voltages up to several hundred kilovolts because each MMCC cell is operated by phase-shifted pulse-width-modulated (PSPWM) signals. Consequently, the proposed test bench can simulate a wide range of fault conditions within hardware limitations to test different HVDCCB types with various current and voltage ratings. The flexibility of the proposed test bench is complemented by a longer service lifetime with inherent circuit protection in the case of operational failure of the HVDCCB. The concept of the proposed test bench is verified experimentally on a downscaled test bench that consists of nine H-bridge cells and operates at an equivalent switching frequency of 92.5 kHz.

Symmetrical Cascaded Switched-Capacitor Multilevel Inverter Based on Hybrid Pulse Width Modulation

Multilevel inverters have been widely used in various industrial applications such as renewable energy generation and electric vehicles. An improved circuit of symmetrical cascaded switched-capacitor multilevel inverter is proposed so that the reactive power is absorbed by its power supply instead of capacitors. Then, a special hybrid pulse width modulation strategy combing level-shifted pulse width modulation (LS-PWM) and phase-shifted pulse width modulation (PS-PWM) was developed for the inverter. With this modulation algorithm, the power between cascaded units is automatically balanced, and the voltage of the capacitor in each unit is also automatically balanced to the dc input voltage. In addition, the optimized capacitor voltage ripple makes it possible to use a smaller capacitor to produce a better output voltage waveform. Theoretical analysis, simulation and experimental results show that the equivalent switching frequency of the cascaded multilevel inverter is twice the original frequency so that the output voltage harmonics are only distributed near even multiples of the carrier frequency.

Research on Topology and Control System of High Power Grid Simulator

Grid simulator can simulate the output of various types of power grid failure to test wind power grid-side equipment, in the design of high-power grid simulator, due to the switching frequency restrictions, will affect the control bandwidth, resulting in the power grid simulator system performance decline. Therefore, the modular multi-level converter (MMC) with higher equivalent switching frequency is used on the inverter side of the grid simulator, and the bridge arm circulation suppression strategy based on the second-order generalized integrator (SOGI) and vector scale integral (VPI) resonant controller is proposed for the internal bridge arm circulation of the converter. Finally, based on RT-LAB, the network simulator controller hardware in the ring (CHIL) experimental platform is built and experimented, the experimental results show that the design of high-power power grid simulator system can simulate the output to obtain the required grid failure.