Enhancement Mode Operation Research Articles

Engineered interface charges and traps in GaN metal-oxide-semiconductor field-effect transistors providing high channel mobility and E-mode operation

Abstract This review focuses on controlling interface charges and traps to obtain minimal channel resistance and stable enhancement-mode operation in GaN metal-oxide-semiconductor field-effect transistors. Interface traps reduce the free electron density and act as Coulomb scattering centers, thus reducing the channel mobility. Oxide traps cause instability of threshold voltage (V th) by trapping electrons or holes under gate bias. In addition, the V th is affected by the overall distribution of interface charges. The first key is a design of a bilayer structure to simultaneously obtain good insulating properties and interface properties. The other key is the optimization of post-deposition annealing to minimize oxide traps and interface fixed charges. Consequently, the gate structure of an AlSiO/AlN/p-type GaN has been designed. Reductions in V th as a result of polarization charges can be eliminated by using an m-plane trench channel, resulting in a channel mobility of 150 cm2V–1s–1 and V th of 1.3 V.

Dual-gate AlGaN channel HEMTs: advancements in E-mode performance with N-shaped graded composite barriers

Abstract This work evaluates the performance of dual gate AlGaN channel HEMTs on SiC substrate. The study analyzes two HEMT structures that differ only in barrier design, one design consists of fixed composite barriers (FCB-HEMT) i.e. there is fixed Aluminum composition x = 0.48 in the first Al x Ga1−x N barrier and x = 0.42 in the second Al x Ga1−xN barrier while the other design comprises N-shaped graded composite barriers (NGCB-HEMT) i.e. the Aluminum content varies gradually from 0.4 to 0.48 in the first AlGaN barrier and from 0.34 to 0.42 in the second AlGaN barrier. The paper concentrates on energy band diagrams, electron concentration profile, electric field distribution, drain and transfer characteristics, and the effects of high temperature on drain characteristics and mobility of the NGCB-HEMT. It has been reported that at zero gate bias, the FCB-HEMT has a drain current density of 0.137 A mm−1 while it decreases to 0.0058 A mm−1 in the case of NGCB-HEMT, thus presenting a novel approach towards enhancement-mode AlGaN HEMTs. Hence, grading can be optimized in the composite barriers to achieve enhancement mode operation of AlGaN channel HEMTs. Furthermore, the study reveals that the critical electric field of FCB-HEMT is 6.9975 M V cm−1, while that of NGCB-HEMT is 5.3124 M V cm−1, demonstrating their usefulness in electronic devices that operate at high voltages and harsh temperatures. Moreover, at higher temperatures, the phenomenon of optical phonon scattering leads to decreased mobilities, which in turn causes low drain currents relative to the drain voltage.

Ga2O3 fin field-effect transistors with on-axis (100)-plane gate sidewalls fabricated on Ga2O3 (010) substrates

Ga2O3 fin field-effect transistors (FinFETs) were fabricated on β-Ga2O3 (010) substrates, which had on-axis (100)-plane gate sidewalls treated by nitrogen radical irradiation. The typical FinFET with a fin width (W fin) of 400 nm demonstrated decent on-state device characteristics such as a low specific on-resistance of 6.9 mΩcm2, a high drain current on/off ratio of over 109, and a subthreshold slope of 82 mV/decade. The threshold voltage (V th) of the FinFETs increased with decreasing W fin, and enhancement-mode operation with V th > 0 V was achieved for W fin < 800 nm.

Achieving Ambipolar Transport Characteristics in the n-WS2 Channel via Remote p-Doping and its Enhancement-Mode Ambipolar Field-Effect Transistor Operation

Achieving Ambipolar Transport Characteristics in the n-WS₂ Channel via Remote p-Doping and its Enhancement-Mode Ambipolar Field-Effect Transistor Operation

Impact of Channel Thickness and Doping Concentration for Normally-Off Operation in Sn-Doped β-Ga2O3 Phototransistors.

We demonstrate a Sn-doped monoclinic gallium oxide (β-Ga2O3)-based deep ultraviolet (DUV) phototransistor with high area coverage and manufacturing efficiency. The threshold voltage (VT) switches between negative and positive depending on the β-Ga2O3 channel thickness and doping concentration. Channel depletion and Ga diffusion during manufacturing significantly influence device characteristics, as validated through computer-aided design (TCAD) simulations, which agree with the experimental results. We achieved enhancement-mode (e-mode) operation in <10 nm-thick channels, enabling a zero VG to achieve a low dark current (1.84 pA) in a fully depleted equilibrium. Quantum confinement in thin β-Ga2O3 layers enhances UV detection (down to 210 nm) by widening the band gap. Compared with bulk materials, dimensionally constrained optical absorption reduces electron-phonon interactions and phonon scattering, leading to faster optical responses. Decreasing β-Ga2O3 channel thickness reduces VT and VG, enhancing power efficiency, dark current, and the photo-to-dark current ratio under dark and illuminated conditions. These results can guide the fabrication of tailored Ga2O3-based DUV phototransistors.

(Invited) Breakdown Improvement of Mg-Diffused Current Blocking Layer in Ga2O3

The path towards an all-planar highly efficient vertical Ga2O3 transistor requires the construction of a buried gate barrier junction to circumvent the pre-mature breakdown near the gate often seen in lateral structures. An effective selective doping technique is necessary to achieve this. By taking advantage of the high diffusivity of dopants and defects in Ga2O3, we propose the use of diffusion doping as a rapid and non-invasive technique to explore the possibility of an effective current blocking layer (CBL) in vertical Ga2O3 transistors. Unlike ion implantation, diffusion doping does not require an 1100°C annealing for the repair of crystal damage. Thus, the desired Mg doping profile can be maintained by the end of device fabrication, which is the key to achieving a high blocking voltage with Mg-doped CBL. In addition, diffusion doping can easily form a much deeper dope junction and be very useful for high-voltage and super-junction devices.Recently, we have demonstrated the first Ga2O3 vertical-diffused-barrier field-effect transistor (or VDBFET) utilizing a Mg-diffusion doped CBL with a spin-on-glass source. The transistor exhibited excellent FET behavior with decent saturation, enhancement-mode operation, and an on/off ratio of more than 109. However, the breakdown voltage is measured to be only 72V most likely due to the punch-through of the Mg-diffused CBL. This is likely caused by a lower-than-expected Mg doping rendering an inefficient electron blocking. In addition, SIMS analysis indicated the existence of Mg-H complex that deactivated the Mg. Thus, the effective Mg doping is even lower than its chemical concentration. Here we will discuss a new strategy to resolve this problem and showcase the characteristics of the improved CBL with a higher breakdown. This development paves the way for the development of high-voltage Ga2O3 VDBFETs.

DC and RF performance analysis of enhancement mode fin-shaped tri-gate AlGaN/GaN HEMT and MOSHEMT with ultra-thin barrier layer

The DC and RF assessment of critical barrier-AlGaN/GaN nano channel tri-gate fin-shaped High Electron Mobility Transistor (FinHEMT) is investigated for Enhancement-mode (E-mode) operation. We propose and analyze critical barrier layer (CBL) and critical-strained barrier layer (CSBL) FinHEMT for a fixed fin-shaped channel width (W fin = 160 nm) and height (H fin = 70 nm). The CBL FinHEMT ensures an E-mode operation by depleting two-dimensional electron gas (2DEG) near the channel region between AlGaN and GaN hetero-junction. The extracted threshold voltage (V T ) in CBL FinHEMT is 0.4 V as compared to −0.2 V obtained in CSBL FinHEMT. However, increased gate leakage current density and poor gate voltage swing in CBL FinHEMT is improved through a metal-oxide-semiconductor FinHEMT (FinMOSHEMT) structure by the incorporation of Al2O3 gate oxide layer between the tri-gate and CBL AlGaN layer. It results in a stable positive VT of 0.5 V due to the negatively charged Al2O3/barrier interface fixed charge density ( NAl2O3 ). The proposed CBL FinMOSHEMT has also been studied for different atomic layer deposition Al2O3 process-dependent variations in NAl2O3. The maximum on-state drain current and transconductance of 1.01 A mm−1 and 430 mS/mm have been extracted respectively with NAl2O3 of −9.2 × 1012 cm−2. Further, the RF analysis of the proposed CBL FinMOSHEMT structure with the same dimension exhibits improved f T and f max responses with 27 GHz and 90 GHz respectively over CBL FinHEMT. The results of the frequency responses obtained for the proposed design make it suitable for power electronics applications.

Charge trapping layer enabled high-performance E-mode GaN HEMTs and monolithic integration GaN inverters

In this work, high threshold voltage and breakdown voltage E-mode GaN HEMTs using an Al:HfOx-based charge trapping layer (CTL) are presented. The developed GaN HEMTs exhibit a wide threshold modulation range of ΔVTH ∼ 17.8 V, which enables the achievement of enhancement-mode (E-mode) operation after initialization process owing to the high charge storage capacity of the Al:HfOx layer. The E-mode GaN HEMTs exhibit a high positive VTH of 8.4 V, a high IDS,max of 466 mA/mm, a low RON of 10.49 Ω mm, and a high on/off ratio of ∼109. Moreover, the off-state breakdown voltage reaches up to 1100 V, which is primarily attributed to in situ O3 pretreatment effectively suppressing and blocking leakage current. Furthermore, thanks to the VTH of GaN HEMTs being tunable by initialization voltage using the proposed CTL scheme, we prove that the direct-coupled FET logic-integrated GaN inverters can operate under a variety of conditions (β = 10–40 and VDD = 3–15 V) with commendable output swing and noise margins. These results present a promising approach toward realizing the monolithic integration of GaN devices for power IC applications.

Enhanced stability in InSnO transistors via ultrathin in-situ AlOx passivation

In this study, we present the impact of an ultrathin in-situ AlOx passivation layer on the electrical performance and stability of InSnO (ITO) transistors. Devices incorporating an ultrathin (∼2 nm) AlOx passivation layer demonstrate satisfactory electrical performance and stability, characterized by a decent field-effect mobility, enhancement mode operation, notably reduced subthreshold swing, negligible hysteresis, and, notably, a significantly reduced threshold voltage shift under negative bias stress (NBS) and positive bias stress (PBS), respectively. The total trap density (Ntot), extracted through the sub-threshold slope, and the trap density (Nt), measured using low-frequency noise (LFN) for the AlOx-passivated ITO transistors, are significantly decreased. Those improvements can be attributed to the suppression of oxygen vacancy formation during the reactively-sputtered AlOx and subsequent annealing processes, as demonstrated by comparing the in-depth X-ray photoelectron spectroscopy (XPS) results of the AlOx-passivated and un-passivated ITO films. These results underscore the potential of in-situ reactively-sputtered ultrathin AlOx passivation layers to enhance the stability of thin-film transistors with In-rich channels.

Al‐Rich AlGaN Transistors with Regrown p‐AlGaN Gate Layers and Ohmic Contacts

AbstractEpitaxial regrowth processes are presented for achieving Al‐rich aluminum gallium nitride (AlGaN) high electron mobility transistor (HEMTs) with p‐type gates with large, positive threshold voltage for enhancement mode operation and low resistance Ohmic contacts. Utilizing a deep gate recess etch into the channel and an epitaxial regrown p‐AlGaN gate structure, an Al0.85Ga0.15N barrier/Al0.50Ga0.50N channel HEMT with a large positive threshold voltage (VTH = +3.5 V) and negligible gate leakage is demonstrated. Epitaxial regrowth of AlGaN avoids the use of gate insulators which can suffer from charge trapping effects observed in typical dielectric layers deposited on AlGaN. Low resistance Ohmic contacts (minimum specific contact resistance = 4 × 10−6 Ω cm2, average = 1.8 × 10−4 Ω cm2) are demonstrated in an Al0.85Ga0.15N barrier/Al0.68Ga0.32N channel HEMT by employing epitaxial regrowth of a heavily doped, n‐type, reverse compositionally graded epitaxial structure. The combination of low‐leakage, large positive threshold p‐gates and low resistance Ohmic contacts by the described regrowth processes provide a pathway to realizing high‐current, enhancement‐mode, Al‐rich AlGaN‐based ultra‐wide bandgap transistors.

Performance Improvement of In-Ga-Zn Oxide Thin-Film Transistors by Excimer Laser Annealing.

We applied excimer laser annealing (ELA) on indium-zinc oxide (IZO) and IZO/indium-gallium-zinc oxide (IGZO) heterojunction thin-film transistors (TFTs) to improve their electrical characteristics. The IZO and IZO/IGZO heterojunction thin films were prepared by the physical vapor deposition method without any other annealing process. The crystalline state and composition of the as-deposited film and the excimer-laser-annealed films were analyzed by X-ray diffraction and X-ray photoelectron spectroscopy. In order to further enhance the electrical performance of TFT, we constructed a dual-heterojunction TFT structure. The results showed that the field-effect mobility could be improved to 9.8 cm2/V·s. Surprisingly, the device also possessed good optical stability. The electron accumulation at the a-IZO/HfO, HfO/a-IGZO, and a-IGZO/gate insulator (GI) interfaces confirmed the a-IGZO-channel conduction. The dual-heterojunction TFT with IZO/HfO/a-IGZO-assisted ELA provides a guideline for overcoming the trade-off between high mobility (μ) and positive VTh control for stable enhancement mode operation with increased ID.

Barrier and channel thickness engineering to optimize fin height for enhancement mode Al0.3Ga0.7N/GaN FinHEMT

AbstractIn this work, a thorough analysis of the Al0.3Ga0.7N/GaN FinHEMT structure has been performed using three‐dimensional numerical simulations to achieve enhancement mode (E‐mode) operation. In the proposed optimized structure, the fin height (HFin) is comprised of 7 nm critical strained AlGaN barrier layer with 30% Al mole fraction and 63 nm GaN channel layer having a fixed fin width (WFin) of 160 nm. The two‐dimensional electron gas (2DEG) concentration near the hetero interface is found to vary inversely with HFin of the proposed structure. The 2DEG variation was compared between fin‐shaped full tri‐gate approach and variable side gate length tri‐gate design counterpart for a fixed HFin of 70 nm. We achieved an improved threshold voltage of −0.2 V in the optimized HFin structure as compared to −1.45 V obtained in the unoptimized structure as reported earlier. Further, upon decreasing WFin to 40 nm in the same structure having optimized HFin of 70 nm, an E‐mode operation was achieved with a positive threshold voltage of 0.4 V. The positive shift in threshold voltage is explained with the help of necessary energy band diagram.

Review-Extremely Thin Amorphous Indium Oxide Transistors.

Amorphous oxide semiconductor transistors have been a mature technology in display panels for upward of a decade, and have recently been considered as promising back-end-of-line compatible channel materials for monolithic 3D applications. However, achieving high-mobility amorphous semiconductor materials with comparable performance to traditional crystalline semiconductors has been a long-standing problem. Recently it has been found that greatly reducing the thickness of indium oxide, enabled by an atomic layer deposition (ALD) process, can tune its material properties to achieve high mobility, high drive current, high on/off ratio, and enhancement-mode operation at the same time, beyond the capabilities of conventional oxide semiconductor materials. In this work, the history leading to the re-emergence of indium oxide, its fundamental material properties, growth techniques with a focus on ALD, state-of-the-art indium oxide device research, and the bias stability of the devices are reviewed.

Demonstration of β-Ga2O3 nonvolatile flash memory for oxide electronics

This report demonstrates an ultrawide bandgap β-Ga2O3 flash memory for the first time. The flash memory device realized on heteroepitaxial β-Ga2O3 film had TiN as the floating gate (FG) and Al2O3 as tunneling and gate oxides. A memory window of > 4 V was obtained between the programmed and erased states of the device. The memory states showed negligible degradation in threshold voltage (VTH) even after 5000 s, exhibiting excellent nonvolatility. Furthermore, the device showed a VTH of ∼0.3 V after applying a 17 V programming voltage pulse, indicating the potential of the electron trapping phenomenon in the FG to achieve enhancement-mode operation in β-Ga2O3 transistors for high-power and logic applications. This study would provide insights for future oxide electronics integrating β-Ga2O3 memory.

Small signal and noise analysis of T-gate HEMT with polarization doped buffer for LNAs

Small signal behavior and RF noise performance of T-gate InAlN/GaN HEMT with polarization doped buffer (PDB-HEMT) have been examined in this paper and compared to conventional HEMTs at GHz frequency range. Enhancement mode operation is possible in the PDB-HEMT device, which has a recessed T-gate structure with a gate length of 10 nm and delivers the threshold voltage (Vth) of 0.9 V and a high transconductance of 1.55 S/mm. This study examines the auto/cross-correlation factor, minimum noise figure, reflection/transmission coefficients, noise conductance, and optimal noise resistance and reactance. The enhanced transconductance of PDB-HEMT has resulted in a considerable increase in the forward transmission coefficient and a decrease in the input/output reflection coefficient compared to traditional HEMTs. It has also been shown that the PDB- HEMT has a lower noise figure and noise conductance than the GaN buffer HEMT by 57% and 20%, respectively. This research demonstrates that the T-gate polarization doped buffer (PDB-HEMT) structure is an excellent choice for Low Noise Amplifiers (LNA) operating at higher frequencies.

Impact of doping concentration and recess depth to achieve enhancement mode operation in β-Ga2O3 MOSFET

High power switching applications necessitates the MOSFET to operate in Enhancement mode (normally OFF). Achieving enhancement mode operation in β-Ga2O3 MOSFET is challenging due to the difficulty in p-type doping. A TCAD simulation study is implemented to study the effect of the variation of doping concentration and recess gate to achieve enhancement mode operation. Subsequently, the device characteristics such as Id-Vd, Id-Vg and breakdown analysis are performed for β-Ga2O3 MOSFET with a channel thickness of 240 nm. On decreasing the doping concentration, the magnitude of threshold voltage reduces to 0V at a doping concentration of 1 × 1016 cm−3 causing enhancement mode operation but with significantly low drain current. However, this resulted in the increase in the device breakdown voltage. Adding Si3N4 passivation layer, further, enhanced the breakdown voltage. Subsequent study involved the impact of recessed gate to achieve enhancement mode operation. On increasing the recess depth, the magnitude of threshold voltage is reduced to 0V at a doping concentration of 8 × 1017 cm−3 with less impact on drain current. This also resulted in the increase in the device breakdown voltage. The obtained results will be instrumental for Ga2O3 community to develop and design enhancement mode β-Ga2O3 MOSFET for high power and high voltage applications.

Depletion- and Enhancement-Mode p-Channel MISHFET Based on GaN/AlGaN Single Heterostructures on Sapphire Substrates

We report on p-channel metal-insulator-semiconductor heterostructure field-effect transistors (MISHFET) based on p-GaN/uid-GaN/Al0.29Ga0.71N single heterostructures on sapphire substrates, grown by metalorganic vapor phase epitaxy (MOVPE). The impact of p-GaN layer removal and channel layer thickness adjustment by dry-etching on the characteristics of the MISHFET are investigated. Depending on the remaining GaN thickness (tGaN), the fabricated MISHFET show either depletion-mode (d-mode) operation with a threshold voltage Vth of 3.8 V and an on-current |ID,on| of 9.5 mA/mm (tGaN = 21 nm) or enhancement-mode (e-mode) operation with Vth of -2.3 V and |ID,on| of 1.5 mA/mm (tGaN = 12 nm). Independent of the etching depth, all devices exhibit a very low off-state drain current |ID,off| 10-8 mA/mm and a steep subthreshold swing (SS) between 80 and 89 mV/dec. Similar to n-channel devices, a Vth instability caused by charge trapping at the dielectric/semiconductor interface is found, emphasizing that careful interface engineering is required for good device performance.

GaN/AlGaN Superlattice Based E-Mode Hole Channel FinFET With Schottky Gate

In this work, we report on a GaN/AlGaN superlattice based normally-off hole channel FinFET devices. A combination of Schottky gate and 60 nm wide fins led to enhancement mode operation. The device had an on-current of 13 mA/mm and an on-resistance of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$300~\Omega $ </tex-math></inline-formula> .mm. simultaneously, a large Ion/Ioff > 107 and a current modulation of more than two orders of magnitude in the enhancement mode regime was also achieved.

Stable enhancement-mode operation in GaN transistor based on LiNiO junction tri-gate

In this work, we demonstrate p-type lithium nickel oxide (LiNiO) as a heterojunction gate combined with tri-gate structures to achieve stable enhancement-mode (e-mode) AlGaN/GaN high-electron-mobility transistors. The low deposition temperature (400 °C) and high-quality LiNiO coated by pulsed-laser-deposition over tri-gate structures resulted in enhancement-mode devices without the need for special epitaxial layers, barrier recess, or barrier regrowth. The LiNiO heterojunction tri-gate devices presented a positive VTH of 0.7 V (at 1 μA/mm), a low on-resistance of 8 Ω· mm, a large maximum on-current of 390 mA/mm, a high breakdown voltage of 1270 V, and excellent reliability simultaneously.

(Invited) Rare Earth Oxides on Wide Band Gap Semiconductors

Globally, most recent power electronics converter and device technology has been driven by the unprecedented demand seen within the automotive sector [1]. The latter demands power converters with near 100% energy efficiency, lightweight, compact and reliable. Wide band gap (WBG) semiconductor materials such as GaN and 4H-SiC have emerged as contenders to replace Si in many power electronics applications. Currently, GaN devices based on the high electron mobility transistor (HEMT) architecture are limited commercially to a maximum of 650 V [2,3]. GaN HEMTs have traditionally suffered from a poor thermal conductivity and the “current collapse” phenomenon, limiting their ability to operate within harsh environments. On the other hand, 4H-SiC has a few reliability issues that limit its ubiquitous application in the automotive sector [2]. Currently the GaN based Metal-Insulator-Semiconductor (MIS)-HEMT device is seen to demonstrate superior performance in power electronics applications over the Schottky gate counterpart, due to its inherently lower gate leakage current, together with the ability to provide larger forward gate voltage swing by engineering the threshold voltage between depletion and enhancement mode operation and also an improved gate-drain breakdown voltage. High band gap gate dielectric materials are preferable as they can provide higher tunnelling barriers for electrons and holes, which result in lower gate leakage current. Furthermore, high dielectric constant (high-k) material is also necessary for improved electrostatic control over the channel and improved on-current, which in-turn results in higher transconductance. In terms of SiC based devices, the use of SiO2 proves to be a bottleneck in exploiting full potential of SiC due to the low value of dielectric constant of SiO2 [4]. Since the oxide is subjected to an electric field that is ~2.5x the field in the semiconductor, the breakdown of SiO2 occurs first, and hence causes the breakdown of SiO2/4H-SiC based devices well below the critical electric field of SiC. This shortcoming led to the exploration of high-k dielectrics as gate stacks in 4H-SiC MIS based devices as well as for surface passivation. It is worth noting that SiO2 is the only dielectric commercially used for SiC devices largely due to the unavailability of a reliable high-k dielectric alternative. Most published results focus on use of Al2O3 and HfO2 films [5], however they have yet to become used mainstream in 4H-SiC devices.In this paper, two rare earth high-k oxides, Y2O3 and Sc2O3, both with dielectric constant >10, have been studied in terms of their suitability as gate dielectrics on GaN and 4H-SiC. The oxide films were prepared by radio frequency (RF) magnetron sputtering (Sc2O3) and ion gun sputtering (Y2O3). The substrates were cleaned with Kr ions with anode current of ~ 50 mA and accelerating voltage of 3 kV for 1-2 hours. Then metallic Y was sputtered using pressure of 1.5 x 10-5 mbar and current of 26 mA, which was followed by exposure to O2 to form Y2O3 films. Sc2O3 films were deposited using Moorfields nano-PVD (physical vapour deposition) equipment with circular Sc2O3 target of 99.99% purity using RF power of 60 W and a gas flow of 0.5 sccm for 3 nm film and 3 sccm for 40 nm film. The films were also deposited simultaneously on Si to be used as reference samples for variable angle spectroscopic ellipsometry (VASE) measurements to ascertain their thickness and optical properties. The X-ray photoelectron spectroscopy (XPS) was used to characterise comprehensively the oxide/semiconductor interface. The capacitance voltage measurements on MIS stacks were used to determine permittivity of deposited oxides. The complete band alignment of oxide/WBG semiconductor as well as comprehensive comparison to state of the art data will be presented and discussed in full paper. Acknowledgement. The UKIERI IND/CONT/G/17-18/18 and F.No.184-1/2018(IC) project funded by the British Council; UKRI GCRF GIAA award 2018/19 and EP/P510981/1, funded by the EPSRC, UK. References. [1] http://www.yole.fr/Compound_Semiconductor_Monitor_Q1.aspx. [2] Li et al., Materials 14, 5831 (2021); [3] Gonzalez et al. IEEE Trans. Ind. Electron. 67, 7375 (2020); [4] A. Siddiqui et al., J. Mater. Chem. C 9, 5055 (2021); [5] Bencherif et al., Appl. Phys. A 126, 854 (2020).