In this paper, the electrochemical etching process is used for surface modification of the p-Si wafer, named as porous silicon (PS), in the metal–semiconductor (MS) type Schottky diode (SD) with a structure of Al/p-Si. Five regions of PS wafer with different etching rates are selected for comparison of them which are called P2, P3, P4, and P5 (P1 is the reference area without porosity). The morphological, structural, and electrical properties of the PS used in the MS-type SD are investigated using field-emission scanning electron microscope (FE-SEM) images, energy dispersive X-ray (EDX) analysis, and current–voltage (I–V) characteristics, respectively. The FE-SEM images show a meaningful effect on the porosity. The EDX spectrum demonstrates the importance of the chemical effects in addition to the physical changes in the porosity process of the p-Si wafer. The reverse-saturation current (I0), ideality factor (n), barrier height at zero-bias (ΦB0), and series/shunt electrical resistances are also computed and compared. Some of these parameters (n, Rs, BH) are determined using different methods, namely Thermionic emission (TE), Cheung functions, and modified Norde, and they exhibit strong agreement with each other. The energy-dependent profiles of surface states (Nss) are estimated from the I–V data by considering the voltage dependence of ΦB (V) and n(V). All the experimental findings indicate that the etching process of the p-Si wafer significantly influences the electrical performance of the Al/p-Si Schottky diode by increasing the extent of etching.
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