Effects Of Electrical Stress Research Articles

Effects of electrical bias and temperature stress on the negative magnetoresistance of a low-k dielectric

A study of the effect of electrical bias and temperature stress (BTS) on the negative magnetoresistance (MR) of a low-k dielectric composed of SiCOH is presented. The magnitude of the structure's MR decreases with increased time on BTS. There is a correlation between the stress condition and the rate of MR decrease. The voltage and temperature dependencies of the MR decay resemble the dependencies observed for Time Dependent Dielectric Breakdown (TDDB) studies, suggesting that this MR response to BTS could be related to breakdown mechanisms and prove useful for studying the TDDB behavior of these materials. Possible mechanisms that could lead to such a decay in MR when subjected to BTS are discussed.

Effects of Electrical Stress on the InGaP/GaAs Heterojunction Phototransistor

Although the effects of electrical stress on the performance of InGaP/GaAs heterojunction bipolar transistors (HBTs) have been widely studied and reported, few or no reports on the InGaP/GaAs heterojunction phototransistors (HPTs) have been published. In this paper, we discuss the phototransistor characteristics before and after the electrical stress applied at room temperature and at high temperature, and assess the effectiveness of the emitter-ledge passivation, which was found to keep the InGaP/GaAs HBTs from degrading at higher temperature or due to electrical stress. A room-temperature electrical stress was applied to the HPTs by maintaining a current density of 37 A/cm2 for 1 h at room temperature. The electrical stress was lower by two to three orders than the stress usually applied to the HBTs for the stress study and did not cause significant decreases in the room-temperature current gain and photoresponse, but it significantly degraded the characteristics of the InGaP/GaAs HPTs at 420 K. In order to accelerate the degradation, the high-temperature stress was applied to both HPTs with and without the emitter-ledge passivation at 420 K. Although the current density was the same and the stress time was reduced to 15 min, the high-temperature stress significantly decreased the current gain and collector photocurrent of the HPT without the emitter-ledge passivation over the entire measurement temperature range of 300–420 K. The emitter-ledge passivation suppresses the recombination via defects at the emitter perimeter and is found to be more effective than that in the HBTs.

Impact of bias conditions on electrical stress and ionizing radiation effects in Si-based TFETs

The interplay between electrical stress and ionizing radiation effects is experimentally investigated in Si-based Tunnel Field Effect Transistors (TFETs). In particular, the impact of bias conditions on the performance degradation is discussed. We found that the electrical stress effects in TFETs could not be ignored in radiation tests, since they can possibly overwhelm the radiation-induced degradation. Under this circumstance, the worst-case bias condition for studying radiation effects is not straightforward to be determined when there is an interplay between electrical stress and ionizing radiation effects.

Capacitance Evolution of Photovoltaic Solar Modules Under the Influence of Electrical Stress

The main purpose of this work was to study the effect of electric currents reverse stress on the capacitance and in general the performance of photovoltaic modules.Different levels of reverse stress current are injected into the solar cell structure and the C-V characteristic are measured in the dark and illuminated conditions, at room temperature for several common periods of time. A digital double exponential model was used to analyze the experimental measurements.The dramatic changes in capacitance characteristics are caused from the effect of a reverse current introduced for different stress levels, simulated the effect of accumulated extreme reverse currents that can occur in the solar cells and modules for different reasons.The paper contributes to research on the adverse effects of reverse currents on the capacitance and normal functioning of cells and solar modules.

Effects of Electrical Stress and High-Energy Electron Irradiation on the InGaP/GaAs Heterojunction Phototransistor

ABSTRACTIn this paper, we discuss the characteristics of the InGaP/GaAs heterojunction phototransistors (HPTs) before and after the electrical stress at room temperature and assess the effectiveness of the emitter-ledge passivation. Although an electrical stress given to the phototransistors by keeping a collector current density of 37 A/cm2 for 1 hour at room temperature was too small to affect the room-temperature common-emitter current gain and photocurrent of both HPTs with and without the emitter-ledge passivation, they showed a significant decrease at 420 K due to the room-temperature electrical stress. Nevertheless, the room-temperature common-emitter current gain and photocurrent of the HPT with the emitter-ledge passivation were still higher than those of the HPT without the emitter-ledge passivation. The effectiveness of the emitter-ledge passivation against the electrical stress was more significant than that on the current gain in the dark. In addition to the electrical stress experiment, for a potential application of the InGaP/GaAs HPTs in space, we will irradiate the HPTs with 1-MeV electrons at the Japan Atomic Energy Agency. Both current gain and photocurrent decreased significantly after the electron irradiation. In contrast to the electrical stress, the damage due to the high-energy electron irradiation is a bulk-related phenomenon, and the emitter-ledge passivation does not seem to suppress the degradation.

Effect of electrical stress on Au/Pb (Zr0.52Ti0.48) O3/TiOxNy/Si gate stack for reliability analysis of ferroelectric field effect transistors

Metal-Ferroelectric-Insulator-Semiconductor (MFIS) structure with 20 nm thin lead zirconate titanate (PZT) ferroelectric film and 6 nm ultrathin high-κ titanium oxynitride (TiOxNy) insulator layer on p-Si substrate were fabricated. Effect of constant voltage stress (CVS) on electrical characteristics of MFIS structure was investigated to study the reliability of fabricated devices. The experimental results showed trivial variation in memory window (ΔW) from 1.05 to 1 V under CVS of 0 to 15 V (5.76 MV/cm) at sweep voltage of ±5 V. Also, leakage current density (J) reduced from 5.57 to 1.94 μA/cm2 under CVS of 5.76 MV/cm, supported by energy band diagram. It signifies highly reliable TiOxNy buffer layer for Ferroelectric Random Access Memory. After programming at ±5 V, the high (CH) and low (CL) capacitances reliability remains distinguishable for 5000 s even if we extrapolate measured data to 15 years. Microstructures analysis of XRD reveals the formation of (100) and (111) orientation of PZT and TiOxNy, respectively. Thus, Au/PZT/TiOxNy/Si, MFIS gate stacks can be potential candidate for next generation reliable Ferroelectric Field Effect Transistors.

Impulsive force phenomenon of electric field stress causing serious particle contamination in plasma etching equipment

To demonstrate electric field stress acting as an impulsive force, the action of the stress is investigated using a standard particle. Particles floated from a substrate owing to electric field stress are observed using an in situ particle monitoring system. The results indicate that the more rapidly an electric field changes, the more the stress increases, which demonstrates the impulsive force effect of electric field stress. From the results of this study, we can conclude that the cause of the instantaneous generation of many flaked particles in plasma etching chambers is electric field stress working as an impulsive force.

Subcritical Crack Growth in Unpoled and Poled PZT Ceramics under Applied Static and Oscillating Electric Fields. I. Experimental Observation

The effects of both electric field and mechanical stress on the subcritical crack growth (SCG) behavior of lead zirconate titanate (PZT) ceramics are investigated. In Part I, the growth of indented crack in unpoled and poled soft PZT ceramics subjected to different static and oscillating electric fields is studied. The experimental results indicated a faster crack growth rate initially followed by a slower growth rate with time. The SCG behaviors along directions perpendicular and parallel to the applied electric fields are different and depend on the field intensity, field polarity, frequency, and wave-form of the applied oscillating fields. It is suggested that the crack driving forces for the SCG behavior in PZT ceramics are due to the residual stress from indentation and the application of the electric field.

Implementation of Fully Self-Aligned Homojunction Double-Gate a-IGZO TFTs

A simple method of fabricating fully self-aligned double-gate (SADG) homojunction a-IGZO TFTs is proposed and experimentally demonstrated for the first time. The self-alignment between the bottom- and top-gates is realized with one backside-illuminated photolithographic step; and that between the source/drain regions and the two gates is formed by both argon plasma treatment and hydrogen doping. The resulting overlap between the gate and source/drain regions is about 0.3 μm. Excellent symmetry between bidirectional transfer characteristics in the fabricated SADG TFTs is observed. Moreover, the dynamic threshold voltage operation is well demonstrated, and the driving capability, electrical stress effects under tied and separate gate biases are investigated.

Electrical Stress Effect on On-Current of MILC Poly-Si Thin-Film Transistors

In this study, we studied the effect of the electrical stress on the on-current of metal-induced laterally crystallized poly-Si TFTs. It was found that the electrical performance of polycrystalline silicon thin-film transistors (TFTs) is greatly affected by the electrical stress. Under the electrical stress condition, the drain current increases due to hot-electron trap at the drain junction. The computer simulation revealed the fact that the improvement mechanism can be reproduced by effective channel length shortening. It turns out that analysis of the capacitance and output characteristics supports this model.

Experimental Investigations into the Effects of Electrical Stress on Electromagnetic Emission from Integrated Circuits

Recent studies have shown that the aging of integrated circuits may modify electromagnetic emission significantly. This paper reports on an experiment to elucidate the origins of emission level changes in a test chip using 90-nm CMOS technology. Circuit analysis, combined with electromagnetic emission and on-chip power supply voltage bounce measurements made during the application of electric stress, have identified the role of intrinsic wear-out mechanisms, which contribute to a progressive change in the transient current produced by the circuit.

Effect of External Electric Field Stress on Gliadin Protein Conformation.

A molecular dynamic (MD) modeling approach was applied to evaluate the effect of external electric field on gliadin protein structure and surface properties. Static electric field strengths of 0.001 V/nm and 0.002 V/nm induced conformational changes in the protein but had no significant effect on its surface properties. The study of hydrogen bond evolution during the course of simulation revealed that the root mean square deviation, radius of gyration and secondary structure formation, all depend significantly on the number hydrogen bonds formed. This study demonstrated that it is necessary to gain insight into protein dynamics under external electric field stress, in order to develop the novel food processing techniques that can be potentially used to reduce or eradicate food allergens.

Charge trapping and electrical degradation in atomic layer deposited Al2O3 films

In this work, we focus on the effects of electrical stress on the charge trapping behavior and electrical degradation of Al2O3 layers deposited by ALD. For this purpose, current–voltage (I–V) and capacitance–voltage (C–V) characteristics of Al/Al2O3/n+Si capacitors are analyzed before and after constant voltage stress (CVS). The results show that electron trapping and hard breakdown (HBD) phenomena are the main degradation mechanisms observed under positive bias stress (or substrate injection). While, the generation of positive charge and new defects as well as the occurrence of soft breakdown (SBD) and progressive breakdown (PBD) failure modes, are identified as the dominant contributions when a highly enough negative bias (or gate injection) stress is applied.

Electrical and flammability properties of alumina trihydrate filled polypropylene/ethylene propylene diene monomer composites as insulators in cable applications

Polymeric insulators role in power systems and insulation is one of the most important subjects in high voltage applications. This study investigates the effect of alumina trihydrate (ATH) loading on electrical and flammability properties of polypropylene (PP)/ethylene propylene diene monomer (EPDM) blend. ATH fillers were incorporated into the matrix to improve the tracking and flammability resistance of the composites. PP/EPDM (60:40) was used as matrix and compounding of ATH filled PP/EPDM composites was done using a twin-screw extruder. Electrical and flammability tests of composites were performed. The results show that flammability decreased with increasing ATH loading in PP/EPDM composites. The effects of electrical stresses are investigated by measuring the carbon tracking (CT) and leakage current (LC) on the surface of composites. The CT and LC of PP/EPDM/ATH composites were found to decrease with increasing ATH content; however calculating the normalized degradation index (NDI) illustrated that all the sample were in accepted range. Field emission scanning electron microscope was used to relate the electrical properties with the morphological analysis, which showed that addition of ATH prevents the degradation of the matrix. POLYM. ENG. SCI., 54:493–498, 2014. © 2013 Society of Plastics Engineers

Mild electrical stimulation with heat stimulation increase heat shock protein 70 in articular chondrocyte

The objective of this study is to investigate the effects of mild electrical stimulation (MES) and heat stress (HS) on heat shock protein 70 (HSP70), that protects chondrocytes and enhances cartilage matrix metabolism, in chondrocyte and articular cartilage. Rabbit articular chondrocytes were treated with MES and/or HS. The safeness was assessed by LDH assay and morphology. HSP70 protein, ubiquitinated proteins and HSP70 mRNA were examined by Western blotting and real-time PCR. Rat knee joints were treated with MES and/or HS. HSP70 protein, ubiquitinated proteins, HSP70 mRNA and proteoglycan core protein (PG) mRNA in articular cartilage were investigated. In vitro, HS increased HSP70 mRNA and HSP70 protein. MES augmented ubiquitinated protein and HSP70 protein, but not HSP70 mRNA. MES + HS raised HSP70 mRNA and ubiquitinated protein, and significantly increased HSP70 protein. In vivo, HS and MES + HS treatment augmented HSP70 mRNA. HS modestly augmented HSP70 protein. MES + HS significantly increased HSP70 protein and ubiquitinated proteins. PG mRNA was markedly raised by MES + HS. This study demonstrated that MES, in combination with HS, increases HSP70 protein in chondrocytes and articular cartilage, and promotes cartilage matrix metabolism in articular cartilage. MES in combination with HS can be a novel physical therapy for osteoarthritis by inducing HSP70 in articular cartilage.

Collaborative effects of electric field and fluid shear stress on fibroblast migration

Cells are inherently exposed to a number of different biophysical stimuli such as electric fields, shear stress, and tensile or compressive stress from the extracellular environment in vivo. Each of these biophysical cues can work simultaneously or independently to regulate cellular functions and tissue integrity in both physiological and pathological conditions. Thus, it is vital to understand the interaction of multiple stimuli on cells by decoupling and coupling the stimuli in simple combinations and by investigating cellular behaviors in response to these cues. Here, we report a novel microfluidic platform to apply the combinatorial stimulation of an electric field and fluid shear stress by controlling two directional cues independently. An integrated microfluidic platform was developed using soft lithography to monitor the cellular migration in real-time in response to an electric field and fluid shear stress in single, simultaneous, and sequential modes. When each of these stimulations is applied separately, normal human dermal fibroblasts migrate toward the anode and in the direction of fluid flow in a dose-dependent manner. Simultaneous stimulation with an electric field and shear stress, which mimics a wound in vivo, enhances the directional migration of fibroblasts by increasing both directedness and trajectory speed, suggesting the plausible scenario of cooperation between two physical cues to promote wound healing. When an electric field and shear stress are applied sequentially, migration behavior is affected by the applied stimulation as well as pre-existing stimulating conditions. This microfluidic platform can be utilized to understand other microenvironments such as embryogenesis, angiogenesis and tumor metastasis.

Experimental Investigation of Electro-thermal Stress Impact on SiC-BJTs Electrical Characteristics

The aim of this study consists in investigating the effects of electrical and thermal stresses on SiC n-p-n bipolar junction transistors (BJTs). The stability of the electrical characteristics of BJTs is inspected under switching operation, DC operation, temperature cycling and continuous thermal stress up to 225°C. While switching operation and temperature cycling for several hours lead to significant changes at 25°C, the electrical characteristics were little degraded at high temperature. Besides, DC operation and continuous thermal stress did not result in significant degradation at all, both at room temperature and at high temperature.

Effect of electrical and mechanical stresses of low temperature a-Si:H thin film transistors fabricated on polyimide and glass substrates

Hydrogenated amorphous silicon thin film transistors (TFTs) were fabricated by plasma enhanced chemical vapor deposition on both transparent polyimide and glass substrate. The electrical characteristics and surface morphology of a-Si:H/SiNx:H films on polyimide and glass substrate were compared. TFTs fabricated on polyimide substrate show better electrical performance than on glass substrate. Moreover, the threshold voltage shift of TFTs on polyimide substrate is smaller than those TFTs on glass. The similar trend is also found either under electrical stress or 0.2% mechanical strain. The superior electrical characteristics of TFTs on polyimide substrate than that on glass substrate were attributed to the better surface morphology of a-Si:H/SiNx:H film on polyimide.

Effects of substrate strain and electrical stress on lattice dynamics, defects, and traps in strained-Si/Si0.81Ge0.19 n-type metal-oxide-semiconductor field effect transistors

Defects and traps in strained-Si n-type metal-oxide-semiconductor field effect transistors (MOSFETs) are studied in detail. The inelastic electron tunneling spectroscopy (IETS) technique is shown to be capable of probing traps in ultrathin gate dielectrics and obtain the energies and spatial locations of the traps. Detailed analyses of electrical stress-induced build-up of traps and electrically active bonding defects and identification of the trap-features including trap-assisted conduction and charge-trapping have been performed. The location and energies of the traps are estimated from the IETS spectra measured at both bias polarities. Identification of the acoustic and optical phonon modes (inelastic) as well as trap-features (elastic) helps in better understandings of the complex transport-mechanisms in gate dielectrics on strained layers.

Performance of organic field effect transistors with high-k gate oxide after application of consecutive bias stress

We report the effect of consecutive electrical stress on the performance of organic field effect transistors (OFETs). Sputtered aluminum oxide (Al2O3) and hafnium oxide (HfO2) were used as gate oxide layers. After the electrical stress, the threshold voltage, which strongly depends on bulk defects, was remarkably shifted to the negative direction, while the other performance characteristics of OFETs such as on-current, transconductance and mobility, which are sensitive to interface defects, were slightly decreased. This result implies that the defects in the bulk layer are significantly affected compared to the defects in the interface layer. Thus, it is important to control the defects in the pentacene bulk layer in order to maintain the good reliabilities of pentacene devices. Those defects in HfO2 gate oxide devices were larger compared to those in Al2O3 gate oxide devices.