Effects of substrate strain and electrical stress on lattice dynamics, defects, and traps in strained-Si/Si0.81Ge0.19 n-type metal-oxide-semiconductor field effect transistors

Abstract

Defects and traps in strained-Si n-type metal-oxide-semiconductor field effect transistors (MOSFETs) are studied in detail. The inelastic electron tunneling spectroscopy (IETS) technique is shown to be capable of probing traps in ultrathin gate dielectrics and obtain the energies and spatial locations of the traps. Detailed analyses of electrical stress-induced build-up of traps and electrically active bonding defects and identification of the trap-features including trap-assisted conduction and charge-trapping have been performed. The location and energies of the traps are estimated from the IETS spectra measured at both bias polarities. Identification of the acoustic and optical phonon modes (inelastic) as well as trap-features (elastic) helps in better understandings of the complex transport-mechanisms in gate dielectrics on strained layers.