Parasitic Resistance Effects Research Articles

Effect of Doping Density and Parasitic Resistances on The Performance of Perovskite Solar Cells-based Graphene Oxide as Hole Transport Layer by SCAPS-1D

Perovskite solar cells (PSCs) have demonstrated remarkable improvement and promise to be produced as large-scale, low-cost devices. Several resistive losses, such as the loss current, the trapping, and the recombination of charge carriers, significantly inhibited the performance of PSCs. Typically, the series resistance (RS) and shunt resistance (RSH) of the devices influence these kinds of losses. In this study, we conduct a simulation analysis to investigate the effect of doping density and parasitic resistances (RS and RSH) on the performance of PSCs-based graphene oxide (GO) as a hole transport layer (HTL) using the SCAPS-1D. The doping density variations in HTL demonstrate improved power conversion efficiency (PCE) and fill factor (FF) as the doping density increases. Both RS and RSH significantly affect the PSC performance, as they control the shape and slopes of the current density (J-V) characteristic. The optimization method produced impressive results, including an open-circuit voltage of 0.94 V, a short-circuit current density of 22.51 mA.cm−2, a fill factor of 78.92%, and a power conversion efficiency of 16.75%. This study leads to a basic understanding of the physics of PSC devices. The proposed design provides a systematic analysis method for photovoltaic science and technology.

Plasmonic Crystals for Terahertz Detection, Amplification, and Generation

TeraFET arrays operating in plasmonic regimes could support the transition from 5G to 6G communication if the constituent TeraFETs operate in synchrony. Such arrays are plasmonic crystals supporting Bloch-like waves of electron density oscillations. The key issues are breaking symmetry and maintaining appropriate boundary conditions between the unit cells. The symmetry must be broken to choose the response polarity to detect the direction of the plasmonic instability growth for generating THz oscillations. The coherence of plasma waves propagating in individual cells of the plasmonic crystal results in continuous waves in the entire structure. Using the narrow stripes at the unit cell edges (called plasmonic stubs) could maintain such coherence. Another advantage of TeraFET arrays is the reduced effects of parasitic contact resistance. This advantage is even more pronounced in ring plasmonic structures used for converting THz radiation into a magnetic field (giant inverse Faraday effect).

Approaching the Intrinsic Limits of Short Channel Vertical Organic Electrochemical Transistors.

Vertical architectures for organic electrochemical transistors (OECTs), due to their submicrometer channel lengths, have presented themselves as a straightforward design approach for achieving high gm/τ ratios, a figure of merit that assesses the performance of the devices by virtue of their transconductance (gm = dID/dVGS) and switching time constant (τ). However, as the practical limitations of the geometries are overcome, the influence of parasitic phenomena becomes more dominant and limits the performance of the device. One approach to reduce the detrimental effects of parasitic resistance in the drain-source circuit is to use a four-point sourcing technique. Here, vertical OECTs are fabricated with four-point structures to approach the intrinsic limit of these devices. It is shown that this approach improves the saturation behavior of the devices, closing the gap between measured gm and intrinsic transconductance gmi at their peak values. Overall, the results discussed here provide insight into the effects of parasitic resistance on OECTs, which in contrast to field-effect transistors, are not as extensively documented.

Empirical design and comprehensive analysis of multiport converter in distributed generation enabled microgrids

Distributed generation-enabled microgrids are a revolutionary approach for the energy paradigms that will transform the ways of generation, distribution, and utilization. A decentralized approach to energy generation in microgrids results in the robustness and independence of energy networks. Empowerment of the communities to take control of energy requirements with multiport converter-based microgrids promotes sustainability, efficiency, reduced losses, and increased resilience against the evolving trends of the energy sector. In this research, a hybrid energy-integrated multiport converter is designed and analyzed under its various modes of operation. Rapid transitions from one energy source to another are attained within 0.4μs to feed the load at a steady state voltage of 400 V, and within 0.15μs to charge the energy storage system at a steady state voltage of 48 V which indicates the robustness and independence of energy systems via this proposed approach. The resilience of the microgrid is obtained because of this rapid trans Moreover, the proposed converter offers a voltage gain of 8.3 with 96 % efficiency making it sustainable for maximization of renewable energy. In addition, the resilience of the proposed converter is exhibited through high power densities at power losses of not more than 7.5 % making it an innovative candidate for hybrid energy systems as compared to existing technologies. Simulation scenarios are validated through mathematical analysis, proving their effectiveness in distributed generation-enabled microgrids. The proposed research model is effective in a real environment because of the minimal effects of parasitic resistance, reduced total harmonic distortion under different loads, and negligible electromagnetic interferences, demonstrated through simulations.

Effects of parasitic gate capacitance and gate resistance on radiofrequency performance in LG = 0.15 μm GaN high‐electron‐mobility transistors for X‐band applications

AbstractThe effects of the parasitic gate capacitance and gate resistance (Rg) on the radiofrequency (RF) performance are investigated in LG = 0.15 μm GaN high‐electron‐mobility transistors with T‐gate head size ranging from 0.83 to 1.08 μm. When the device characteristics are compared, the difference in DC characteristics is negligible. The RF performance in terms of the current‐gain cut‐off frequency (fT) and maximum oscillation frequency (fmax) substantially depend on the T‐gate head size. For clarifying the T‐gate head size dependence, small‐signal modeling is conducted to extract the parasitic gate capacitance and Rg. When the T‐gate head size is reduced from 1.08 to 0.83 μm, Rg increases by 82%, while fT and fmax improve by 27% and 26%, respectively, because the parasitic gate–source and gate–drain capacitances reduce by 19% and 43%, respectively. Therefore, minimizing the parasitic gate capacitance is more effective that reducing Rg in our transistor design and fabrication, leading to improved RF performance when reducing the T‐gate head size.

Exploration of underlap induced high-k spacer with gate stack on strain channel cylindrical nanowire FET for enriched performance

This research explores a comprehensive examination of gate underlap incorporated strained channel Cylindrical Gate All Around Nanowire FET having enriched performances above the requirement of the 2 nm technology node of IRDS 2025. The device installs a combination of strain engineering based quantum well barrier system in the channel region with high-k spacers sandwiching the device underlaps and stack high-k gate-oxide. The underlaps are prone to parasitic resistance and various short channel effects (SCEs) hence, are sandwiched by HfO2 based high-k. This SCE degradations and a strong electric field in the drain-channel region is rendered controlling the leakages. The strain based Nanosystem engineering is incorporated with Type-II heterostructure band alignment inducing quantum well barrier mechanism in the ultra-thin cylindrical channel region creating an electrostatic charge centroid leading to energy band bending and splitting among the two-fold and four-fold valleys of the strained Silicon layer. This provides stupendous electron mobility instigating high current density and electron velocity in the channel. Thereby, the device is susceptible to on-current enhancement via ballistic transport of carriers and carrier confinement via succumbing of quantum charge carriers. The device transconductance, Ion, Ioff, Ion/Ioff ratio are measured and the output performance (ID-VDS) characteristics is determined providing emphatic enrichments in contrast to the existing gate all-around FETs as well as the 2 nm technology node data of IRDS 2025. Hence, the strained channel Nanowire FET device developed here is presented here as the device of the future for various digital applications, RF applications and faster switching speed.

Photovoltaic limitations of FAPbI3 nanocrystal solar cells associated with ligand washing processes

The processing of perovskite nanocrystals (PNCs) solar cells (SCs) usually incorporates ligand washing (LW) procedures. We show that a LW step of FAI in EtAc assists in the removal of the oleic acid/oleylamine ligands and improves the JSC and FF values of FAPbI3 based SCs. Although by increasing the exposure time of EtAc the removal of oleic acid/oleylamine ligands is more effective, sintering/necking of the FAPbI3 results to NC agglomerations and formation of defects/traps are observed within the active layer by the reported photoluminescence studies. Despite identifying the balanced in LW procedure exposure time, limitations on the performance of FAPbI3 PNCs SCs are reported. To identify the photovoltaic limitations impedance spectroscopy studies are presented and show that in the case of FAPbI3 PNC SCs an intermediate frequency response manifests. The observed impedance spectroscopy intermediate frequency response correlates with a parasitic resistance effect, indicating charge transport limitations and charge recombination losses even after the applied LW processing procedure.

Flavonoid from Hedera helix fruits: A promising new natural sensitizer for DSSCs

Owing to their lower cost, simplicity of manufacture, environmental friendliness, and accessibility of raw materials, natural dyes emerge as the most viable substitute for dye-sensitized solar cells (DSSCs). However, the photovoltaic performance of DSSCs based on natural dyes stays behind that of their metal-based counterparts. This can be partially overcome when appropriate chemical additives are present in the redox electrolyte employed in DSSCs based on natural dyes. To determine the ideal additives for DSSCs based on natural dye extracted from Hedera helix fruits, including flavonoid pigments, we thoroughly compare the actions of 1-butyl-3-methylimidazolium iodide, guanidinium thiocyanate, and tert-butylpyridine additives in ionic liquid-based redox electrolytes. These additives suppress undesirable charge recombination and parasitic resistance effects, achieving a more significant enhancement of open-circuit voltage (Voc) of 130 mV and fill factor (FF) of 30 % compared to their counterparts. Utilizing prepared electrolyte solutions in DSSCs also presents an outstanding increase in the efficiency of the devices, from 0.75 % to 1.17 % (∼56 % improvement), which outperforms other natural dye sources containing flavonoid pigments as well. The experimental findings provided in this study demonstrate that the development of electrolytes tailored for natural dyes can lead to greater power conversion efficiency.

Improving efficiency of [formula omitted] CoSn [formula omitted] solar cells using an HTL layer: A numerical study

In recent years, the material copper cobalt tin sulfur Cu2 CoSn S4 (CCTS) has attracted a lot of attention in photovoltaic applications because of its gap energy close to 1.5 eV. However, the efficiency of CCTS-based solar cells is still low. In our study, we presented a numerical study of a CCTS-based solar cell with a Mo/CCTS/ZnS/ITO structure using the SCAPS-1D simulator. Each layer of our solar cell was optimized separately, and the effect of the back contact electrode was also studied. We obtained the best performance using Pt as the back contact electrode. However, to reduce production costs, we used Mo as the back contact electrode, which caused a problem with the appearance of a Schottky barrier between Mo and CCTS. To solve this problem, we used an HTL layer between CCTS and Mo, which improved the efficiency of our cell from 24 % to 32 %. Also, in our work, we evaluate the effect of parasitic resistances (Rs, Rsh) and temperature on the performance of our solar cell.

Theoretical investigations of all inorganic Cs2SnI6 double perovskite solar cells for efficiency ∼ 30 %

Non-toxic and air-stable Cesium tin (IV) halide (Cs2SnI6) is a promising alternative to lead halide perovskite for photovoltaic applications. This study reports the extensive analysis of vacancy-ordered Cs2SnI6 perovskite as an efficient light harvester sandwiched between the n-ZnO electron transport layer (ETL) and different p-type metal oxides, namely CuBi2O4, Cu2O, CuAlO2, and NiO, hole transport layers (HTL), using SCAPS-1D software. Various physical parameters, viz. thickness, defect density (bulk and interfacial), and charge carrier concentration of different layers for the device architecture of FTO/ZnO/Cs2SnI6/HTL/Au, are systematically investigated along with the effect of parasitic resistance, work function, and operating temperature in the quest for best device performance in terms of photoconversion efficiency (PCE). The effect of DC biasing voltage is analyzed using C-V characteristics to understand the spatial charge distribution, absorber doping profile, and junction built-in potential. The frequency-dependent admittance was studied using simulated C-f characteristics to give an insight into the defect and the conductance. The Cesium tin (IV) halide (Cs2SnI6) based device optimized with CuBi2O4, Cu2O, CuAlO2, and NiO HTLs has shown PCE of 28.18 %, 29.72 %, 29.43 %, and 29.33 %, respectively.

A new transformerless DC/DC converter with dual operating modes and continuous input current port

AbstractIn this work, a transformerless DC/DC converter is presented with dual operating modes buck–boost procedure. As a simple structure and continuous input current port, the system acts as a common ground between the output and input terminal. One operating mode, quadratic voltage gain ratio is D/(1‐D)2, and other mode is D/(1‐D). In the present study, the continuous conduction mode (CCM), steady‐state conditions were assumed to analyze efficiency and small‐signal modeling by replacing parasitic resistance effects. The findings revealed that in comparison with other buck‐boost converters, the two voltage gain ratios were provided with fewer components and lower total switching device power in dual operating modes. Therefore, proposed converter can attract considerable attention for renewable energy applications, especially photovoltaic systems. Ultimately, the experimental findings of a prototype made in the laboratory are provided along with the received waveforms from the simulation in PLECS for validation purposes.

Modelling and Analysis of Non-ideal Two stage Lift Luo Converter with Positive Output

High power applications such as motor drive control requires a higher voltage level of the DC-DC power converter fed from low-level DC input sources. For increasing the output voltage, a gain of the converter is increased using the pump circuit consisting of inductors and capacitors connected in different forms. The effect of adding the energy storage elements includes the parasitic resistances in the converter and affects the performance. This research paper is intended to model and investigate the effects of non-idealities in two stages cascaded lift circuit type Luo converter with positive output voltage. To analyze the non-ideal effects, state-space averaging (SSA) technique is used to model the converter. The converter is modeled in the presence of equivalent series resistance (ESR) of inductances and capacitances to study the effect of parasitic resistances on the converter performances. The transient and frequency response of the converter is plotted using the MATLAB simulation and observed that the ringing in the transient response is damped and oscillation at corner frequency is mitigated. The effect of ESR reduces the voltage gain and improves the stability of the system by increasing the gain and phase margin. Step response and bode plot of the converter is plotted at ideal and non- ideal condition.

Control strategies and experimental validation for high-gain non-isolated double inductor boost converter

In this paper, a control design methodology for a high-gain non-isolated double-inductor boost converter is proposed. The studied topology of the converter is based on a traditional boost converter operating under the inductor-switched method to obtain a high-voltage gain with a low-duty cycle. Based on the proposed methodology, three control laws are obtained. The proposed control strategies consist of two decoupled control loops: an inner loop aimed to track the input current to a desired current reference and an outer loop addressed to regulate the converter output voltage to a constant reference value. For the inner control loop, first a proportional action is proposed in order to provide damping to the system. In addition, the proportional controller is enhanced using an estimation scheme, based on immersion and invariance theory to deal with the effect of inductor parasitic resistances on the system. The third controller is a proportional-integral action in order to guarantee the current tracking objective. On the other hand, the control design of the output voltage loop results in a PI controller for the three cases which is aimed to regulate the output voltage of the converter. The performance of the proposed control laws is validated in three experimental scenarios: steady-state, input voltage changes and output resistance changes. Output voltage regulation and input current tracking are the main results obtained in each case.

Oxfendazole induces protein catabolism and gluconeogenesis in experimental neurocysticercosis

Neurocysticercosis (NCC) is an endemic public health disease of the central nervous system highly related to epilepsy and seizures. Taenia crassiceps is an experimental model used for NCC and biochemical studies of the host-parasite relationship. For the past 50 years the NCC therapeutic treatment is performed with albendazole (ABZ) and praziquantel which opens a gap for new therapies due to parasitic resistance and other adverse effects of the drugs. Oxfendazole (OXF) is an albendazole derivative with efficacy against tissue cestodes of veterinary importance. The aim of this study was to determine the metabolic impact of OXF on T. crassiceps cysticerci intracranially inoculated in Balb/C mice. The animals were intracranially inoculated with T. crassiceps cysticerci and 30 days later received single dose oral treatment of OXF, ABZ and NaCl 0.9% (control group). The metabolic impact was quantified through the detection of metabolites from glycolysis, anaerobic fermentation of lactate and propionate, tricarboxylic acid cycle, protein catabolism, fatty acids oxidation. The differences observed in the concentrations of metabolites from the OXF treated group showed that the drug induced gluconeogenesis, increase in protein catabolism, fatty acids oxidation and propionate fermentation in comparison to the ABZ and control treated groups. In conclusion, OXF induced greater metabolic impact in T. crassiceps cysticerci than the standard NCC treatment, ABZ, showing that it may represent an alternative drug for its treatment.

A new transformerless quadratic buck–boost converter with high‐voltage gain ratio and continuous input/output current port

A new transformerless quadratic buck–boost converter with a common ground and a high-voltage gain ratio of D/(1−D)2 is proposed in this study. The output and input currents of the proposed structure are continuous due to the presence of inductive filters in the output and input ports. The continuity of the output current simultaneously reduces the voltage ripple and also the capacitor stress at the output port. With the proposed quadratic structure, a lower total switching device power and a higher voltage gain ratio are attained at the same duty cycle. Due to the advantages of the proposed structure, it can be widely used with renewable energy. The presented model is investigated in terms of steady-state analysis, continuous conduction mode, small-signal modelling, and efficiency with parasitic resistance effects. To validate the performance of the proposed converter, experiments are conducted in the laboratory to claim the theoretical waveforms obtained from the piecewise linear electrical circuit simulation (PLECS) simulation.

A Novel High Voltage Gain Buck-Boost Converter with Dual Mode Boost

This paper focuses on introducing a transformerless DC/DC converter with low total switching device power in dual working modes including step-up and step-up/down modes. The proposed converter is analysed in terms of the continuous conduction mode, steady state, and efficiency with the replacement of parasitic resistance effects. The proposed converter in the step-up mode has a high voltage gain ratio and a continuous input current. Then, the other working mode of the proposed converter with relevant DC/DC converters is compared. By this comparison, the proposed converter has a high voltage gain ratio. Also, the converter characteristics such as voltage stress on power switches and charge pump capacitors are in a good condition in this mode. Finally, the experimental results from a laboratory made prototype and the obtained waveforms from the simulation in PLECS are presented for validation such as higher voltage gain ratio, lower total switching device power and better efficiency.  

A Non-Isolated DC-DC Converter with Dual Working Modes and Positive Output Voltage

In this paper, a positive output DC/DC converter with low total switching device power in dual working modes is introduced. One working mode is a step-up mode (boost), and other is a step-up/down mode (buck-boost). The proposed converter in step-up mode has high voltage gain ratio, low stress on switches, and continuous input current. In other working mode, the buck-boost converter with six relevant DC/DC converters is compared. By this comparison, it can be seen that the proposed converter has a lower voltage gain ratio, but instead the converter characteristics such as voltage stress on power switches and charge pump capacitors are in good condition for this mode. The proposed converter is analyzed in terms of the continuous conduction mode (CCM), steady state and efficiency with replacement of parasitic resistance effects. To validate the performance of the proposed converter experiments are conducted in the laboratory to claim the theoretical waveforms obtained from the PLECS simulation.

Impact of Lateral SnO2 Nanofilm Channel Geometry on a 1024 Crossbar Chemical Sensor Array.

We propose a rational strategy to fabricate thermally robust, highly integrated molecular and gas sensors utilizing a lateral SnO2 nanofilm channel geometry on a 1024 crossbar sensor array. The proposed lateral channel geometry substantially suppresses the detrimental effects of parasitic interconnect wire resistances compared with those of a conventional vertical sandwich-type crossbar array because of its excellent resistance controllability. A conductive oxide top-contact electrode on the lateral SnO2 nanofilm channel enhances the thermal stability at temperatures of up to 500 °C in ambient air. Integrating this lateral SnO2 nanofilm geometry with analog circuits enables the operation of a 1024 crossbar sensor array without selector devices to avoid sneak currents. The developed 1024 crossbar sensor array system detects the local spatial distribution of the molecular gas concentration. The spatial data of molecular concentrations include molecule-specific data to distinguish various volatile molecules based on their vapor pressures. Thus, this integrated crossbar sensor array system using lateral nanofilm geometry offers a platform for robust, reliable, highly integrated molecular and gas sensors.

Effect of parasitic resistances on CdTe solar cell and validation with datasheet of FS-6450A in Matlab/Simulink

Cadmium telluride (CdTe) is the second popular choice after silicon for the solar cell in photovoltaic (PV) technology. Among the thin-film photovoltaic panels, CdTe reaches its first position to surpass crystalline silicon PV in cheapness and confined a large space in the PV market. Before constructing CdTe PV panels its operating characteristics should be properly judged. Any solar cell being related to a high level of nonlinearity, the model parameter is to be chosen judiciously. The operating characteristics can be well considered after the model circuit parameter comes accurately. In this paper operating characteristics of a thin-film CdTe solar module is shown with the variation of series and shunt resistance. Also considering parasitic resistances, the output characteristics of the solar cell varying climate condition is shown. Validation with FS-6450A PV module and all the simulation works are done in Matlab/Simulink environment. In the end, it is concluded with possible outcomes.

Analysis and mitigation of parasitic resistance effects for analog in-memory neural network acceleration

To support the increasing demands for efficient deep neural network processing, accelerators based on analog in-memory computation of matrix multiplication have recently gained significant attention for reducing the energy of neural network inference. However, analog processing within memory arrays must contend with the issue of parasitic voltage drops across the metal interconnects, which distort the results of the computation and limit the array size. This work analyzes how parasitic resistance affects the end-to-end inference accuracy of state-of-the-art convolutional neural networks, and comprehensively studies how various design decisions at the device, circuit, architecture, and algorithm levels affect the system’s sensitivity to parasitic resistance effects. A set of guidelines are provided for how to design analog accelerator hardware that is intrinsically robust to parasitic resistance, without any explicit compensation or re-training of the network parameters.