Duty Cycle Adjustment Research Articles

Research and Design of Sine Wave and Square Wave Signal Generator

In modern electronic systems, signal generators are widely used in fields such as communication, signal processing, and automatic control systems. High-quality signal sources are key to ensuring system stability and reliability, especially in testing and measurement processes. Traditional signal generators often use complex hardware designs and costly dedicated chips, making it difficult to meet the cost and size requirements for mid- to low-frequency applications. Therefore, it is important to design a simple, cost-effective, and high-performance signal generator based on general-purpose operational amplifiers. In response to this need, this paper designs and implements a sine wave and square wave signal generator based on the UA741 operational amplifier, with a focus on adjustable control of signal frequency and duty cycle. By optimizing the design of the RC oscillation circuit and feedback network, the sine wave generator can output high-quality signals with low distortion, while the square wave generator achieves flexible duty cycle adjustment via adjustable resistors. Simulation results show that these circuits exhibit good stability and flexibility, making them suitable for communication, signal processing, and automatic control systems. Despite achieving the desired results, further research is needed in component selection and circuit optimization to improve precision and adaptability. Future work will focus on the automation of circuit adjustment mechanisms and performance validation under extreme conditions to meet more demanding application needs.

Topology synthesis of coupled inductor based four port DC-DC converter for multi-input PV-battery application with autonomous mode selection

Multiport converters are the most reliable and integral component for latest renewable source integration with multiple inputs. This article is one among the kind, which proposes a novel Coupled Inductor based Four Port topology Multiport Converter (CI-FP-MPC) for integrating multiple PV sources with different voltages. The adoption of coupled inductor contributes an increased voltage gain with reduced stress on the switches and diodes. In addition, reduced number of switches and diodes for a four-port topology provides an increase in efficiency due to its reduced switching and conduction losses. Also, soft switching techniques for zero-voltage-switching in switches and zero-current-switching in diodes transfers a smooth commutation between the mode transients and operating intervals. The proposed converter operates with two PV sources with battery as a source and load as well, paving to two modes of operation viz., TISO and DIDO mode respectively. The proposed topology is derived from the conventional high gain boost converter with an add-on of autonomous sensing and control logic to swap and control between the modes. To evaluate and validate its performance, the converter is developed in experimental setup with a power capability of 750 Watts. The control logic and duty cycle adjustments are supervised in Hardware-In-Loop (HIL) arrangement using dSPACE MicroLabBox. The results show increased efficiency, improved voltage gain and robust mode transition during load perturbations.

EADA: Energy-Aware Adaptive Duty-Cycle Adjustment in Superframe for IEEE 802.15.6-Based Wireless Body Area Networks

EADA: Energy-Aware Adaptive Duty-Cycle Adjustment in Superframe for IEEE 802.15.6-Based Wireless Body Area Networks

Inter-patient variability of local cycle length and duty cycle distribution of the atrial fibrillation substrate beyond pulmonary vein isolation

Abstract Appropriate targets for catheter ablation of atrial fibrillation (AFib) beyond pulmonary vein isolation (PVI) are still controversially discussed. Various approaches such as ablation of complex fractionated atrial electrograms (EGMs), areas with spatio-temporal dispersion, and areas with increased rotor density have not been reproducible or failed to improve clinical success rates. The local cycle length (CL) and duty cycle (DC) distribution during AFib offer novel measures to characterize the atrial substrate. This study aims at providing first insights into the inter-individual variability of observed CL and DC distributions, their interdependence, and their correlation to the duration of AFib episodes to improve the individual characterization of the AFib substrate and tailor ablation strategies in future. In patients with recurrence of AFib despite PVI, a high-resolution 3D map was recorded at baseline during AFib. Intracardiac EGMs were preprocessed to improve local signal quality and far field suppression. EGMs were recorded with the multipolar, basket-shaped high-density mapping catheter. Local CL and DC distribution were visualized using a scatter plot and histograms. CL quantifies the time between subsequent local activations, DC quantifies the fraction of CL with local EGM activity, and the confidence (conf) feature quantifies the spatiotemporal consistency of EGM morphology. Only EGMs with conf > 0.6 are analysed. Feature calculation does not only take into account single EGMs but a weighted conglomerate of all acquisitions within a series of beats. Adjustable CL and DC thresholds allow highlighting regions within the 3D map for individual spatial analysis. 14 patients (7x paroxysmal AFib, 7x persistent AFib) were enrolled. All subjects underwent repeat ablation after PVI due to recurrence of AFib. CL and DC histograms were of highly individual shape. The most prevalent feature value varied from 158ms to 263ms for CL and from 38% to 96% for DC; histogram widths (inter-quartile-range) from 10ms to 34ms and from 26% to 36%, respectively. Normal distributions, multimodal distributions, and skewed distributions exhibiting a dominant peak were observed for CL. Both the most prevalent CL and the width of the distribution were highly individual. DC was observed to be normally to equally distributed with mostly broad bandwidths. Linear regression revealed a positive dependency between the most prevalent CL and the width of CL distributions. The most prevalent value and the width of both CL and DC did not differ significantly for the paroxysmal and persistent subgroup. Compare figure for detailed results. CL and DC distributions can help to characterize the highly individual type of AFib. The presented results suggest that there will not be a one-size-fits-all ablation approach for the AFib substrate. Further research is needed to identify clusters of similar pattern and individually adjust the ablation strategy.

Temporal stability of local cycle length and duty cycle distribution during atrial fibrillation

Abstract Appropriate targets for catheter ablation of atrial fibrillation (AFib) beyond pulmonary vein isolation (PVI) are still controversially discussed. Since available parameters to analyze the vulnerable substrate are very limited, there is the need to define and understand tailored features. Mapping during AFib can be particularly challenging due to its non-repetitive nature. Amongst others, temporal stability despite changing activation sequences is an essential requirement for features applied to AFib maps. The local cycle length (CL) and duty cycle (DC) offer novel measures to characterize the atrial substrate during AFib. This study aims at providing first insights into the temporal stability of CL and DC during AFib in order to assess the suitability of both features for the characterization of the individual substrate and tailor ablation strategies in future. In patients with recurrent AFib after PVI, two high-resolution 3D electro-anatomical maps were recorded sequentially during AFib before any ablation. Intracardiac electrograms (EGMs) were preprocessed to improve local signal quality and far field suppression. EGMs were recorded with a multipolar, basket-shaped high-density mapping catheter. Local CL and DC distribution were visualized using scatter plots and histograms. CL quantifies the time between subsequent local activations, DC quantifies the fraction of CL with local EGM activity, and the confidence (conf) feature quantifies the spatiotemporal consistency of EGM morphology. Only recordings with conf > 0.6 are analyzed. Feature calculation is based on a weighted conglomerate of all acquisitions within a series of beats. Adjustable CL and DC thresholds allow highlighting regions within the 3D map for individual spatial analysis. Both the global distributions and the local occurrence of CL and DC were compared in order to assess temporal stability. Four patients (2x paroxysmal AFib, 2x persistent AFib) were enrolled. All subjects underwent repeat ablation after PVI due to recurrence of AFib. Table 1 summarizes mapping parameters for both AFib maps in individual patients. Despite differences in mapping time and the number of EGMs, CL and DC histograms were significantly similar when comparing maps within one patient. For individually selected ranges of CL and DC in the upper left corner of the scatter plot (short CL and high DC), localization of corresponding areas was comparable in both 3D maps. An example is shown for patient I in the left and central column of the figure. CL and DC distributions were temporally stable features for all patients in this study cohort. Localization of EGMs of given CL and DC range within the 3D maps were comparable but not identical for arbitrarily selected ranges. CL and DC can therefore be considered valid features for substrate characterization during AFib. Further studies will need to investigate how ablation strategies can be derived from individual CL and DC distributions.

Transformerless high voltage gain Y-source converter with reduced switch stress

This paper introduces a novel Y-source converter, which utilises a three winding coupled inductor and a switched inductor boost module. In contrast to the conventional layout, the Y source converter has a repositioning of the switch from the load side to the source side. The proposed design offers several notable benefits, including a substantial increase in voltage gain, reduced voltage strain on the switch, and the capability to sustain continuous input current from the power source. Additionally, it has an extensive range of adjustable duty cycle. To mitigate the core saturation of the coupled inductor, a current-obstructing capacitor is used. A detailed analysis of the suggested topology is carried out, focusing on its steady-state characteristics. The theoretical and experimental results are verified using an experimental prototype of 100 W. By evaluating and comparing its performance against state-of-the-art converters, this paper seeks to emphasise the superiority of the new modified version of the Y-source converter

Shared External Driver for VHF Converter With a Synchronous Rectifier Based on Matching Network Parameters Optimization

In order to reduce the conduction loss of diode, synchronous rectification is usually adopted in very-high-frequency (VHF) converters, in which the rectifier diode is replaced by a MOSFET with very low on-state resistance. And to ensure normal operation of the synchronous rectifier switch, it is necessary to design a suitable driver with accurate timing. The widely used self-oscillating resonant drive circuit has a limited range of duty cycle adjustment, and the body diode of synchronous rectifier switch has long on-state time and a large conduction loss. Therefore, based on the analysis and parameters optimization of matching network, a shared external drive circuit is put forward. That is, the drive signals of the inverter switch and the synchronous rectifier switch come from the same external oscillation signal. On the premise of ensuring accurate drive timing, it can improve the drive signal's duty cycle of synchronous rectifier switch, reduce the conduction loss of body diode, and improve the efficiency of converter. Then on the basis of the proposed drive circuit, a VHF converter prototype with operating frequency of 10 MHz, 13 V input and 8 V/10 W output is designed, and the feasibility of the proposed drive circuit is verified by simulations together with experiments.

A Fast-Locking, Low-Jitter Pulsewidth Control Loop for High-Speed ADC

A fast-locking, high-precision, and low-jitter pulsewidth control loop (PWCL) for high-speed high-resolution analog-to-digital converter is presented. Only through controlling the delay of rising edge to adjust duty cycle, the clock jitter could be suppressed greatly. An improved charge pump with a follower circuit and self-biased loop was designed to decrease the voltage ripples for higher accuracy and lower jitter. A startup circuit was adopted to enable the pulsewidth control loop lock rapidly. With the SMIC 0.18 μm 3.3 V CMOS process, the simulation and measured results show that within 180 ns the PWCL can lock the clock duty cycles for the accuracy of 50±1% with 10%~90% input duty cycle from 50 to 550 MHz. The rms-jitter is 73 fs at 250 MHz. The active area is about 0.023 mm².

Self-Adaptive PDLC Control Strategy With Smart Light Intensity Adjustment Using Photovoltaic-Thermoelectric Hybrid Energy Supply Technology

As an electronically controlled glass whose transmittance varies with voltage, polymer dispersed liquid crystal (PDLC) has the advantages of good privacy, high transmittance, fast response speed, and good heat shielding performance. It can be applied to electronically controlled building windows. However, PDLC needs to consume extra power, and electronically controlled PDLC has not yet been integrated with intelligent home environment control. In this paper, we proposed an adaptive variable voltage step-size fast control algorithm in Field Programmable Gate Array (FPGA)-based home environment control system, which is powered by photovoltaic-thermoelectric (PV-TEG) hybrid sources. The power supply voltage of the PDLC can be dynamically changed through the adaptive Pulse width modulation (PWM) duty cycle adjustment technology to realize intelligent transmittance control, thereby improving the indoor lighting environment. Experimental results show that by applying the proposed algorithm, the indoor temperature is reduced by 2°C, and the adaptive and stable regulation of the optimal indoor illumination of 500 Lux can be completed in less than 2.5 seconds. This paper provides a feasible solution for the low-energy intelligent integrated control and monitoring of the modern home environment.

Sub-quarter micrometer periodically poled Al0.68Sc0.32N for ultra-wideband photonics and acoustic devices

In this study, we demonstrate the ability of polarity inversion of sputtered aluminum scandium nitride thin films through post-fabrication processes with domain widths as small as 220 nm at a periodicity of 440 nm. An approach using photo- and electron-beam lithography to generate sub-quarter micrometer feature size with adjustable duty cycle through a lift-off process is presented. The film with a coercive field Ec+ of 5.35 MV/cm was exercised first with a 1 kHz triangular double bipolar wave and ultimately poled with a 0.5 kHz double monopolar wave using a Radiant Precision Premier II tester. The metal polar (M-polar) and nitrogen polar (N-polar) domains were identified and characterized through potassium hydroxide wet etching as well as piezoresponse force microscopy (PFM). Well-distinguished boundaries between the oppositely polarized domain regions were confirmed through the phase diagram of the PFM results. The relationship between the electrode width, poling voltage, and domain growth was experimentally studied and statistically analyzed, where 7.96 nm/V domain width broadening vs escalating poling voltage was observed. This method produces extremely high domain spatial resolution in III-nitride materials via poling and is transferable to a CMOS-compatible photolithography process. The spatial resolution of the periodically poled Al0.68Sc0.32N is suitable for second-harmonic generation of deep ultraviolet through quasi-phase-matching and RF MEMS operating in the X-Band spectrum.

An all-digital built-in-self-test scheme for duty cycle corrector with de-skew circuit in NAND Flash memory

This paper presents an all-digital built-in-self-test (BIST) scheme to quickly test the duty cycle corrector (DCC) with de-skew circuit in NAND Flash memory. The proposed BIST circuit adopts an adjustable duty cycle module to generate the input signal of DCC, then it utilizes a high-resolution vernier time-to-digital converter to quantify the pulse widths related to duty cycle and phase difference into digital codes. The proposed BIST scheme can quickly obtain accurate measurement results of the input/output duty cycle of DCC and the phase difference of signals without using high-precision test equipment, it is a low-cost built-in testing solution for NAND Flash memory. The test chip is fabricated using 130 nm CMOS process. The area occupies 0.0425 mm2, and the proposed circuit consumes 2 mW when supply voltage is 1.2 V and clock frequency is 1 GHz. The experimental results show that the measurement error of duty cycle is in the range of −0.85% to 1.5% and the measurement error of phase difference is within ±6 ps.

Red InGaN Micro-LEDs on Silicon Substrates: Potential for Multicolor Display and Wavelength Division Multiplexing Visible Light Communication

Red micro light-emitting diodes (micro-LEDs) on silicon substrates are crucial for the realization of large-scale, high-quality, low-cost micro-LED displays, and are also beneficial for high-speed visible light communication (VLC). In this letter, micro-LEDs with different sizes were fabricated. The maximum light output power density of the 20 μm pixel can reach 3.36 W/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , which is 14 times higher than that of the largest pixel (150 μm). By adjusting the pixel size and injection current, a direct color shift from red to green can be observed. Moreover, multicolor emission with uniform brightness can be realized by adjusting duty cycle, which has broad application prospect in monolithic, multicolor displays. Despite the significant blue shift phenomenon, the peak wavelength of all pixels is still greater than 630 nm at the current density of 100 A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , which means that red light can be emitted in a large current density range to meet various application scenarios requiring different driving conditions. We have realized red, yellow and green micro-LED transmitters on Si substrate by changing the driving current density and modulation bandwidth up to 533.15 MHz is achieved when emitting green light. This is the report of red-emission micro-LEDs on Si substrates for visible light communication for the first time. And we proposed a proof-of-concept monolithic, multicolor wavelength division multiplexing scheme that achieved a total allowable transmission data rate of 2.35 Gbps. Such micro-LED is expected to be applied in multicolor displays, high-speed multi-channel VLC, color-tunable light sources, etc. In particular, due to its high integration and miniaturization, it is expected to be used in future practical application scenarios such as wearable communication devices and smartwatches.

A Forward-Type Single-Stage Multi-Input Inverter With Series-Time-Overlapping Power Supply

A Forward type single-stage multi-input inverter with series-time-overlapping power supply is proposed. The circuit structure and topological family, energy management control strategy (EMCS), high frequency (HF) switching process analysis, the relationship between multiple duty cycles and power decoupling, common mode interference suppression between multiple inputs are fully studied. The circuit structure is composed of multi-input selection switches in series and an isolated bidirectional Forward type single input single output inverter. This topological family includes 6 circuits such as full-bridge type. A master-slave energy management SPWM compound control strategy with independent control of input source power based on input voltage feedforward and output voltage feedback is proposed. It realizes the energy management of the input source by controlling the instantaneous value of the output voltage and the output power ratio of the multiple inputs and achieves the smooth switching between the two power supply modes. The designed and developed 3kVA inverter prototype has excellent performances such as single-stage power conversion, HF electrical isolation, high conversion efficiency, small size and weight, wide duty cycle adjustment range, high output waveform quality, and strong load adaptability.

An Influence of Parameters of the Control Signal of Power LEDs on Their Junction Temperature and Emitted Light

This article presents the method of implementation and the results of experimental investigations illustrating an influence of parameters of the signal controlling the current flowing through power LEDs on their junction temperature and on parameters characterizing the light emitted by them. The measurement system used and the tested power LEDs are described. The results of measurements of the junction temperature of the tested devices, the values of the average value of the power dissipated in the tested devices and the photometric and radiometric parameters of these devices obtained for different values of frequency and the duty cycle of the signal controlling the current flowing through the tested diodes are presented and discussed. It is shown that the operation of the considered semiconductor devices is more effective at low frequency values. The possibility of adjusting the optical parameters of the power LEDs in the considered range of frequency and the duty cycle adjustment is assessed. Additionally, the measured waveforms of the current supplying the tested LEDs is shown. The influence of the parasitic capacitances of the tested devices is discussed. On the basis of the obtained investigation results, some recommendations for the designers of lighting systems can be formulated. In order to obtain an almost linear dependence of the illuminance on the duty cycle, the values of frequency not exceeding 10 kHz should be used.

A Flexible and Decoupled Space Vector Modulation Scheme With Carrier-Based Implementation for Multilevel Converters

This article proposes a novel space vector pulse width modulation (SVPWM) scheme for multilevel converters in <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">abc</i> coordinate system, in which the reference vector is decomposed into an offset vector and a remainder vector that can be synthesized using two-level SVPWM. The switching state satisfying a specific relationship is first selected as the offset vector such that the common-mode components are eliminated and therefore the phase voltages are decoupled. A dynamic reference point mechanism establishes a one-to-one correspondence between all available vector combinations and one unique variable, i.e., the number of level shifts. This feature further facilitates a general approach to determining the optimum switching states to satisfy different control objectives, such as common-mode voltage rejection. Besides, phase decoupling enables the introduction of carrier-based modulation to simplify implementation, where the duty cycle of the zero vector can be flexibly adjusted while the non-zero vectors remain the same to generate an equivalent output. Consequently, two-level SVPWM-based method and carrier-based PWM are combined to exploit their respective strengths. The proposed scheme achieves overmodulation operation, and provides more flexibility, i.e., redundant switching states and adjustable duty cycles, to optimize switching patterns. Simulation and experimental results validate the proposed algorithm.

A Design of a Dual Delay Line DLL with Wide Input Duty Cycle Range

This article describes a dual-controller dual-delay line delay lock loop (DC-DL DLL). The proposed DLL adopted a dual delay line structure, each delay line was composed of a coarse adjustment and a fine adjustment unit, and the dual delay lines had corresponding control units to reduce the mismatch between the delay lines, and it avoided the complicated design of duty cycle correction (DCC) circuit. A frequency divider was added to divide the input clock to achieve a wider input clock duty cycle adjustment. Additionally, a simple clock synthesis circuit was proposed to synthesize the required clock. The DLL design used the 25 nm process with a voltage of 1.2 V. The simulation results showed that at a working frequency of 1.6 GHz, the peak-to-peak jitter of the DC-DL DLL after locking was approximately 17.61 ps, the maximum output duty cycle error was about 1.3%, and the input duty cycle ranged from 20% to 80%, with a power consumption of 10.06 mW.

Design of a Power Converter for Solar Energy Storage System

This paper presents a single-stage three-port isolated power converter that enables energy conversion among a renewable energy port, a battery energy storage port, and a DC grid port. The proposed converter integrates an interleaved synchronous rectifier boost circuit and a bidirectional full-bridge circuit into a single-stage architecture, which features four power conversion modes, allowing energy adjustment for both the renewable energy and the battery storage energy ports when power is supplied by the renewable energy port. It also features bidirectional functionality that allows the battery storage energy port to provide energy storage through the DC grid port, thereby providing uninterrupted power supply functionality. The converter uses four power switches and two inductors to boost and convert energy from the renewable energy port to the battery storage energy port or to the DC grid port through the bidirectional full-bridge circuit. The converter is also capable of 1 kW power energy conversion by utilizing an adjustable duty cycle with a fixed frequency of 100 kHz and phase-shift control through a built-in pulse width modulation control module of a TMS320F28 series digital signal processor. According to the experimental results, the converter developed in this study can achieve a conversion efficiency of up to 94%.

A hybrid control strategy for dynamic compensation of cross‐coupling effect in two‐load IPT system

AbstractThe cross coupling between receiver coils complicates the control and optimization of “one‐to‐may” multi‐load IPT systems. In this paper, the cross‐coupling effect in a two‐load IPT system is thoroughly discussed. It is noted that the input impedance, the total output power and the power distribution ratio among receivers are all affected. After developing a new leakage‐inductance‐based model considering the cross‐coupling effect, it is suggested that the operating frequency is adjusted according to the cross‐coupling coefficient to ensure a constant power distribution ratio. The total output power and the input impedance are regulated by coordinated adjustment of the inverter's duty cycle and the transmitter‐side compensation capacitance with switched control capacitor (SCC) control. Based on the proposed hybrid control strategy (frequency, duty cycle, and SCC), the power distribution among loads and the total output power are kept constant under variable cross‐coupling coefficient, and the input impedance are shaped to be inductive to achieve zero voltage switching (ZVS) realization for all switches in the inverter. The theoretical analysis is finally verified by experimental results on a 35 W two‐load IPT prototype.

Stress-strain magnetoactive propulsion system

It is possible to create deformations in magnetically active polymeric materials by applying magnetic fields to them. This work develops a symmetrical design scheme of the device, in which the drive and control are carried out by two actuators located on opposite sides. The symmetric scheme with control from two sides allows transporting objects (cargo) in mutually opposite directions (forward and backward). It is proposed to use a magnetically active gel together with a magnetically active elastomer as magnetically active materials. The resulting force effect in the device actuator is produced by interaction of magnetic fields of electromagnets with magnetic fields of permanent magnets. Expressions for obtaining alternating magnetic fields which create conditions for generating alternating magnetic forces in the actuator of the device are given. A prototype design with a controller control device in which signals are generated for an optimum current pulse generator with adjustable duty cycle and duration is presented.

Bidirectional Buck-Boost Converter Using Cascaded Energy Storage Modules Based on Cell Voltage Equalizers

Ordinary modular energy storage systems require cell- and module-level equalizers, in addition to a main bidirectional converter, increasing the system complexity and cost. This article proposes a bidirectional buck-boost converter using cascaded energy storage modules. Each module contains a cell-level equalizer with a half-bridge cell. The half-bridge cell in each module is utilized not only for the cell-level equalizer but also for the cascaded buck-boost converter. Module voltages are equalized by adjusting duty cycles of the half-bridge cells, allowing the elimination of dedicated module-level equalizers. Furthermore, the cascaded structure equivalently increases the switching frequency and reduces the inductor current ripple. An experimental charge-discharge cycling test using the prototype was performed for three electric double-layer capacitor modules. Cell and module voltages were gradually equalized during cycling, demonstrating the bidirectional power conversion and cell- and module-voltage equalization capabilities of the proposed converter.