Difference In Etch Rate Research Articles

High resolution patterning of silicon by selective gallium doping

High resolution patterns have been fabricated in 〈100〉 silicon by doping selected areas with gallium utilizing an ion microprobe. These doped regions are used as an etch mask for subsequent anisotropic etching of silicon. The etching was performed in a KOH:IPA solution at 80–90 °C. The resulting etch rate of the doped silicon is approximately inversely proportional to the gallium impurity concentration. At high doping concentrations an etch rate difference of greater than 1000:1 has been measured between the virgin silicon and the doped regions. Using this technique features as small as 30 nm have been produced.

Optical recording in amorphous silicon films

The amorphous to polycrystalline transition in thin silicon layers is accompanied by a large change in optical transmission in the visible. By inducing this transition by laser annealing, high-resolution optical recording and visible-light readout have been demonstrated. As an optical recording material, amorphous silicon layers offer characteristics of high information-storage density, long-term stability, and negligible degradation upon repeated readout. Such an optical image in a thin silicon layer can be converted to a relief pattern by taking advantage of the difference in etch rate between amorphous and polycrystalline silicon, thus providing a method of producing patterns in silicon layers without use of intermediate photo-resist steps.

Selective Reactive Ion Beam Etching of SiO2 over Polycrystalline Si

Reactive ion beam etching experiments have been performed on and polycrystalline Si using , , and . The etch rate for using ions generated from fluorocarbon gases is enhanced over the rate obtained using argon ions, whereas the etch rate for Si is suppressed. Etch rates for thermal, LPCVD, and “Nitrox” oxides, and phosphorus‐doped and undoped polycrystalline Si are compared. LPCVD etches slightly faster than the other types of oxides while doped and undoped polycrystalline Si show little difference in etch rate. etch rates of greater than 600 Å/min have been observed with selectivities over Si of 6:1. The anisotropy of this technique is demonstrated by the formation of 0.5 μm diam contact windows in a 1 μm thick layer of on single crystal Si.

Polysilicon Interconnection Technology for IC Device

A new fabrication technology is presented for short channel Si‐gate MOS‐LSI's. This technology is characterized by two individual phosphorus diffusion processes, the source and drain formation and diffusion into poly‐Si. It is also characterized by using the etching rate difference between phosphorus‐doped and undoped poly‐Si. The former is for decreasing poly‐Si resistance without junction depth dependence, which is effective for high speed MOS‐LSI's with poly‐Si, interconnections. The latter is for precise and uniform patterning of poly‐Si, which is effective for good threshold voltage controllability and uniformity, because they are sensitive to channel length in the range of less than 3 μm. In this paper, technology effects are examined for decreasing poly‐Si resistance by comparison with a conventional process. Also, technology effects are tested for precise and uniform patterning of poly‐Si by threshold voltage distribution of short channel transistors, which are fabricated by this technique. A model of poly‐Si etching profile, considering the edge effect, is presented for precise and uniform patterning mechanism explanation.

Relief-type diffraction grating by amorphous chalcogenide films

In As-Se- (S) -Ge amorphous films, a remarkable difference of chemical etching rate between the heat-treated state and the light-irradiated state has been observed. Utilizing this characteristic, a relief-type diffraction grating of the amorphous film was obtained (the pitch between grating lines, 0.86 μm). This grating has achieved a high diffraction efficiency of 15.8%, which was about 10 times greater than before chemical etching.

In-situ measurement of dielectric thickness during etching or developing processes

A system has been developed which permits the measurement of dielectric film thicknesses in-situ during development or etching processes. This can be extended to growth or deposition processes. Two examples of its uses are presented: the determination of the thickness of phosphosilicate glass layers on silicon dioxide coated silicon wafers by making use of the etch rate differences, and the monitoring of photoresist thickness during development to characterize the photoresist development process.

Ａｓ?S２?TＳ?S３?T蒸着薄膜のエッチング

Characteristic pattern which was observed on the surface of etched as-evaporated As2S3 film has been investigated and ascertained to be composed of As2O3micro-crystals. Etching rate difference between as-evaporated film and argon ion laser irradiated one has been discussed. Using the difference of etching rate, holographic grating has been formed on the amorphous As2S3film.

Etching of Germanium with Water Vapor

The gas phase etching of germanium with the water vapor is studied. Germanium reacts with the water vapor in the temperature range of 700∼880°C according to the reaction, Ge(s)+H2O(g)=GeO(g)+H2(g). The water vapor is superior as an etchant in such respects as the purity, uncorrosiveness and uniformity in mask etching. The etching rate is found to depend strongly on the atmosphere of hydrogen or the inert gas. The difference in etch rate is qualitatively discussed in terms of the chemical kinetics. The structure of hexagonal pits, which are observed to grow under a particular etching condition, is clarified.

INFLUENCE OF DEPOSITION TEMPERATURE ON PROPERTIES OF HYDROLYTICALLY GROWN ALUMINUM OXIDE FILMS

Aluminum oxide films deposited onto silicon substrates by hydrolysis of AlCl3 show marked differences in etch rates, electron diffraction patterns, ir absorption spectra, and chlorine contents between films grown below 700°C and above 800°C. Analysis of the composition from the yield of backscattered MeV He ions indicated that both film types were stoichiometric throughout the layer thickness. These analyses indicated that the Cl was incorporated uniformly in the low-temperature-deposited films to a level of about 2 at. %.

Metal-nitride-oxide-silicon field-effect transistors, with self-aligned gates

Silicon insulated-gate field-effect transistors (FETs) have been fabricated by processes involving relatively non-critical photoresist and self-limiting etching steps. Important features of the method include the formation of the gate insulator under extremely clean conditions, incorporation of an alkali ion barrier (silicon nitride) to achieve stable device characteristics and automatic alignment of the gate electrode with respect to source and drain. The gate insulator, comprising 600 Å of grown silicon dioxide covered with 400 Å of silicon nitride, is formed at the beginning of fabrication. Thus, the SiSiO 2 interface is established at a point where the best state-of-the-art cleaning techniques can be applied to the starting material. A thick (8000 Å) layer of SiO 2 is pyrolytically deposited over the nitride to minimize contact capacitances in the finished structure. This must be removed from the active device region, and advantage is taken of the difference in etch rate between SiO 2 and silicon nitride to ensure a well-controlled gate insulator thickness. Thus the nitride layer serves the dual function of providing a barrier to mobile ions in the completed structure, and of acting as an etch-resistant layer during fabrication to achieve control over geometry. A polycrystalline layer of silicon is used to form the gate electrode, which is shaped early in the process, and is used to define the limits of the source and drain windows. This aspect of the fabrication assures self-alignment of the gate electrode with respect to source and drain. During the diffusion of source and drain regions the polycrystalline silicon is rendered sufficiently conductive that no metallization of the gate electrode is required, except at one end for contacting purposes. This eliminates the need for a critical photoresist alignment. Both n and p induced-channel (enhancement) devices have been made with this process. Turn-on voltages at 10 μA drain current of +1.35 V ( n-channel) and −2.6 V ( p-channel) with less than 12 per cent spread over a slice were obtained. Analysis of the device characteristics indicates field-effect mobilities of 335 and 233 cm 2/V-sec for the n- and p-channel devices respectively. Aging behavior under bias at 300°C indicates the presence of residual mobile positive charge of the order of 1.5 × 10 11 charges/cm 2, resulting in turn-on voltage shifts of less than 1 V over several hundred hr with +10 V applied to the gate.

The Etching of Silicon Nitride in Phosphoric Acid with Silicon Dioxide as a Mask

The water content of phosphoric acid in etching silicon nitride and silicon dioxide plays an important role. An increase in water content increases the etch rate of silicon nitride and decreases the etch rate of silicon dioxide. The highest possible temperature for a fixed water content at atmospheric pressure in the system is realized by boiling the liquid and refluxing the vapor phase. Refluxed boiling phosphoric acid at 180°C was found to be a useful etchant for silicon nitride films. The etch rate is 100 Aå/min. Under the same conditions deposited silicon dioxide had an etch rate of 0–25 Aå/min depending on the method of preparation, and elemental silicon 3 Aå/min. Etch rates of silicon nitride, silicon dioxide, and silicon in refluxed boiling phosphoric acid were measured as a function of temperature (and concentration) in the range of 140°–200°C. All etch rates increased with temperature. The “apparent” activation energies are 12.7, 27.6, and 26.4 kcal/mole, respectively. The etch rate of silicon nitride in phosphoric acid of constant concentration was measured as a function of temperature only. In this case the “real” activation energy was 22.8 kcal/mole. The difference in etch rate between silicon nitride, deposited silicon dioxide, and silicon offers a technique for etching contact holes in silicon nitride using deposited silicon dioxide as a mask. Such a technique was used successfully in making transistors with silicon nitride over as a junction seal.

Controlled Etching of Silicon in the HF ‐ HNO 3 System

Some of the important factors that affect the degree of reproducibility of desired dimensions, flatness, and surface finish of chemically etched silicon have been investigated. The etching rate of single crystal silicon in hydrofluoric and nitric acids was studied as a function of the ratio of the concentrated acids, temperature, and stirring rate. These variables were found to be related to the etching rates over the ranges studied. No difference in etch rate was observed for n, p and n‐p junction silicon, ranging in resistivity from 0.05 to 78 ohm‐cm. The etch rate appears to be dependent on the diffusion of the fluoride species to the silicon surface in the nitric acid‐rich region. The controlled etching technique has been applied to the etch‐cutting of wafers from selectively masked silicon slices. Preliminary investigation has shown that this method is applicable for the preparation of slices for diffusion processing.

The orientation dependence of etching effects on germanium crystals

There is a marked variation with crystal orientation of the many well-known etchants for germanium. For example, some etchants (like CP-4) only form etch pits at dislocation sites when the surface is within a few degrees of (111) or (100). The detailed results of etching are dependent, in many cases, on the exact conditions of attack (temperature, impurity content of the semiconductor, etch composition, and illumination). A convenient way of studying these effects is by treating small polished hemispheres of single-crystal germanium, and examining the results as a function of their position on the crystal. By this means, real etch features may be distinguished, by their recurrence in positions determined by the crystal symmetry, from artefacts, and the time and expense of preparing many accurately oriented flat surfaces are avoided. Some etchants have been shown to attack all surface orientations similarly, while others (notably the HF-H 2O 2 series of etchants) show certain effects only over angular ranges of a few degrees. There is some evidence that the variations are due not only to etch rate differences, but to changes in the actual mechanisms of etching with orientation.