Failure Analysis Of Devices Research Articles

Direct Visualization of Breakdown-Induced Metal Migration in Enhanced Modified Lateral Silicon-Controlled Rectifiers

The robustness of electrostatic sensitive devices is important in state-of-the-art silicon technology. However, the electrical breakdown-induced microstructure evolution remains unclear. In this work, we performed the physical failure analysis of breakdown in an enhanced modified lateral silicon-controlled rectifier-based electrostatic discharge (ESD) device. Direct visualization of the conductive metal filaments in the doped silicon substrate has been achieved by high-resolution transmission electron microscopy. The locations of these metal filaments induced by breakdown are found near the cathode. The evolution of these microstructural changes and chemical properties provides guide to the failure analysis of ESD devices.

Profiling of carriers in a 3D flash memory cell with nanometer-level resolution using scanning nonlinear dielectric microscopy

This work used scanning nonlinear dielectric microscopy to profile the distributions of carriers in channels and floating gate structures less than 10 nm in size within a three dimensional flash memory cell. An exceptionally sharp diamond probe tip (having a radius of less than 5 nm) was employed so as to obtain extremely high spatial resolution, and this technique was found to provide high contrast images of floating gates. The minimum spatial resolution obtainable from this apparatus was determined to be less than 1.9 nm. In addition, the present study demonstrated that variations in the diffusion lengths of N-type impurities between channels were less than 21 nm. The present study establishes an extremely helpful means of optimizing the performance and failure analysis of flash memory cells and similar devices.

Sensitivity improvement of ultrasonic beam induced resistance change (SOBIRCH) method with ultrasound resonance inside mold resin

In some cases of the failure analysis of semiconductor devices, package state analysis without decapsulation of mold resin is required. The ultrasonic beam induced resistance change (SOBIRCH) method has been proposed as an alternative without need for the decapsulation. The sensitivity of SOBIRCH depends on the quality of the equipment of its measurement system. After a system is fixed, its sensitivity cannot be upgraded easily. However, if it is possible to improve sensitivity even after the system is fixed, it will be easier to localize faults. By means of numerical analysis, recent research suggested that ultrasound resonance inside the mold resin can improve the sensitivity of SOBIRCH significantly. Our research reported here experimentally verified the ultrasound resonance inside the mold resin improved the sensitivity of SOBIRCH by appropriate tuning of the ultrasound frequency to thinned mold resin. Additionally, this research demonstrated that a fault in a practical device could be more clearly observed by using the expected effect of ultrasound resonance in SOBIRCH observation.

Scanning Probe Microscopy Applications in Failure Analysis of Semiconductor Devices

Abstract Scanning probe microscopy (SPM) is widely used for fault isolation as well as diagnosing leakage current, detecting open circuits, and characterizing doping related defects. In this article, the author presents two SPM applications that are fairly uncommon but no less important in the scope of failure analysis. The first case involves the discovery of nano-steps on the surface of high-voltage NFETs, a phenomenon associated with stress-induced crystalline shift along the (111) silicon plane. In the second case, the author uses an AFM probe in the conductive mode to correlate tunneling current distribution with hot spots in high-k gate oxide films, which is shown to be a better indicator of oxide quality than rms surface roughness.

Review of the biomechanics, engineering design and forensic failure analysis of implantable medical devices

Review of the biomechanics, engineering design and forensic failure analysis of implantable medical devices

Path Loss Failure Analysis of Unknown Wireless Devices using Software Defined Radio (SDR)

The efficient method for detection of unknown wireless devices using software-defined radios (SDR) in wireless communication is proposed to analyze the power loss. SDR analyze the position of unknown parameter and their transmission of power and energy by sensing the carrier frequency and measuring the signal concerning the Received Signal Strengths (RSS) method. RSS based positioning techniques are useful for implementation of low complexity, and they are susceptible to path loss in the programmable field environment. The RSS based techniques evaluate the position of object and transmission of power from unknown devices by assuming the value of path loss failure before estimation. However, the location of the estimation accuracy depends on the discrepancy of the path loss exponent (PLE) of the object. The novelty of the proposed method introduces a novel approach for path loss failure analysis and calculates the power saving of unknown devices in SDR.

Convolutional neural network (CNNs) based image diagnosis for failure analysis of power devices

An image diagnosis by deep learning was applied to failure analysis of power devices. A series of images during a process to failure by power cycling test was used for this method. The images were obtained by a scanning acoustic microscopy of our real-time monitoring system. An image classifier was designed based on a convolutional neural network (CNNs). A developed classifier successfully diagnosed input image into a normal device and an abnormal device. The accuracy of classification was improved by introducing a pre-training and an overlapping pooling into the system. A technique to extract a feature related a failure is essential for the failure analysis based on the real-time monitoring and the deep learning is one likely candidate for it.

Cold temperature power on reset use case

This work describes a use case study of a failing mixed-signal product that showed instability in the power-on-reset signal at cold temperatures. It is a marginal fail whose root-cause turned out to be larger than expected random variations in threshold voltage, that cause a mismatch between matched transistors in a comparator in a band-gap circuit. The fail was localized with OBIRCh in an SDL-like setup. Understanding the origin of the fail required transistor characterization, and device simulation. Further, FIB circuit-edit was used to prove that the fail could be resolved with a metal fix. This use case is representative of the multi-faceted aspects of failure analysis of mixed-signal devices. It highlights the cross-disciplinary team-effort required for the successful identification of the root-cause of a fail. Further, it is also a testament of the wide range of tools and techniques needed for the resolution of a failing product.

Ultrasonic beam induced resistance change (SOBIRCH) method for failure analysis of semiconductor devices encapsulated by mold resin

In the process of the failure analysis for semiconductor devices, various optical methods are applied as techniques to localize faults of the semiconductor devices. Conventional optical techniques often require the decapsulation of the mold resin, since the mold resin is not optically transparent. As a new fault localization technique requiring no decapsulation, the authors are proposing the ultrasonic beam induced resistance change (SOBIRCH) method based on a heating by focused ultrasonic beam. In this report, the signal intensity of the SOBIRCH method for the capsulated samples was discussed through the experimental and the theoretical approaches. By comparing the experiment and the numerical analysis, it was suggested that a certain thickness of the thin mold resin can enhance the intensity of the SOBIRCH signal. Additionally, an expected effect of the standing wave in the thin mold resin was calculated, and a method to make use of the standing wave was proposed.

Electron-beam radiation induced degradation of silicon nitride and its impact to semiconductor failure analysis by TEM

By in-situ transmission electron microscopy (TEM), we performed a detailed study on the electron-beam radiation damage to nanostructured silicon nitride thin-film process layers in a typical semiconductor NVM device. It was found that high-dose electron-beam radiation at 200 kV led to rapid degradation of silicon nitride process layers, i.e. thin-downing of nanostructured silicon nitride, inter-diffusion of O and N, the formation of bubble-like defects and segregation of N at neighbouring interfaces. Further detailed analysis revealed that radiation-induced modification in the microstructure and chemical composition of silicon nitride layers could be ascribed to the electron radiation induced knock-on damage and ionization damage. The radiation enhanced diffusion (RED) accounted for the continuous thin-down of the nitride process layer and the formation of bubble-like defects in thick nitride spacer process layers. The work well demonstrated the electron-beam sensitivity of nanostructured silicon nitride materials in the semiconductor devices, and thus may give useful information about electron-dose control during TEM failure analysis of the semiconductor devices containing nanostructured silicon nitride process layers.

A General Equivalent Circuit Model for a Metal/Organic/Liquid/Metal System

A general equivalent circuit model for the metal/organic semiconductor (OSC)/liquid/metal system is presented. Each circuital element, representative of a physically observable phenomenon associated with the device working principle, is analyzed and discussed. Two case studies of electrochemical impedance spectroscopy of devices featuring NaCl (concentration of 0.1 M) and MilliQ water as liquid are reported, showing that both cases can be considered as a particular case of the general model presented in this paper. Experimental verification of the two practical cases is achieved by performing measurements onto electrodes coated by either an n-type or a p-type OSC deposited by sublimation or drop casting, respectively. The good agreement with the experimental data makes our model a useful tool for the characterization and failure analysis of electronic devices, such as water-gated transistors, electrophysiological interfaces, fuel cells, and others electrochemical systems.

Reliability evaluation of IGCT from accelerated testing, quality monitoring and field return analysis

The IGCT (Integrated Gate Commutated Thyristor) was launched as a new power semiconductor device 20 years ago, using design features where only few reference was available at that time. Especially the gate path that needs to take the full principal current for micro seconds was significant extension of the state of the art. In-between 20 years of field experience with IGCTs is available. In this paper test results from accelerated testing, quality monitoring results over many years, reliability date from evaluated field failure rates and analysis of devices that were in service for 15 years under well-known load are summarized and show an excellent reliability of the power semiconductor.

IEEE-CPMT Special Topic: Advances in Tools/Techniques for Microelectronic Package Failure Analysis

Recent advances in microelectronic package technologies such as 2.5-D, 3-D, and wafer-level packaging have delivered rapid breakthroughs in the semiconductor industry by providing better device performance, power efficiency, and cost reduction. Reduction of feature sizes for these technologies has also required advancements in tools and techniques necessary to observe and investigate failures seen in these complex devices. The complexity of these devices has challenged researchers to modify conventional tools and invent smart methods for enhanced fault isolation (FI) and failure analysis (FA) capabilities. This Special Topics Section is a collection of various fault isolation and failure analysis advances made by research groups active in this area. Dissemination of all this research in one Special Topics Issue will greatly benefit the researchers working in the area of failure analysis of semiconductor devices. We capture the highlights of this Special Topic below.

Study on the measurement accuracy of circular transmission line model for low-resistance Ohmic contacts on III-V wide band-gap semiconductors

The accuracy and error propagation for determining the low specific contact resistance of Ohmic contacts on III-V wide band-gap semiconductors based on the circular transmission line model have been analyzed and the validity of this method is discussed in detail. The accuracy is more susceptible to the factors including data fitting method, electrical measurement technique and contact area correction. By using the equations of the original circular transmission line model to extract the fitting parameters, the calculation accuracy is much improved and the inapplicability of the linear least-square fitting is prevented. To further improve the accuracy, a four-probe current-voltage measurement technique was adopted to reduce the parasitic series resistances and the uncertainty bound, especially for the Ohmic contact with low sheet resistance of the semiconductor. Moreover, we have studied the size effect of contact pads of patterns and demonstrated that contact area correction is necessary for the semiconductor with high sheet resistance. A comprehensive error analysis is also performed to fully understand all the impact factors on this advanced method of specific contact resistance measurement, which is benefit for device performance evaluation and failure analysis.

(Invited) Advances in SiC and GaN Power Device Development and Future Directions

As wide bandgap semiconductors, devices based on SiC and GaN represent critical next-generation medium voltage and high voltage power switch technology. SiC device technology has matured rapidly over the past two decades, owing to advances in substrate quality, a fundamental understanding of epitaxial growth to characterize defects and identify and eliminate performance-limiting defects such as basal plane dislocations, and device breakthroughs such as the junction barrier Schottky (JBS) diode and DMOSFET. While lateral GaN-based HEMT technology has been highly successful for RF power amplifiers and is well-positioned to supersede GaAs-based MMICs, advances in vertical power device technology has been limited due to the lack of high quality native substrates. As large area substrates have become available by hydride vapor phase epitaxy (HVPE) and ammonothermal growth, several fundamental vertical power devices have recently been realized, including Schottky diodes with edge termination, trench MOSFETs, and CAVETs. However, significant fundamental materials challenges currently limit device performance, specifically the realization of repeatable thick drift layers with low background doping as well as a reliable selective area planar process for p-type doping. In this presentation, an overview of SiC and GaN device development at the U.S. Naval Research Laboratory will be summarized, first looking at SiC devices including the development of novel materials characterization techniques to understand the role of defects on device performance, reliability and failure analysis of devices, including BPD kinetics in PiN and MPS diodes, and novel device designs including grayscale termination processes, temperature compensated PiN diodes, and hybrid Si/SiC modules. Recent developments in GaN vertical device technology will also be presented, including the development of an ion implanted p-type doping process and preliminary materials characterization to understand the relationship between substrate quality, epitaxial layer quality, and device performance. Future directions for GaN device development enabled by the availability of bulk substrates will also be discussed, including implications for lateral devices, novel lateral device designs, and fundamental materials work based on the lessons learned from SiC.

A combination of self-assembled monolayer and hydrophobic conformal coating for anti-corrosion of Cu/NiP/Au 3D circuitry in artificial sweat solution

3D circuitry on moulded interconnect device (MID) is usually made of multi-layered metals, for example, electroless copper (Cu), electroless nickel (EN or NiP) and immersion gold (IG or Au), i.e. so-called Cu/ENIG. Anti-corrosion of MIDs in harsh environments, such as in contact with human sweat, is a challenge because the three metals have large differences in electrode potential and part of the circuitry is positively polarized during operation. Furthermore, any coating or surface modification applied onto the metal traces must meet other requirements such as good compatibility with soldering and less effect on the surface conductivity. In this study, failure analysis of 3D MID devices working in sweat environment was carried out to understand the corrosion mechanisms. It is shown that EN coating showed better corrosion resistance than Cu substrate, which is attributed to the passivation effect of phosphorus in NiP alloy material. The reasons causing the metal trace corrosion include existence of coating defects in both of Au and EN coatings, poor corrosion resistance of Cu in sweat, and large difference in electrode potential among the three metals. Based on the failure analysis results, a synergetic effect of surface passivation by using self-assembled-monolayer (SAM) of 2-mercaptobenzothiazole (MBT) and hydrophobic conformal coating was studied. The sweat tests show that a combination of SAM and hydrophobic conformal coating can effectively retard the corrosion progress of Cu substrate of the metal traces on 3D MIDs.

Electrical Characterization of Electron Beam Induced Damage on Sub-10nm SRAM Using Nano-Probing Technique

Nano-probing techniques utilizing scanning electron microscopy (SEM) guidance have been widely employed in evaluation of electrical characteristics of the localized devices in the failure analysis of actual LSI systems [1] because of their high resolution imaging, probing accuracy and high throughput. As CMOS scaling is moving toward the sub-10 nm regime, electron beam induced damage is becoming a more critical issue in performing electrical characterization at the contact level using nano-probe techniques. However, the effects of electron beam induced damage have not been reported for sub-10 nm devices in the range of less than 1.0 kV of electron beam acceleration voltage (Vacc). In this paper, 10 nm design ruled n-channel metal-oxide-semiconductor transistors were prepared in order to investigate how much the transistors were affected by electron beam irradiation as a function of Vacc. Figure 1 illustrates ID - VG transfer characteristics of the transistors before and after electron beam irradiation with a 10 minutes exposure time at low (Vacc = 0.5 kV) and high (Vacc = 1.0 kV) Vacc. After electron beam irradiation, all device parameters shifted including threshold voltage, saturation current, sub-threshold slope and transistor leakage current. We observed different degradation characteristics in threshold voltage depending on Vacc. Figure 2 shows the percentage of threshold voltage shift (ΔVth) of the transistors before and after electron beam irradiation depending on Vacc with a 10 minutes exposure time. We also separated the threshold voltage shift (ΔVth) into the effect of oxide trapped charges (ΔVot) and interface traps (ΔVit), where ΔVth = ΔVot + ΔVit, using a technique based on sub-threshold current measurements [2] as shown in Fig. 2. A negative shift in threshold voltage occurred at low Vacc because of the increase of oxide trapped holes (ΔVot) generated by excited plasmons [3]. At high Vacc, however, a positive Vth shift was observed because of an increased contribution of interface trap generation (ΔVit) caused by the deeper electron penetration depth. In addition, interface trap generation degraded the sub-threshold slope because of the lower carrier mobility caused by generated interface traps. Another serious change observed in the electrical characteristics of the transistors after electron beam irradiation was an increase in transistor leakage current. Figure 3 illustrates the comparison between the change in transistor leakage current (ΔITr.off) and drain junction leakage current (ΔIDrain.off) before and after electron beam irradiation at various conditions. From the results, we conclude that ΔITr.off was caused by ΔIDrain.off and was related to the junction characteristic changes. As mentioned above, the electron beam produces interface traps by hole hopping and direct generation of incident electrons. These interface traps behave like generation-recombination (G-R) centers and can enhance carrier G-R rate in the space charge region (SCR) by four processes (electron capture, electron emission, hole capture and hole emission) [4, 5]. Finally, our studies showed that it is critical to avoid electron beam exposure before electrical device characterizations are carried out at the contact level using nano-probe systems even in the range of less than 1.0kV of Vacc because electron beam induced device parameter changes cannot be neglected during failure analysis of sub-10nm devices.

Location and Visualization of Working p-n and/or n-p Junctions by XPS.

X-ray photoelectron spectroscopy (XPS) is used to follow some of the electrical properties of a segmented silicon photodetector, fabricated in a p-n-p configuration, during operation under various biasing configurations. Mapping of the binding energy position of Si2p reveals the shift in the position of the junctions with respect to the polarity of the DC bias applied. Use of squared and triangular shaped wave excitations, while recording XPS data, allows tapping different electrical properties of the device under normal operational conditions, as well as after exposing parts of it to harsh physical and chemical treatments. Unique and chemically specific electrical information can be gained with this noninvasive approach which can be useful especially for localized device characterization and failure analyses.

Failure analysis of power electronic devices and their applications under extreme conditions

Power electronic devices are the core components of modern power converters, not only for normal applications, but also for extreme conditions. Current design of power electronic devices require large redundancies for reliability. This results in huge volume and weight for a large-capacity power converter, especially for some extreme applications. Therefore, to optimize the power density, the reliability of power devices needs to be investigated first in order to obtain the accurate operational margin of a power device. Although much research on device failure analysis has been reported, there still lacks efficient failure evaluation methods. This paper first summarizes the current failure research. Then, a three-step failure analysis method of power electronic devices is proposed as: failure information collection, failure identification and mechanism, and failure evaluation. The physics-based modeling method is emphasized since it has a strong relationship with the device fundamentals. After that, power electronic device applications under extreme conditions are introduced and a design method of device under extreme conditions is proposed based on the thermal equilibrium idea. Finally, the challenges and prospects to improve the power device reliability under extreme conditions are concluded.

Finite-element analysis of NiTi wire deflection during orthodontic levelling treatment

Finite-element analysis is an important product development tool in medical devices industry for design and failure analysis of devices. This tool helps device designers to quickly explore various design options, optimizing specific designs and providing a deeper insight how a device is actually performing. In this study, three-dimensional finite-element models of superelastic nickel-titanium arch wire engaged in a three brackets system were developed. The aim was to measure the effect of binding friction developed on wire-bracket interaction towards the remaining recovery force available for tooth movement. Uniaxial and three brackets bending test were modelled and validated against experimental works. The prediction made by the three brackets bending models shows good agreement with the experimental results.