Electrical Characterization of Electron Beam Induced Damage on Sub-10nm SRAM Using Nano-Probing Technique

Abstract

Nano-probing techniques utilizing scanning electron microscopy (SEM) guidance have been widely employed in evaluation of electrical characteristics of the localized devices in the failure analysis of actual LSI systems [1] because of their high resolution imaging, probing accuracy and high throughput. As CMOS scaling is moving toward the sub-10 nm regime, electron beam induced damage is becoming a more critical issue in performing electrical characterization at the contact level using nano-probe techniques. However, the effects of electron beam induced damage have not been reported for sub-10 nm devices in the range of less than 1.0 kV of electron beam acceleration voltage (Vacc). In this paper, 10 nm design ruled n-channel metal-oxide-semiconductor transistors were prepared in order to investigate how much the transistors were affected by electron beam irradiation as a function of Vacc. Figure 1 illustrates ID - VG transfer characteristics of the transistors before and after electron beam irradiation with a 10 minutes exposure time at low (Vacc = 0.5 kV) and high (Vacc = 1.0 kV) Vacc. After electron beam irradiation, all device parameters shifted including threshold voltage, saturation current, sub-threshold slope and transistor leakage current. We observed different degradation characteristics in threshold voltage depending on Vacc. Figure 2 shows the percentage of threshold voltage shift (ΔVth) of the transistors before and after electron beam irradiation depending on Vacc with a 10 minutes exposure time. We also separated the threshold voltage shift (ΔVth) into the effect of oxide trapped charges (ΔVot) and interface traps (ΔVit), where ΔVth = ΔVot + ΔVit, using a technique based on sub-threshold current measurements [2] as shown in Fig. 2. A negative shift in threshold voltage occurred at low Vacc because of the increase of oxide trapped holes (ΔVot) generated by excited plasmons [3]. At high Vacc, however, a positive Vth shift was observed because of an increased contribution of interface trap generation (ΔVit) caused by the deeper electron penetration depth. In addition, interface trap generation degraded the sub-threshold slope because of the lower carrier mobility caused by generated interface traps. Another serious change observed in the electrical characteristics of the transistors after electron beam irradiation was an increase in transistor leakage current. Figure 3 illustrates the comparison between the change in transistor leakage current (ΔITr.off) and drain junction leakage current (ΔIDrain.off) before and after electron beam irradiation at various conditions. From the results, we conclude that ΔITr.off was caused by ΔIDrain.off and was related to the junction characteristic changes. As mentioned above, the electron beam produces interface traps by hole hopping and direct generation of incident electrons. These interface traps behave like generation-recombination (G-R) centers and can enhance carrier G-R rate in the space charge region (SCR) by four processes (electron capture, electron emission, hole capture and hole emission) [4, 5]. Finally, our studies showed that it is critical to avoid electron beam exposure before electrical device characterizations are carried out at the contact level using nano-probe systems even in the range of less than 1.0kV of Vacc because electron beam induced device parameter changes cannot be neglected during failure analysis of sub-10nm devices.