Capacitance Deviation Research Articles

A Robust High-Quality Current Control With Fast Convergence for Three-Level NPC Converters in Microenergy Systems

Three-level neutral-point-clamped (3L-NPC) power converters are necessary interfaces to form micro-energy systems. Naturally, designing a suitable control scheme, featuring superior dynamics, strong robustness, and simple structure, is a promising solution to guarantee more efficient operation of converter. This paper proposes a robust high-quality current control strategy for the 3L-NPC power converter in the stationary <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\alpha \beta$</tex-math></inline-formula> frame. A super-twisting algorithm coupled with a Luenberger observer current controller is proposed to deal with the poor sinusoidal current tracking issue due to the existing inductance/grid frequency deviations and the disturbance of the sinusoidal dynamic nature. Additionally, an extended sliding mode disturbance observer based proportional control is built to dramatically enhance voltage regulation performance, in the case of capacitance deviations and unknown dc-loads. Experimental data confirm the effectiveness of the proposed solution outperforms the conventional proportional-resonant/-integral control in terms of accurate tracking current/voltage, anti-disturbance, and grid current total harmonic distortion.

Physical relationship between resonant frequency and structure parameters of a normal mode helix dipole antenna for an ultra-high frequency radio frequency identification tag thread

The thread-based ultra-high frequency radio frequency identification (UHF RFID) tag with a normal mode helix dipole antenna (NMHDA) shows great potential in anti-theft and implant wireless sensors; for the engineered and digitized design of the high-performance tag, it is necessary to know the physical relationship between the resonant frequency and structure parameters of the NMHDA. Previous work for the design of the NMHDA structure is based on the self-resonant principle, that is, zero port reactance, while the port impedance of the NMHDA in the UHF RFID tag thread at resonant frequency is ideally conjugate matching to the chip. Under the requirement of conjugate matching, this study built the physical relationship between the resonant frequency and structural parameters of the NMHDA (helical radius, helical pitch, and single arm length) by linking the chip impedance with the NMHDA impedance. Meanwhile, the reported equivalent impedance model of the NMHDA, consisted of a lumped inductor and a linear dipole antenna, was utilized and modified by considering the distributed capacitance deviation from the NMHDA geometry simplification as part of the lumped inductor. Finally, the physical relationship was put into practice for the design of an UHF RFID tag thread with expected resonant frequency, and the long reading range of the prototype (over 14 m) demonstrated the rationality of the modification. In addition, the discussion on the structure parameter of the NMHDA clarified the efficiency of our proposed method. Generally, the built physical relationship explicitly gives the physical effects of the structural parameters and provides a parametric method for the structure design of a NMHDA for the UHF RFID tag thread.

Solution-processed thin film transistors incorporating YSZ gate dielectrics processed at 400 °C

This work investigates a solution process for yttria-stabilized zirconia (YSZ) thin film deposition involving the addition of yttria nanoparticles, at 400 °C, in air. Different yttrium doping levels in the YSZ were studied and a wide range of optical, structural, surface, dielectric, and electronic transport properties were also investigated. An optimum yttrium doping level of 5% mol. resulted in the smoothest films (RRMS ∼ 0.5 nm), a wide bandgap (∼5.96 eV), a dielectric constant in excess of 26, and a leakage current of ∼0.3 nA cm−2 at 2 MV/cm. The solution-processed YSZ films were incorporated as gate dielectrics in thin films transistors with solution-processed In2O3 semiconducting channels. Excellent operational characteristics, such as negligible hysteresis, low operational voltages (5 V), electron mobility in excess of 36 cm2 V−1 s−1, high on/off current modulation ratio on the order of 107, and low interfacial trap density states (&amp;lt;1012 cm−2), were demonstrated. In addition, excellent film homogeneity was achieved over a large area (16 × 16 cm2), with both film thickness and capacitance deviation of &amp;lt;1.2%.

An Improved Submodule Capacitor Voltage Measuring Algorithm for MMC With Reduced Sensors

The nearest level modulation (NLM) based submodule capacitor voltage measuring technology for a modular multilevel converter (MMC) with reduced sensors can effectively reduce the costs of the data acquisition system of MMC and simplify the operation system. One of the technical challenges of this submodule capacitor voltage measuring technology is to reduce the measurement errors of submodule capacitor voltage. This paper proposes an improved submodule capacitor voltage measuring algorithm to overcome this challenge. In the proposed algorithm, by keeping the operation states of submodules unchanged during the continuous control period, the probability of obtaining the actual capacitor voltage is increased, and then the number of corrections of observed capacitor voltage is significantly increased. Thus, the proposed algorithm can effectively reduce the measuring errors. More significantly, the proposed algorithm can also improve the measurement accuracy even in the capacitance deviation situation. Finally, both simulation and experimental results are provided to verify the feasibility and effectiveness of the proposed voltage measuring algorithm.

Analysis of electromechanical properties of electrode for enhancing electrostrictive capacitive sensor response

The choice of electrode’s material, it’s topography like shape, size, and position play a very important role in determination of sensitivity of an electrostrictive capacitive sensor. The electrode material is required to be in mechanical and electrical compliance with the dielectric material for getting optimum performance of the sensor.A mathematical analysis for the estimation of contribution from edge effect has also been carried out for different sizes of electrodes and separation between the electrodes. It has been observed that in capacitive sensors, with gap between electrodes in nanoscale and area of electrodes in millimetres, deviation of capacitance is of the order of 10-3 considering edge leakage as compared to capacitance, measured without considering edge leakage. But in nano range sensors, where both area and gap between electrodes are in nano scale, this deviation is more than 5%, which should not be neglected.

Fringing Field Capacitive Smart Sensor Based on PCB Technology for Measuring Water Content in Paper Pulp

We present a capacitive smart sensor based on printed circuit board (PCB) technology to measure the amount of water content in a paper pulp at the wet end of a paper machine. The developed sensor incorporates in the same PCB the signal processing circuits. It is a handheld portable device, and its output is sent to the reading equipment using a Bluetooth wireless connection, providing to the sensor’s operator ease of mobility around the wet end of a paper machine. The prototype was tested in a laboratory, using a wire mesh to emulate the end of a paper machine, and we were able to measure and easily detect when it reaches the water content in the range of 90% to 92%, as required in the paper fabrication process. Standard deviation of the capacitance measurements at various moisture levels is four orders of magnitude smaller than the mean. The smart sensor was tested in the 20°C to 40°C temperature range, in a paper pulp with a gravimetric water content of 91%. Since the variation of capacitance with temperature is practically linear, we propose a simple linear compensation equation to correct the observed sensitivity with the temperature. To keep the signal processing circuits small, low cost, simple, and robust, a novel direct interface sensor to microcontroller circuit technique was used to make the capacitive measurement, allowing for measuring small capacitance deviations without high-frequency oscillators. It was shown that it is possible to integrate the signal processing circuits in the top layer of the PCB interdigitated sensor without adding noise or degrading the performance of the capacitive sensor.

Development and testing of a three-section pulse-forming network and its application to Marx circuit

AbstractA three-section pulse forming network (PFN) based on Guillemin type-C circuit was developed to meet the challenge of a compact design, high withstand voltage, and high-quality output waveform with fast rise time, flat-top duration, and 100-ns pulse width. A simplified pulse forming circuit was proposed and studied that includes only three LC-sections connected in parallel, with each section containing an inductor and a capacitor connected in series. The effect of the capacitance deviation on the output waveform was investigated. The simulation results show that when the capacitance deviation exceeds +3%, both the flat top and fall time of the output waveform of single PFN module deteriorate greatly. Fortunately, in a multi-stage PFN-Marx circuit, even if the capacitance deviation exceeds +10%, when the average capacitance of the same LC sections is close to the theoretical value, the output waveform maintains a good quality and is in good agreement with the theoretical prediction. The compact three-section PFN developed during this project has a size of only 360 mm × 342 mm × 65 mm, and a maximum withstand voltage of 120 kV. Sixteen PFN stages were assembled to form a Marx generator with design parameters to provide of an output peak power of 12 GW and a maximum peak current of 15 kA. The tested output waveform agrees well with the theoretical results, having a rise time of 31 ns, a flat-top of 104 ns, and a pulse with of 164 ns.

The influence of the network asymmetry on the settings and sensitivity of an earth fault protection using higher harmonics

Detection of high resistance earth faults in medium voltage networks is an important problem due to ineffectiveness of traditional earth fault protections. Such short circuits can be detected by the criterion of a reactive power of higher harmonics for zero sequence current and voltage. The main problem is determination of the power setting value in the protection, which depends on the asymmetry of phase-to-earth capacitances and higher harmonics in supply voltages, which are generated by non-linear loads. The intensive tests of the asymmetry of the zero sequence currents and voltages for harmonics and their reactive power have been carried out in 15 kV compensated network as a function of all relevant parameters, i.e.: maximum capacitance deviation of the network and protected line, percentage content of harmonics in supply voltages, capacitive current of the network and the line. It has been shown that third harmonics of the zero sequence voltage and current are the best suited for practical use, since the asymmetry reactive power of these components is the smallest among the considered harmonics and the protection sensitivity will be the highest.

A Reliable Strong PUF Based on Switched-Capacitor Circuit

This paper presents a highly reliable and invasive-attack-resistant switched-capacitor (SC) strong physical unclonable function (PUF), which can offer an extremely large number of challenge–response pairs. Two symmetrical capacitor arrays that are controlled by challenges are used to realize the strong ability of SC PUF. The mismatch created by the capacitor arrays in real fabrication is sampled by an SC circuit and further amplified by a latch-styled sense amplifier. By covering the entire chip with the metallic transmission lines connected to the sampling capacitor, the PUF can resist invasive attacks. To provide highly reliable responses, a built-in self-test (BIST) strategy is also adopted. A test capacitor is embedded in the PUF circuits to automatically test the capacitance deviation of the SC circuit. Only when the capacitance deviation is large, the output of the PUF is selected for use. The proposed strong SC PUF circuit is fabricated and verified using HJ standard 0.18- $\mu \text{m}$ CMOS process. Measured results show that after using the BIST strategy, the bit error rate is less than $10^{-9}$ when the ratio of the selected responses is 19.6% for the PUF instances in our test.

High-performance flexible all-solid-state supercapacitors based on densely-packed graphene/polypyrrole nanoparticle papers

Graphene-based all-solid-state supercapacitors (ASSSCs) have received increasing attention. It’s a great challenge to fabricate high-performance flexible solid-state supercapacitors with high areal and volumetric energy storage capability, superior electron and ion conductivity, robust mechanical flexibility, as well as long term stability. Herein, we report a facile method to fabricate flexible ASSSCs based on densely-packed reduced graphene oxide (rGO)/polypyrrole nanoparticle (PPy NP) hybrid papers with a sandwich framework, which consists of well-separated and continuously-aligned rGO sheets. The incorporation of PPy NPs not only provides pseudocapacitance but also facilitates the infiltration of gel electrolyte. The assembled ASSSCs possess maximum areal and volumetric specific capacitances of 477mF/cm2 and 94.9F/cm3 at 0.5mA/cm2. They also exhibit little capacitance deviation under different bending states, excellent cycling stability, small leakage current and low self-discharge characteristics. Additionally, the maximum areal and volumetric energy densities of 132.5μWh/cm2 and 26.4mWh/cm3 are achieved, which indicate that this hybrid paper is a promising candidate for high-performance flexible energy storage devices.

Monolithic 3D TSV-based high-voltage, high-temperature capacitors

In this work, high-voltage monolithic 3D capacitors operating at 100V (6 MV/cm) are fabricated by the use of a through silicon-via-based technology. Electric characteristics of the monolithic 3D capacitors exhibit a capacitance density of 17 times larger than that of the planar capacitors with an equal contact area and identical dielectric thicknesses. The impact of the 3D architecture of capacitors on their electrical properties is studied for various patterns and geometries. TSV-based capacitors with a hexagonal arrangement of the holes and 20μm hole diameters exhibit a capacitance deviation of 0.8% at 150°C in accumulation, justifying the capability of TSV-based capacitors to operate even at high-temperatures. Furthermore, a high dielectric-breakdown voltage of 280V (18 MV/cm) was realized using a thick hybrid dielectric stack of SiO2/Si3N4.

Reduced graphene oxide/polypyrrole nanotube papers for flexible all-solid-state supercapacitors with excellent rate capability and high energy density

Pseudocapacitive materials are known to suffer from severe capacitance loss during charging/discharging cycling. Here we report flexible all-solid-state supercapacitors (ASSSCs) based on reduced graphene oxide (rGO)/polypyrrole nanotube (PPy NT) papers prepared by a facile vacuum filtration method. It is revealed that the incorporation of rGO nanosheets can improve the electrochemical stability of PPy NT paper electrodes for pseudocapacitors. The hybrid paper electrode shows a high areal specific capacitance of 807 mF/cm2 at 1 mA/cm2 and a large volumetric specific capacitance of 94.3 F/cm3 at 0.1 A/cm3. The assembled ASSSC possesses a maximum areal specific capacitance of 512 mF/cm2 at 1 mA/cm2 and a maximum volumetric specific capacitance of 59.9 F/cm3 at 0.1 A/cm3. Moreover, it also exhibits excellent rate capability (86.3% capacitance retention from 1 to 10 mA/cm2) and cycling stability, little capacitance deviation under different bending states, a small leakage current and a low self-discharge characteristic. The device can provide an areal energy density of 61.4 μWh/cm2 at 10 mW/cm2 and a volumetric energy density of 7.18 mWh/cm3 at 1.17 W/cm3, indicating this high-performance ASSSC is a promising candidate for flexible high-power supply devices.

Colossal permittivity and dielectric relaxations in BaTi0.99(Nb0.5Ga0.5)0.02O3 ceramics

Dielectric properties of pure phase BaTi0.99(Nb0.5Ga0.5)0.02O3 ceramics, prepared via a conventional solid-state method, have been studied in the frequency range 0.01Hz–10MHz, at temperatures −130°C to 200°C. Colossal dielectric constant, εr~2×105, and low dielectric loss, tanδ~0.05 at 1kHz have been obtained. The permittivity showed weak frequency dependency in a broad range of frequency from 1Hz to 30kHz and less than ±20% capacitance deviation over the temperature range from 243 to 358K. The AC impedance spectroscopy analysis indicated three relaxation mechanisms, the electrode interfacial polarization, internal barrier layer capacitor effect and hopping polaron polarization contributed to the colossal dielectric constant.

Effect of Dielectric Charging on Capacitance Change of an SOI Based CMUT

Effect of dielectric charging on the performance of SOI based Capacitive Micromachined Ultrasonic Transducers (CMUT) has been investigated. Measurements on an SOI based CMUT show that that the capacitance change as a function of DC bias is considerably higher than analytically calculated values. Investigation shows that this deviation in capacitance from analytically calculated values is due to the combined effects of different dielectric charging phenomena due to a strong electric field, trap charges in the SOI oxide layer, the charge motion associated with the leakage current through the buried oxide layer, and the air in the CMUT cavity. Additionally, this charging effect degrades the transduction efficiency as the induced polarization reduced the effective bias across the CMUT. It is concluded that the buried oxide (BOX) layers in SOI wafers are not suitable for use as dielectric spacers in electrostatic MEMS devices. Keywords: Capacitance, CMUT, dielectric charging, leakage current, MEMS, microfabrication, SOI.

Fe dopants enhancing ethanol sensitivity of ZnO thin film deposited by RF magnetron sputtering

Pure and 5 % Fe-doped ZnO thin films (TFs) have been successfully deposited on Al2O3 substrate from pre-doped target material by RF magnetron sputtering technique. X-ray diffraction (XRD) patterns confirm the formation of both films in single phase wurtzite structure without any extra impurity peak. The calculated average crystallite sizes are found to be 22 and 17 nm for pure and Fe-doped ZnO TFs, respectively. The broadening in XRD peaks of Fe-doped ZnO TF occurs due to decrease in crystallite size and increase in lattice strain. Field emission scanning electron microscopy images exhibit that the particles growth in Fe-doped ZnO TF is more uniform and smaller than pure ZnO. Energy dispersive X-ray spectroscopy and Fourier transform infrared spectroscopy results confirm the existence of Fe dopants into ZnO matrix. The doping effect enhances the sensitivity of ZnO sensor almost three times for ethanol gas sensing, the improvement in the response time and recovery time is noticeable as the size reduction effect increases the surface to volume ratio, and resulting more numbers of ethanol gas molecules are adsorbed to produce a higher concentration of oxygen ions which leads a larger deviation in capacitance.

저전압 UHF TV 튜너용 바렉터 다이오드의 제작 및 특성

The width of depletion region in a varactor diode can be modulated by varying a reverse bias voltage. Thus, the preferred characteristics of depletion capacitance can obtained by the change in the width of depletion region so that it can select only the desirable frequencies. In this paper, the TV tuner varactor diode fabricated by hyper-abrupt profile control technique is presented. This diode can be operated within 3.3 V of driving voltage with capability of UHF band tuning. To form the hyperabrupt profile, firstly, p+ high concentration shallow junction with <TEX>$0.2{\mu}m$</TEX> of junction depth and <TEX>$1E+20ions/cm^3$</TEX> of surface concentration was formed using <TEX>$BF_2$</TEX> implantation source. Simulation results optimized important factors such as epitaxial thickness and dose quality, diffusion time of n+ layer. To form steep hyper-abrupt profile, Formed n+ profile implanted the <TEX>$PH_3$</TEX> source at Si(100) n-type epitaxial layer that has resistivity of <TEX>$1.4{\Omega}cm$</TEX> and thickness of <TEX>$2.4{\mu}m$</TEX> using p+ high concentration Shallow junction. Aluminum containing to 1% of Si was used as a electrode metal. Area of electrode was <TEX>$30,200{\mu}m^2$</TEX>. The C-V and Q-V electric characteristics were investigated by using impedance Analyzer (HP4291B). By controlling of concentration profile by n+ dosage at p+ high concentration shallow junction, the device with maximum <TEX>$L_F$</TEX> at -1.5 V and 21.5~3.47 pF at 0.3~3.3 V was fabricated. We got the appropriate device in driving voltage 3.3 V having hyper-abrupt junction that profile order (m factor) is about -3/2. The deviation of capacitance by hyper-abrupt junction with C0.3 V of initial capacitance is due to the deviation of thermal process, ion implantation and diffusion. The deviation of initial capacitance at 0.3 V can be reduced by control of thermal process tolerance using RTP on wafer.

Changes of calcium channel characteristics and its relationship with pancreatic islet β cell parasecretion in rat born small for gestational age

Method The animal model of small for gestation in rat was made under matemal calorie restriction by 50% from d1 of gestation until term, while the control groups named AGA rats, were obtained from normal pregnant rats. Both of SGA and AGA newborn rats were fed normally till 4 weeks and 8 weeks. Single islet b cell isolation and pancreatic tissue-slice technique were used to obtain b cells in neonatal rats and adult rats, respectively. Using whole cell patch clamp to record the characteristics of b cell voltage dependent calcium channel (such as current, reversal potential, I-V curve, activation curve, inactivation curve) in both SGA and AGA groups. Using capacitance measurement induced by a sequence of sine wave stimulus to reflect the insu lin secretion. In aw ord, study the tendency of calcium channel kinetics and secretion property by timing. Results The membrane capacitance of SGA was smaller than AGA rat after excluding the influence of whole cell membrane capacitance deviation both in neonatal rats, 4 weeks and 8 weeks (P 0.05). The same result was obtained in activation curve and inactivation curve of calcium channel, whose half activated voltage/ half inactivated voltage V1/2 and slope factor k between SGA and AGA both showed no significant difference (P>0.05) ; 2) adult rats: there was no statistical difference found in all average calcium current density (Id), including the total calcium, L-type and T-type. No significant difference was observed in the peak current density of I-V curve in SGA and AGA (P>0.05). However, the reversal potential in SGA group was much lower than control (P<0.05). The two group had the same shape of activation curve and inactivation curve of calcium channel, and 50% activated voltage between SGA and AGA had no significant difference, but the calcium channel of SGA was easily to be closed, the inactivated voltage in SGA group was much higher than control (P<0.01). Conclusion The effect of intrauterine malnourishment on pancreatic isletbcell last in postnatal life and the destroy of bcell tends to aggravate with time. Low calcium current density on b cell membrane devotes to the decrease of b cell secretion in SGA neonatal rat. However, the current of calcium channel returns to normal level in childhood. The kinetics of calcium channel is changed significantly,

Study on Predicting the Deformed Membranes Based on Silicon Nitride Materials with New Deflection Functions for Calculating the Capacitance of Circular Diaphragm CMUTs

A new idea is presented which develops a general model predicting the deflection profile of clamped circular diaphragm of Capacitive Micromachined Ultrasonic Transducers (CMUTs) in order to calculate its capacitance. The CMUTs we consider is made of silicon nitride material which is widely used because of its low intrinsic stress. And the general model proposed in this paper is highly accurate in predicting the deformed membranes and exhibits excellent agreement with 3D-FEA results in capacitance deviation less than 1%. These new established deflection functions can be used to implement a much higher accurate design methodology for CMUTs and other MEMS-based capacitive type sensors built with circular diaphragm.

Observation of non-linear biomass–capacitance correlations: Reasons and implications for bioprocess control

Electrical capacitance has been discussed as a real time measure for living biomass concentration in technical bioreactors such as brewery (fermentation) tanks. Commonly, a linear correlation between biomass concentration and capacitance is assumed. While following the growth and subsequent lipid formation of the yeast Arxula adeninivorans we observed non-linearity between biomass concentration and capacitance. Capacitance deviation from linearity coincided with incipient lipid formation and depended on the intracellular lipid content. As the extent of deviation between capacitance and biomass concentration was proportional to the lipid concentration, it was considered as a quantitative measure of intracellular product formation. The correlation between shifts in dielectric relaxation (summarized as characteristic frequency of the Cole–Cole equation) and lipid content could not be explained by interfacial polarization on the lipid droplets alone. However, the parameters of the Cole–Cole equation were found to be a clear indicator for different phases of growth and lipid production. Integrating all results in a redundancy analysis (RDA), we were able to accurately describe the formation of cellular lipid inclusions. Our measurements are thus potentially valuable as components of future bioprocess control strategies targeting intracellular products such as proteins or biopolyesters.

Measurement of solar cell ac parameters using the time domain technique

The instrumentation to measure solar cell ac parameters [cell capacitance (CP) and cell resistance (RP)] using the time domain technique is developed. The cell capacitance (CP) and series resistance (r) are calculated using open circuit voltage decay (OCVD) technique. It is calibrated with the help of an electrical network with passive components similar to ac equivalent circuit of a solar cell consisting of precision resistors and capacitors. The maximum error observed in the measurement of resistor and capacitor value is ±3.5%. The cell resistance (RP) is calculated from I–V characteristics of solar cell. The data obtained in time domain technique is compared with the impedance spectroscopy technique data measured on same solar cell and it is found that the deviation in cell capacitance and resistance are within ±8%.