Design Of Logic Gates Research Articles

Improvement in the Performance of III-V Channel Based Ultra-Thin Junction-Less-Hybrid CMOS Circuits with Mixed Mode Analysis

The logic performance of a hybrid complementary-metal-oxide-semiconductor (CMOS) circuit based on a novel technology known as a junctionless transistor constructed with high-K and III-V compound material Junction-Less-Double-Gate MOSFET (JL-DG-MOSFET) for ultra-low power applications is analyzed in this manuscript. The mentioned CMOS circuit is constructed by using a Ge-based P-MOS and GaAs-based N-MOS to analyze different performance metrics of inverter such as noise margin (NM), voltage transfer characteristics, transient response, gain, frequency response, and propagation delay using Mixed Mode Analysis. The aforementioned characteristics of the proposed inverter are analyzed and compared with the Si-based CMOS inverter and we observed that the proposed structure shows an improved circuit performance over the Si-based CMOS circuit. Consequently, the work is also extended to the design and performance of universal logic gates. The aforementioned N-MOS structure has a higher drive current of 1.3 mA, gm of 5.9 mS, gd of 20.8 mS, SS of 64 mV Decade−1, and DIBL of 23 mV V−1, whereas the Ge based P-MOS structure yields drive current of 0.7 mA, gm of 1.5 mS, gd of 5.6 mS, SS of 95 mV Decade−1, and DIBL of 21 mV V−1. The hybrid C-MOS structure has higher unity-gain bandwidth of 1100 GHz and lower propagation delay of 3.1 ps, as well as static and dynamic power dissipation of 1.86 nw and 0.23 mw.

Design of logic gates using reversible gates with reduced quantum cost

Reversible logic is also called information lossless logic, since the information embedded in the circuits can be recovered, if lost. Research carried out by Landauer and Bennett proved that the energy dissipation would not occur if computation is made reversible. With this aim a number of reversible gates were designed and invented. As examples like- the Fredkin gate, the Toffoli gate, the Peres gate, and the Feynman gate. Reversible logic has extensive applications and is considered as one of the futuristic technologies. But the logic circuit designing is based on logic gates, which are non-reversible. This paper presents design of logic gates using reversible gates. These logic gates help in future implementation of higher end circuits. In this paper an attempt is made to design logic gates using reversible gates and some of the higher end circuits are also designed such as Binary-to-Grey, grey-to-Binary, Adder, Subtractor etc.

Design and numerical analysis of multifunctional photonic crystal logic gates

All-optical multifunctional structures are at the beginning of the growth and development path to achieve an all-optical integrated circuit (AOIC). The main challenge of designing multifunctional all-optical nanostructures is to maintain the overall function of the structure compared to single-function nanostructures. Simultaneous application of logic gates of AND, XOR, half-adder, 1-bit comparator, reversible Feynman logic gate along with desirable and suitable function are some of the proposed nanostructure properties. The propagation modes in the structure are extracted by the plane wave expansion (PWE) method. The overall operation of the nanostructure, simulation, and numerical analysis of the proposed nanostructure for the submitted applications are performed using the numerical method finite-difference time-domain (FDTD). In the proposed multifunctional nanostructure, ultra-fast and ultra-compact logic gates with a maximum time delay of approximately 280 fs, an area of 104 μm2, and a bit rate of 3.57 Tb/s are provided. In addition to the proposed ultra-compact logic gate, another advantage of the proposed multifunctional nanostructure is achieving the appropriate contrast ratio.

Design and Realization of Logic Gates or Functions Using Vertical TEFT Structures

Design and Realization of Logic Gates or Functions Using Vertical TEFT Structures

Cascadable direct current driven skyrmion logic inverter gate

Nanoscale skyrmions enable ultralow-power nonvolatile logic gate designs due to their current-driven motion and topological protection. A key building block in skyrmion-based digital spintronics is the logic inverter (not) gate. Despite recent computational and practical demonstrations, a skyrmion-based low-power, wideband, and cascadable inverter gate is still a long way off. For skyrmion-based logic circuits, a systematic design and analysis of an inverter gate is essential. Here we present a skyrmion logic inverter design and analyze its full operation using micromagnetic modeling. Because of the substrate thermal conductivity, our investigations reveal that the all-metallic inverter gate can function with direct current drive, wide bandwidth, submicron footprint, no or low external magnetic field, cascadability, and with room-temperature thermal stability despite Joule heating. Using magnetic insulators for eliminating Joule heating and lowering the exchange stiffness, magnetic moment and other factors might further assist in reducing power consumption by more than four orders of magnitude.

Electro-Optic Hybrid Logic Gate Derived from a Silicon-Based Hybrid Surface Plasmon Polariton Waveguide

Electro-optic hybrid computing is a key research topic in high-performance computing. AND, OR and NON are the most basic computing units. Logic units, which are composed of a Mach Zehnder interferometer (MZI) and a micro ring resonator (MRR), have the issues of large size and poor thermal stability. To solve these problems, this paper discusses the design of AND, OR and NON basic logic units in compact electro-optic logics based on the principle of silicon-based hybrid surface plasmon polariton waveguides. By optimizing the parameters with the Finite Difference-Time Domain (FDTD), the simulation results show that the maximum insertion loss (IL) of the AND, OR and NON logic units is 5.1 dB, and the extinction ratio (ER) is at least 14.3 dB. The experimental simulation results provide a theoretical basis for the design of an electro-optic logic gate derived from a silicon-based hybrid surface plasmon polariton waveguide.

Design and analysis of an all-optical NAND logic gate using a photonic crystal semiconductor optical amplifier based on the Mach–Zehnder interferometer structure

In this study, a high-speed all-optical NAND logic gate (AO-NAND-LG) was designed and numerically simulated. The simulation was performed using the photonic crystal-semiconductor optical amplifier (PC-SOA) structure based on the Mach–Zehnder interferometer and nonlinear cross-phase modulation mechanism. The input optical pulse sequence used in the design was the return-to-zero type. Moreover, two PC-SOAs were utilized in the design of the NAND-LG. The rate and propagation equations were solved using the finite difference method. The optimal mode was achieved for NAND-LG with an energy value of 2.2 fJ for input pulse trains A and B, and an injection current of 1 mA at a bit rate of 80 Gbps. Furthermore, the impacts of the pattern effect, conversion efficiency, extinction ratio, and gain recovery on the design of the AO-NAND-LG were analyzed for the first time in simulations to enhance the performance and efficiency of the PC-SOA. Furthermore, the results demonstrated that the PC-SOA exhibited better logical performance than the ordinary SOA, and it is a suitable candidate for integrated optical circuits because it is much shorter than the SOA.

A thymine-based molecular structure to design logic gates and memory devices

A thymine-based molecular structure to design logic gates and memory devices

Design and simulation of the all-optical XOR logic gate by XPM mechanism using photonic crystal semiconductor optical amplifier based on Mach–Zehnder interferometer

In the presented structure, the performance of the all-optical XOR logic gate (AO-XOR-LG) is investigated. The XOR-LG is designed and simulated using a photonic crystal semiconductor optical amplifier (PC-SOA) based on Mach–Zehnder interferometer (MZI) and cross-phase modulation (XPM) nonlinear mechanism. The input optical pulse train used in this simulation is the type of RZ (Return-to-Zero). The finite difference method (FDM) has been used to solve the rate and propagation equations. The effect of input signal energy, bias current, and group refractive index on the output signal and gain of the XOR-LG is studied. The optimal mode is obtained for the XOR-LG with a bit rate of 80 Gbps. Furthermore, for the first time, the effects of quality factor (QF), conversion efficiency (CE), extinction ratio (ER), pattern effect (PE), and gain recovery are simultaneously analyzed in the simulation to increase PC-SOA performance. According to the results, PC-SOA has a more reasonable logic performance than conventional SOA, and due to its much shorter length than SOA, it can be a much better choice for integrated optical circuits.

Tacticity-based one-dimensional chiral equilateral lattice for tailored wave propagation and design of elastic wave logic gate

Periodic lattices have unusual physical and mechanical properties that can be used to control elastic wave propagation and design smart wave devices. In this study, a lattice design strategy is proposed that considers chirality and tacticity to realize a low-frequency band gap. The design of elastic wave logic gates is also investigated. In the designed lattices, the tacticity greatly affects the torsional deformation of the middle regular polygon, resulting in significant differences in the dynamic properties of the chiral equilateral lattice. These differences can be used to tune the band gap by choosing appropriate structural parameters. When the chiral equilateral lattices have the same slenderness ratio, as the number of edges increases, band gaps in the same frequency range appear in the syndiotactic lattices. Finally, experiments are conducted to verify the vibration transmission performance. In addition, the design of elastic wave logic gates for the control and isolation of vibrations is analyzed by implementing the tacticity of the chiral equilateral lattices.

Innovation Quinary and n‐Value toward Fuzzy Logic QCA Cell Design

AbstractQuantum Cellular automata (QCA) is a technology developed to replace complementary metal‐oxide‐semiconductor (CMOS) technology that faces increasing challenges due to the miniaturization of CMOS dimensions. The use of multi‐valued QCA is of interest because of its proximity to fuzzy logic, and lower power consumption. A two‐layer quinary system is proposed and the basic logic gates are examined and simulated to confirm the correct performance of the proposed cell. The proposed cell employs two layers because the presence of more than two particles per layer destabilizes the design of logic gates. The proposed Quinary QCA(QuQCA) cell can be implemented in one layer using input and output derives. Simple relationships are proposed to calculate the polarization values and the number and type of layers, so complex quantum computations can be avoided. The quantum power consumption and the proposed cell power consumption of the quinary system are calculated and compared. Finally, we present n‐valued cells without using quantum computation, and these cells are examined in terms of the number of particles, polarization value, and cell structure. The n‐level cell can be investigated more easily than other technologies due to its proximity to fuzzy logic and the design of the input, output, and fuzzy membership function.

Fluorene based fluorescent and colorimetric chemosensors for selective detection of cyanide ions in aqueous medium and application of logic gate

Rising detrimental effects of cyanide due to its frequent large-scale utilization demand rapid and sensitive detection of cyanide ions. Herein, two new fluorene based chemosensors 1 and 2 have been developed through the Suzuki–Miyaura coupling reaction for fluorescence enhancement based selective detection of cyanide with sensitivity levels down to 0.2 ppb and 0.4 ppb, respectively. The plausible sensing mechanism is based on Michael type adduct formation due to the reaction of cyanide with chemosensors and was confirmed by 1H NMR titration, Job’s plot, dynamic light scattering (DLS), and density functional theory (DFT) calculations. Chemosensors 1 and 2 showed excellent linear response towards CN¯ ions (0–100 nM) in the Benesi–Hildebrand plot with association constants (Ka) 1.61 × 106 and 7.1 × 105 M¯1, respectively that corresponds to their favorable chemical reaction. Excellent selectivity of chemosensors for cyanide in the presence of other interferences was investigated through fluorescence emission, UV–Visible, and DFT analysis. Surprisingly, an immediate reversible colorimetric change upon alternate shaking and steadiness of chemosensor − CN¯ solution was noticed indicating that chemosensors can act as promising recyclable sensors for colorimetric on-site detection of CN¯. Meanwhile, chemosensors 1 and 2 displayed highly selective colorimetric detection of CN¯ under daylight and UV radiations (365 nm). Further, cyanide responsive test kits were fabricated that provided a low-cost and portable method for on-site detection of CN¯ ions in an aqueous medium. Finally, chemosensors were successfully applied for designing logic gates, and detection of cyanide in industrial waste and food samples.

Photonic-crystal-based design and FDTD simulation of all-optical NAND and NOR gates with improved contrast ratio

The proposed research reports the simulation of a photonic crystal (PhC) ring-resonator-based full-optical NAND and NOR gate design. The designed structure comprises a 18 × 30 square lattice dielectric silicon rod-type PhC with a refractive index of n = 3.46. An interatomic distance ‘a’ of 560 nm, radius ‘r’ of 0.21a (0.133 μm) and input wavelength λ = 1550 nm with an input signal amplitude of 1 volt are used in this design. The proposed structure provides two large band gaps in Transverse Electric polarized mode in the ranges of 1342–1980 nm and 758–779 nm. Similar parameters are used for both NAND and NOR logic gate designs. The functionality of the proposed full-optical gates depends on the ring resonator principle and the intensity of the incident light. Numerical analysis of the simulation is based on the finite difference time domain method, whereas band gap analysis is performed using the plane wave expansion method.

Development of gold nanoparticles-aptamer nanocomposite for multiplexed analysis of antibiotics and design of molecular logic gates

The widespread use of antibiotics caused severe problems of antibiotic residues in foodstuffs and water, posing a serious threat to public health and thus urging the development of sensitive, selective, and rapid detection methods for antibiotics. In this study, a fluorescence resonance energy transfer (FRET)-based system is developed for the multiplexed analysis of chloramphenicol (CAP) and streptomycin (Strep) with detection limits of 2.51 and 8.69 μg l−1, respectively. The FRET-based system consists of Cy3-tagged anti-CAP aptamer-conjugated gold nanoparticles (AuNPs) (referred to as AuNPs-AptCAP) and Cy5-tagged anti-Strep aptamer-conjugated AuNPs (referred to as AuNPs-AptStrep). In addition, AuNPs-AptCAP and AuNPs-AptStrep have been demonstrated to serve as signal transducers for implementing a series of logic operations such as YES, NOT, INH, OR, (2-4)-Decoder and even more complicated multi-level logic gates (OR-INH). Based on the outputs of logic operations, it could be figured out whether targeted analytes were present or not, thus enabling multiplex sensing and evaluation of pollution status. This proof of concept study might provide a new route for the enhanced sensing performance to distinguish different pollution status as well as the design of molecular mimics of logic elements to demonstrate better applicability.

Photochromism of dye containing Schiff base-metal complex: A revisit through spectro-kinetic, thermodynamic and theoretical analyses for the design of a molecular logic gate

Photochromic compounds attract tremendous necessity because of their dynamic skill for optical memory media, photo-printing and UV-sensor, ophthalmic and sunglass lenses, and most importantly molecular logic gates. Here, a novel photochromic material based on a dye containing Schiff base-metal complex has been designed and developed. The metal coordination of photochromic ligand gives a unique and potentially glorious photo-physical property. In dark, the material displays no absorption band (Turn-OFF) above 500 nm, but exhibits chelation-enhanced intense green fluorescence (Turn-ON) (λex = 365 nm, λemi = 501 nm). Upon UV irradiation, the material shows strong absorption band [λmax = 554 nm] (Turn-ON) but FRET leads to weak emission (Turn-OFF) in THF solution. The interesting ‘ON-OFF’ behavior encourages the development of UV light controlled molecular logic gate. The material displays moderate quantum yield (0.082), excellent fatigue resistance (>5 cycles) and solvent polarity dependent photochromism. The designed d10-metal (Zn) guided photochromism is understood in the light of spectro-kinetic, thermodynamic and theoretical analyses. The analyses establish that the keto-enol tautomerism through zinc metal guided excited-state intramolecular proton transfer (MG-ESIPT) is the key factor for the photochromism under study. The forward reaction (enol to keto i.e., greenish yellow to pink) is the temperature independent metal promoted UV light induced phenomenon, but the backward reaction is strongly temperature dependent one. The backward reaction follows 1st order kinetic with activation energy of 53.16 kJ/mol or 12.71 kcal/mol (spectro-kinetic data). The photochromism understudy is basically photo-thermal reversible process (PTRP) (thermodynamic study). The theoretical analyses [DFT, TS, PES, and FMO] provide a deep insight into the mechanistic understanding of the photochromic process.

Design of basic logic gates using optical threshold logic

Threshold Logic Gate (TLG) is a potential alternative of Boolean Logic circuit. It is one of the fundamental components of neural network. An Optical Threshold Logic Gate (OTLG) has been designed in this paper, using a reflector telescopic system and a resonant Fabry-Perot cavity. Threshold logic gate consists of a weighted summing unit followed by a comparator. In the proposed OTLG, the weight of the input signal is varied using a polarizer-analyser combination. The threshold value, which is the reference of the comparator, is applied into the Fabry–Perot cavity with the help of a Beam splitter . AND, OR and NOT gates are implemented by setting the threshold values of the proposed OTLG.The system has been modelled analytically and studied using MATLAB and FINESSE. The simulation results for OTLG based Basic Gates are presented here.

Novel amphiphilic fluorine-containing nanocarriers for oxygen self-sufficiency “AND” GSH depletion sequentially to enhance photodynamic therapy

In order to maximize the retention of the photodynamic therapy (PDT) efficacy, while avoiding the dilemma of hypoxia and high reducing substances in tumor tissue, fluoropolymers were synthesized in a simple and effective methods. Fluorous effect with good oxygen carrying capacity was endowed by the fluorine-containing section in fluoropolymers and the perfluorodecalin (PFD) together, the reaction site with GSH was provided by the disulfide bond, which enhanced PDT efficiency through the sequential “AND” logic gate design. Two kind of fluorine-containing nanocarriers (M-Ce6 and E-Ce6) were obtained by solvent evaporation or ultrasound emulsification with PFD, respectively. In vitro, both of them showed promising high ROS generation under photoirradiation. Benefiting by cavitation effects, E-Ce6 had a more significant statistical difference in cellular uptake. Furthermore, the cells incubating with E-Ce6 hardly were noticed that the hypoxia signal appeared under hypoxia, while reducing the intracellular GSH content by more than 15%. Through the sequential “AND” logic gate design, ROS production even under hypoxia and GSH conditions of E-Ce6 was also almost 1.5 times that of Ce6 under normoxia. Enhancing effect of E-Ce6 was 13.47 times and 6.85 times, while selectivity ratio reached 5.13 times and 4.81 times compared with Ce6 and M-Ce6. The two-pronged strategy showed a high potential for delivering the Ce6 to deep inside of cancer cells and killing it in the simulated tumor by PDT. These above results demonstrated the potential of E-Ce6, as oxygen self-sufficiency and GSH depletion nanocarriers for combined enhancement of photodynamic therapy.

Design and Simulation of Innovative QCA Quaternary Logic Gates

AbstractThis paper proposes a new cell configuration for quaternary Quantum Cellular Automata (QQCA) based on the calculation of polarization. The proposed QQCA cell is based on a three‐particle system that creates instability within a cell in the gate design. Therefore, a single‐particle system or binary QCA (bQCA) technology and a two‐particle system or Ternary QCA (TQCA) technology have been used to implement quaternary logic. The proposed cell can be implemented in two layers or in one, using input and output drives. According to the dimensions of the proposed model for QQCA and simulation of basic gates, designing with this cell is quite optimal; it requires five cells in the design of the AND and OR gates and two cells in the design of the NOT gate. Based on the number of cells used in the basic gates, the total area in the AND and OR gates is 576 × 10−6 µm2 and in the NOT gate is 276 × 10−6 µm2. The base gates are fully optimized and latency is equal to 0.25 clockcycle or 0.25 × 10−12s, which is reduced in comparison with prior works. Also, the power consumption of a cell in terms of quantum calculation and the proposed model is also investigated.

CNTFET-based design of ternary logic gates with interchangeable standard positive and negative ternary output

This paper presents a novel CNTFET based design of ternary logics gates where all three ternary logics including standard, positive and negative ternary logic (ST, PT and NT) outputs for each gate are obtained from one structure and are interchangeable through some control inputs. Ternary logic overpowers the conventional binary logic in simplicity and energy efficiency as it reduces number of interconnects and chip area. In this paper design of ternary inverter, buffer, NAND, AND, NOR, OR, XOR and XNOR gates are presented where a unique feature of conversion between ST, PT, NT logic through a single output is being introduced. Besides a single logic gate is designed for a particular logic function and its complement combining both ternary and binary logic gate design technique. The proposed designs utilize the unique property of CNTFET, such as assigning the required threshold voltage value of the FET by changing the diameter of the carbon nanotube (CNT) through its chiral vector values which is very useful in designing multiple- valued logic (here ternary logic). The proposed circuits are simulated using Synopsys HSPICE with 32 nm CNTFET model provided by Stanford University and in each case average power values and propagation delays are duly noted. The effects of variation in some process parameters like channel length, dielectric oxide thickness and number of carbon nanotubes also have been discussed.

Hybrid memristor-CMOS implementation of logic gates design using LTSpice

In this paper, a hybrid memristor-CMOS implementation of logic gates simulated using LTSpice. Memristors' implementation in computer architecture designs explored in various design structures proposed by researchers from all around the world. However, all prior designs have some drawbacks in terms of applicability, scalability, and performance. In this research, logic gates design based on the hybrid memristor-CMOS structure presented. 2-inputs AND, OR, NAND, NOR, XOR, and XNOR are demonstrated with minimum components requirements. In addition, a 1-bit full adder circuit with high performance and low area consumption is also proposed. The proposed full adder only consists of 4 memristors and 7 CMOS transistors. Half design of the adder base on the memristor component created. Through analysis and simulations, the memristor implementation on designing logic gates using memristor-CMOS structure demonstrated using the generalized metastable switch memristor (MSS) model and LTSpice. In conclusion, the proposed approach improves speed and require less area.