Design Of Front-end Electronics Research Articles

Design and characterization of multichannel front-end electronics for detectors at HIRFL and HIAF

A multichannel front-end readout electronics (MFEE) has been designed for readout in detectors in the heavy ion facility in Lanzhou (HIRFL) and the high-intensity heavy-ion accelerator facility (HIAF). With 40 different adjustable gains, this MFEE can meet the need for most of the experiment. One MFEE can read and process the output signals of 128 channels of a detector at the same time. MFEE is based on the AD8488 chip and uses Xilinx Kintex 7 series FPGA, combined with the periphery circuits design, to complete the detector's output charge signal readout. This paper will discuss the design and performance of the MFEE.

Design and development of multi-channel front end electronics based on dual-polarity charge-to-digital converter for SiPM detector applications

Design and development of multi-channel front end electronics based on dual-polarity charge-to-digital converter for SiPM detector applications

New Beam Position Detectors for NA61/SHINE experiment

The NA61/SHINE experiment at the CERN SPS is undergoing a major upgrade during the CERN Long Shutdown 2 period (2019-2021). The upgrade is essential to fulfill the requirements of the new open charm and neutrino programs. In these programs the NA61/SHINE will operate with the data acquisition rate increased by a factor of 10, which requires an upgrade of current Beam Position Detectors (BPDs). New detectors should monitor beam particle positions with a frequency up to 105 Hz.This paper presents an overview of the new BPD design, as well as discusses current state of development and prototype production of BPD, including: mechanical design, front-end electronics design and integration with experiment’s data aquisition system.

Readout electronics for the CMS Phase II Endcap Calorimeter: system overview and prototyping experience

The frontend readout system for the silicon section of the CMS Phase II Endcap Calorimeter faces unique challenges due to the high channel count and associated bandwidth, limited physical space, as well as radiation tolerance requirements. I will give an overview of the frontend electronics design and will discuss the recent experience obtained from the first test system that integrates the HGCROC2 readout ASIC, lpGBT, and VTRX+ in a realistic manner, linking together prototypes of the hexaboard, engine, and wagon boards.

Design of front-end electronics for HXI spectrometer flight model on-board ASO-S satellite

Advanced Space-based Solar Observatory (ASO-S), developed by Chinese Academy of Sciences, is utilized for observing the solar magnetic field, coronal mass ejection, and solar flare, as well as studying the relationships among them. As one of the three scientific payloads on ASO-S, Hard X-ray Imager (HXI) is designed for solar hard X-ray imaging with outstanding temporal and spatial resolutions. The spectrometer is an important part of HXI and used to measure the incident photon with a dynamic range of 30–200 keV after Fourier modulation by the collimator. It consists of 99 detector units and front-end electronics (FEE). The FEE can process all the 99 detector units' signals independently in less than 2 μs. The noise of charge measure is less than 500 fC for a dynamic range of 20 pC–900 pC. In this paper, the implementation of FEE is introduced, including the design of electronics, quality control, and performance tests. All these tests show that the FEE can meet the HXI mission requirements.

Neural network-featured timing systems for radiation detectors: performance evaluation based on bound analysis

Waveform sampling systems are used pervasively in the design of front end electronics for radiation detection. The introduction of new feature extraction algorithms (eg. neural networks) to waveform sampling has the great potential to substantially improve the performance and enrich the capability. To analyze the limits of such algorithms and thus illuminate the direction of resolution optimization, in this paper we systematically simulate the detection procedure of contemporary radiation detectors with an emphasis on pulse timing. Neural networks and variants of constant fraction discrimination are studied in a wide range of analog channel frequency and noise level. Furthermore, we propose an estimation of multivariate Cramér Rao lower bound within the model using intrinsic-extrinsic parametrization and prior information. Two case studies (single photon detection and shashlik-type calorimeter) verify the reliability of the proposed method and show it works as a useful guideline when assessing the abilities of various feature extraction algorithms.

Design of front-end electronics based on a programmable transimpedance amplifier for an HIAF beam intensity detector

Design of front-end electronics based on a programmable transimpedance amplifier for an HIAF beam intensity detector

The upgrade of the ALICE TPC with GEMs and continuous readout

The upgrade of the ALICE TPC will allow the experiment to cope with the high interaction rates foreseen for the forthcoming Run 3 and Run 4 at the CERN LHC. In this article, we describe the design of new readout chambers and front-end electronics, which are driven by the goals of the experiment. Gas Electron Multiplier (GEM) detectors arranged in stacks containing four GEMs each, and continuous readout electronics based on the SAMPA chip, an ALICE development, are replacing the previous elements. The construction of these new elements, together with their associated quality control procedures, is explained in detail. Finally, the readout chamber and front-end electronics cards replacement, together with the commissioning of the detector prior to installation in the experimental cavern, are presented. After a nine-year period of R&D, construction, and assembly, the upgrade of the TPC was completed in 2020.

Design and construction of MuTe: a hybrid Muon Telescope to study Colombian volcanoes

We present a hybrid Muon Telescope, MuTe, designed and built for imaging active Colombian volcanoes. The MuTe has a resolution of tens of meters, low power consumption, robustness and transportability making it suitable for using in difficult access zones where active volcanoes usually are. The main feature of MuTe is the implementation of a hybrid detection technique combining two scintillation panels for particle tracking and a Water Cherenkov Detector for filtering background signals due to the electromagnetic component of extended air showers and multiple particle events. MuTe incorporates particle-identification techniques for reducing the background noise sources and a discrimination of fake events by a picosecond Time-of-Flight system. We also describe the mechanical behavior of the MuTe during typical tremors and wind conditions at the observation place, as well as the frontend electronics design and power consumption.

Diamond Detectors for Timing Measurements in High Energy Physics

Timing detectors are a well established part of High Energy Physics experimental instrumentation. The choice of sensors with fast (less than 10 ns) and precise (better than 100 ps) signals is an essential part of the design of a timing detector, together with radiation resistance considerations. Single crystal diamond sensors are one of the most promising technologies in this field. In this paper, the main characteristics that make single diamond crystal sensors ideal for timing applications will be described and an introduction to the design of fast front-end electronics will be given. Finally, two examples of diamond timing detectors used in High Energy Physics, the START detector of HADES and the TOTEM/CMS timing detector, will be discussed.

Precision timing calorimetry with the CMS HGCAL

The existing CMS endcap calorimeters will be replaced with a High Granularity Calorimeter (HGCAL) for operation at the High Luminosity (HL) LHC . Radiation hardness and excellent physics performance will be achieved by utilising silicon pad sensors and SiPM-on-scintillator tiles with high longitudinal and transverse segmentation. One of the major challenges of the HL-LHC will be the high pileup environment, with interaction vertices spread not only in position, but also in time. In order to efficiently reject particles originating from pileup, precision timing information of the order of 30 ps will be of great benefit. In order to meet such performance goals, the HGCAL will provide timing measurements for individual hits with signals above 12 fC (equivalent to 3–10 MIPs), such that clusters resulting from particles with pT > 5 GeV should have a timing resolution better than 30 ps. Given the complexity and size of the system, this poses a particular challenge to the readout electronics as well as to the calibration and reconstruction procedures. We present the challenges for the front-end electronics design, results from prototype tests in laboratory and beam environments, as well as anticipated timing performance from simulation.

Noise and crosstalk models of the particle detector with zero-pole transformation charge sensitive amplifier

Abstract This paper presents design and mathematical noise model of front-end electronics for a silicon particle detector , considering the complete transfer function of a charge sensitive amplifier (CSA). The work includes the noise and crosstalk analysis of a pixel array with a conventional CSA and a zero-pole transformation CSA (ZPT–CSA) (Jaffari et al., 2011). The pixel array has been designed and simulated in a 180 nm CMOS technology with the supply voltage of 1.8 V and the substrate potential of –10 V. The comparative study for conventional and ZPT–CSA is performed with the circuit simulations. The study demonstrates a reduction of 30 % in output noise spectral density and 46 % in equivalent noise charge (ENC) for a frequency band of 100 kHz–100 MHz by using a zero-pole transformation technique. Further, the paper proposes systematic design criteria for a ZPT–CSA with a continuous reset mechanism for the noise reduction. The complete transfer function for the ZPT–CSA is derived and noise model is presented in the presence of interpixel capacitive crosstalk. The results of the mathematical model are compared with the circuit simulations. An average error of 3 × 1 0 − 10 V 2 ∕ Hz is seen in the output noise voltage spectral density for a frequency range of 100 kHz to 100 MHz. The comparison shows an average relative error of 1.8% for the crosstalk voltages. ENC from both the simulations has an average error of 2.91 aC ( ∼ 18 electrons) when plotted for a pixel capacitance range of 10 fF–100 fF in 100 kHz to 100 MHz frequency band.

Design and performance evaluation of front-end electronics for COMET straw tracker

Abstract The COMET experiment at J-PARC aims to search for the charged lepton flavor violating process of neutrinoless muon-to-electron conversion with an improvement of a sensitivity by a factor of 10000 to the current limit. We plan to use a straw tube tracker with high momentum resolution as an electron detector . To read out the signal from the tracker precisely, optimal front-end electronics is needed, and we have developed the readout electronics board called ROESTI, which contains all the front-end processes; preamplification, pulse shaping, discrimination, and digitization. All the functionalities are controlled by FPGA. Using the prototype, we have constructed the calibration method and evaluated the fundamental performance. In this paper, we report the details of the design and performance for the ROESTI prototype.

A cryogenic 0.35 μm CMOS technology BSIM3.3 model for space instrumentation: Application to a bandgap design

Space instrumentation has to face harsh environmental conditions [1]. These conditions strongly impact the design of scientific instruments as well as electronic circuits. It is particularly important regarding front-end electronics, which have to be integrated very closely to the instruments to ensure high performances. In this case, both sensor and electronics have to face the same thermal and radiative environment, damaging electronics and reducing their lifetime. In those conditions the design of efficient and reliable front-end electronics is a challenging trade-off between performance and reliability. Complementary metal–oxide–semiconductor (CMOS) 0.35 μm technology is widely used in space instrumentation in the frame of Application Specific Integrated Circuits design. It presents a good Total Ionizing Dose (TID) radiation tolerance and offers quite good performance for many analog and digital applications. Furthermore, the reliability of this technology is a real asset for space instruments due to a strong heritage. As a consequence, CMOS 0.35 μm technology remains a good candidate for the purpose of future space electronics design.

The front-end electronics design of dose monitors for beam delivery system of Shanghai Advanced Proton Therapy Facility

A front-end electronics of dose monitor has been developed for measuring irradiation dose to the patient in Shanghai Advanced Proton Therapy Facility. The parallel plate ionization chamber is used for the dose monitoring. Unlike the traditional method of recycling capacitor integration and voltage-to-frequency conversion, this dose monitor electronics uses the trans-impedance amplifier and analog-to-digital conversion method. It performs satisfactorily, with the integral nonlinearity of less than ±0.04 nA in the range of −400 to 50 nA and the resolution of about ±0.6 nA.

A Novel Read-Out Electronics Design Based on 1-Bit Sigma-Delta Modulation

The conventional front-end electronics for PET imaging consist of an energy circuit and a timing circuit. A single channel in front-end electronics typically requires several amplifiers, an ADC and a TDC. In this paper, we present a novel front-end electronic design using 1-bit sigma-delta ( $\boldsymbol {\Sigma }$ - $\boldsymbol {\Delta }$ ) modulation and an FPGA. The new design requires only one analog amplifier per channel. The output of the analog amplifier is read directly by the FPGA. Both the energy and timing calculation are implemented in FPGA firmware. The scope of this paper is to introduce the novel design in detail and to evaluate its performance in energy and dark current measurements. Simulink simulations were performed to validate the design with ideal components. A one-channel prototype circuit was built to assess the design with real components. The prototype circuit was tested with different input signals, including test pulses, pulse signals from a PMT detector, DC current signals and dark current signals from an SiPM sensor. Both the simulation and experimental results show that the method is inherently stable and has excellent accuracy and linearity in energy and dark current measurements. The prototype analog board was built with discrete components cost about $ 0.5 in total. The power consumption was about 20 mW. We conclude that the new method provides a cost-efficient and power-efficient way to accurately measure the energies of analog pulses and dark currents from detectors. The timing performance of this method is currently under evaluation.

Design of fast signal processing readout front-end electronics implemented in CMOS 40 nm technology

The author presents considerations on the design of fast readout front-end electronics implemented in a CMOS 40 nm technology with an emphasis on the system dead time, noise performance and power dissipation. The designed processing channel consists of a charge sensitive amplifier with different feedback types (Krummenacher, resistive and constant current blocks), a threshold setting block, a discriminator and a counter with logic circuitry. The results of schematic and post-layout simulations with randomly generated input pulses in a time domain according to the Poisson distribution are presented and analyzed. Dead time below 20 ns is possible while keeping noise ENC ≈ 90 e− for a detector capacitance CDET = 160 fF.

Development of a dedicated front-end electronics for straw tube trackers in the P̄ANDA experiment

The design and tests of front-end electronics for straw tube trackers in the P̄ANDA experiment at FAIR are presented. The challenges for the front-end electronics, comprising operation at high counting rate up to 1 MHz per straw tube, are discussed and the proposed architecture comprising a switched gain charge sensitive preamplifier (CSP), a pole-zero cancellation circuit (PZC), a second order variable peaking time shaper, a trimming ion tail cancellation circuit, and a baseline holder (BLH), is described. The front-end provides an analogue output and a discriminator with LVDS differential driver for the Time-of-Arrival (ToA) and Time-over-Threshold (ToT) measurements. A prototype readout ASIC featuring four channels was fabricated in 0.35 μm CMOS technology consuming 15.5 mW (analog part) and 12 mW (LVDS) per channel. The results of measurements of peaking time (25–67 ns), gain, noise (ENC 800–2500 el. for various gains), time walk and jitter are presented as well as the first results obtained with prototype straw tubes connected.

A New Simple and Effective Procedure for SiPM Electrical Parameter Extraction

Silicon photomultipliers (SiPMs) are emerging semiconductor-based photosensors, addressing the challenge of low-light detection down to the single-photon counting level. A design of high-performance front-end electronics for SiPM readout requires the development of accurate electrical models. Numerous SiPM reliable models have matured in recent years; however, circuit parameter extraction is rather cumbersome and involves extensive measurement steps to be performed. Starting from a recently developed model of the SiPM device coupled to the conditioning electronics, a new effective analytical procedure is, here, devised for extracting the SiPM model parameters from experimental measurements. The proposed extraction technique is applied to a $3\times 3$ -mm2 SiPM sensor, and is validated by comparing SPICE simulations and measurement results. Independent cross-check validation based on experimental tests corroborates the effectiveness of the adopted extraction procedure.

Integrated Front End Electronics Design for Micromachined Ultrasound Transducers

Chip level integration of two dimensional (2D) capacitive micromachined ultrasound transducer (CMUT) array with custom integrated circuit (IC) for the real-time three dimensional (3D) medical imaging is described. Front-end electronics IC contains 4096 pulsers, producing 50 V pulses and 4096 low noise 12 MHz band preamplifiers with switches. 256 multiplexers, having 16 outputs each are used for readout of the signal from transducer elements. This scheme enables the control of transducer apertures containing 256 elements for transmit and receive.