Abstract
The frontend readout system for the silicon section of the CMS Phase II Endcap Calorimeter faces unique challenges due to the high channel count and associated bandwidth, limited physical space, as well as radiation tolerance requirements. I will give an overview of the frontend electronics design and will discuss the recent experience obtained from the first test system that integrates the HGCROC2 readout ASIC, lpGBT, and VTRX+ in a realistic manner, linking together prototypes of the hexaboard, engine, and wagon boards.
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