Depletion-mode Devices Research Articles

Tuning PEDOT:PSS conductivity to obtain complementary organic electrochemical transistor

Abstract Organic electrochemical transistors (OECT) have been gaining importance due to their applications in biological and chemical sensing along with logic circuitry. Most OECT studies have utilized poly(3,4-ethylenedioxythiophene) polystyrene sulfonate (PEDOT:PSS) as the channel material which operates in depletion mode. Here, we have used PEDOT:PSS as the channel material and have demonstrated both depletion and accumulation mode OECTs by tuning its conductivity with over-oxidation. Over-oxidized PEDOT:PSS revealed that while the PEDOT degraded PSS remained intact after oxidation leading to a reduction in the electrical conductivity leaving the ionic conductivity intact. To the best of our knowledge this is the first demonstration of the PEDOT:PSS as an accumulation OECT device. The depletion mode device exhibits a threshold voltage of −0.5 V with a transconductance of 323.6 μS as compared to the accumulation device with a threshold of 0.52 V with a transconductance of 5.19 μS. Thus, we have demonstrated the use of a single organic semiconductor for fabricating both depletion and accumulation mode OECTs. This is technologically advantageous to achieve complementary for development of sensors, logic circuits and for reduction of low power consumption of devices.

A compact model and TCAD simulation for GaN-gate injection transistor (GIT)

Wide bandgap (WBG) semiconductor devices represent an attractive developing technology for power applications that is recently gaining commercial ground. GaN has advantages as one of the top contenders with high bandgap, high mobility, high saturation velocity, and high breakdown voltage. GaN enhancement-mode devices are favored over depletion-mode devices for power electronics applications and are only recently becoming commercially available. The enhancement-mode device investigated in this work is a GaN-gate injection transistor (GIT) in which the normally-off operation is achieved with an additional p-doped gate. This paper presents current-voltage (I-V) characteristics of GaN-GIT device using a physics based compact model as well as TCAD (Technology Computer-Aided Design) numerical simulation to predict and model the device behavior of the GIT. This paper presents a comparison of the TCAD simulation results with a compact model intended for low frequency applications in power electronics in the KHz to MHz range.

DC and RF Characteristics of Enhancement-Mode Al2O3/AlGaN/GaN MIS-HEMTs Fabricated by Shallow Recess Combined with Fluorine-Treatment and Deep Recess

Enhancement-mode (E-mode) Al2O3/AlGaN/GaN MISHEMTs were fabricated by shallow recess combined with CF4 plasma treatment (SR/F) and deep recess (DR) to compare the effect of each process technique on the device performance. To prevent the device performance degradation induced by plasma damage during gate recess, the digital etch technique was employed. The fabricated E-mode devices have positively shifted threshold voltage, and exhibit lower transconductance (gm) and saturation drain current than depletion-mode devices. Due to the CF4 plasma damage during F-treatment, SR/F shows a sharp drop of gm curve and low saturation drain current. In contrast, DR presents broad gm and high saturation drain current. It is also revealed that the digital etch for gate recess exhibits an isotropic etch profile, consequently increasing the on-resistance. There is no remarkable difference between SR/F and DR in fT and fmax, but DR has a better linearity over SR/F owing to the absence of plasma damage during F-treatment. This results reveal that the DR using digital etch is promising technique to obtain the high performance E-mode MISHEMTs compared to the F-treatment.

High-Uniformity and High Drain Current Density Enhancement-Mode AlGaN/GaN Gates-Seperating Groove HFET

In this paper, we report on a novel E-mode AlGaN/GaN gates-seperating groove heterostructure field-effect transistor (GSG HFET). The current turn-on/off is controlled by changing gate voltage to regulate the horizontal energy band between the double gates. A threshold voltage of 0.23 V and a high drain current density of 851 mA/mm are obtained in GSG HFET. Compared with the proposed depletion-mode device, the maximum drain current of the GSG HFET deceases slightly (about 7%). It is noteworthy that the threshold voltage is less sensitive to the etching time. The devices show high-uniformity threshold voltage of 0.23 V within wide etching time range from 5 to 9 min.

(Invited) Manipulating Electronic Transport Properties of III-V Nanowire Transistor

Recently, III-V semiconductor nanowires (NWs) are widely investigated as field-effect transistors (FETs) for high-performance electronics, optoelectronic, photonics and others [1-5]; nevertheless, effective control in their device performances, especially the threshold voltage is still not well achieved, which can potentially limit their practical uses for technological applications. Herein, we report three simple but highly reliable techniques to control the threshold voltage of III-V FETs by metal nanoclusters (eg. Au, Ni, Al and Cr) decoration, metal-oxide nanoparticle (eg. CuO, Ag2O, SnO2 and NiO) surface decoration and aromatic thiolate (ArS)-based molecular monolayers passivation onto the device channel in order to manipulate electrical characteristics of III-V NWFETs. Based on the work function difference between the NW and the deposited metal clusters, the carrier concentration of device channels could be modulated accordingly, and as a result the VTH of different III-V NW transistors can be adjusted efficiently toward positive or negtive position [4]. It shoud be noted that these fabricated transistors had limited air stability due to the rapid oxidation of decorated metal clusters in the ambient environment. Therefore, a thin layer of Al2O3 was needed to passivate the metal clusters from oxidation, which could possibly limit their uses of NEFETs in certain application fields. In addition, we have as well employed thiolate-based aromatic monolayers with controllable molecular structure and electron density to modify the surface carrier concentration of InAs NW channels, resulting in manipulatable changes of the device VTH [5]. What’s more, the electron mobility and the current on off ratio is also improved greatly. To our disappointment, because of the sensitivity of these organic molecules to oxygen and humidity, this chemical passivation approach of NWFETs was again unstable in the ambient. Additionally, it should be noted that since the electron withdrawing or donating effect of thiolate-based aromatic monolayers were limited, the resulting device VTH could only shift with a relatively small range from 0.25 to 1.57 V.[5] In the following, the free electrons in the NW channel (i.e. InAs, InP and InGaAs) can be modulated effectively via depositing various metal-oxide (NPs) with different work functions. Without any passivation layer, this decoration approach can yield the stable NW device characteristics in ambient. Notably, the versatility of our decoration scheme has also been illustrated through the realization of high-performance enhancement-mode InAs NW parallel arrayed devices as well as the configuration of highly efficient InAs NW NMOS inverters, comprising of both depletion and enhancement mode devices. All these results further elucidate the technological potential of this decoration approach for future high-performance, low-power nanoelectronic device fabrication and circuit integration. [1] F. Wang, S. Yip, N. Han, K. Fok, H. Lin, J. J. Hou, G. Dong, T. Hung, K. S. Chan, J. C. Ho, Nanotechnology 2013, 24, 375202. [2] A. C. Ford, J. C. Ho, Y. L. Chueh, Y. C. Tseng, Z. Fan, J. Guo, J. Bokor, A. Javey, Nano Lett. 2009, 9, 360. [3] J. J. Hou, F. Wang, N. Han, F. Xiu, S. Yip, M. Fang, H. Lin, T. F. Hung, J. C. Ho, ACS Nano 2012, 6, 9320. [4] N. Han, F. Wang, J. J. Hou, S. P. Yip, H. Lin, F. Xiu, M. Fang, Z. Yang, X. Shi, G. Dong, T. F. Hung, J. C. Ho, Adv. Mater. 2013, 25, 4445. [5] H. Cheung, S. Yip, N. Han, G. Dong, M. Fang, Z. Yang, F. Wang, H. Lin, C. Wong, J. C. Ho, ACS Nano 2015, 9, 7545.

Characteristics of enhanced-mode AlGaN/GaN MIS HEMTs for millimeter wave applications

In this paper, an enhanced-mode (E-mode) AlGaN/GaN high electron mobility transistor (HEMT) was developed by using 4-inch GaN HEMT process. We designed and fabricated Emode HEMTs and characterized device performance. To estimate the possibility of application for millimeter wave applications, we focused on the high frequency performance and power characteristics. To shift the threshold voltage of HEMTs we applied the Al2O3 insulator to the gate structure and adopted the gate recess technique. To increase the frequency performance the e-beam lithography technique was used to define the 0.15 um gate length. To evaluate the dc and high frequency performance, electrical characterization was performed. The threshold voltage was measured to be positive value by linear extrapolation from the transfer curve. The device leakage current is comparable to that of the depletion mode device. The current gain cut-off frequency and the maximum oscillation frequency of the E-mode device with a total gate width of 150 um were 55 GHz and 168 GHz, respectively. To confirm the power performance for mm-wave applications the load-pull test was performed. The measured power density of 2.32 W/mm was achieved at frequencies of 28 and 30 GHz.

Manipulating III–V Nanowire Transistor Performance via Surface Decoration of Metal‐Oxide Nanoparticles

Recently, III–V semiconductor nanowires (NWs) are widely investigated as field‐effect transistors (FETs) for high‐performance electronics, optoelectronic, and others; nevertheless, effective control in their device performances, especially the threshold voltage is still not well attained, which can potentially limit their practical uses for technological applications. This study reports a simple but highly reliable metal‐oxide nanoparticle (NP) surface decoration approach onto the device channel in order to manipulate electrical characteristics of III–V NWFETs, such as the threshold voltage and transistor operation, through the manipulation of free electrons in the NW channel (i.e., InAs, InP, and In0.7Ga0.3As) via depositing various metal‐oxide NPs with different work functions. Without any passivation layer, this decoration approach can yield the stable NW device characteristics in ambient. Notably, the versatility of our decoration scheme has also been illustrated through the realization of high‐performance enhancement‐mode InAs NW‐paralleled‐arrayed devices as well as the configuration of highly efficient InAs NW NMOS inverters, comprising of both depletion and enhancement mode devices. All these results further elucidate the technological potential of this decoration approach for future high‐performance, low‐power nanoelectronic device fabrication, and circuit integration.

Modelling of capacitance and threshold voltage for ultrathin normally-off AlGaN/GaN MOSHEMT

A compact quantitative model based on oxide semiconductor interface density of states (DOS) is proposed for Al0.25Ga0.75N/GaN metal oxide semiconductor high electron mobility transistor (MOSHEMT). Mathematical expressions for surface potential, sheet charge concentration, gate capacitance and threshold voltage have been derived. The gate capacitance behaviour is studied in terms of capacitance–voltage (CV) characteristics. Similarly, the predicted threshold voltage (V T) is analysed by varying barrier thickness and oxide thickness. The positive V T obtained for a very thin 3 nm AlGaN barrier layer enables the enhancement mode operation of the MOSHEMT. These devices, along with depletion mode devices, are basic constituents of cascode configuration in power electronic circuits. The expressions developed are used in conventional long-channel HEMT drain current equation and evaluated to obtain different DC characteristics. The obtained results are compared with experimental data taken from literature which show good agreement and hence endorse the proposed model.

0.1-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math> </inline-formula> InAlN/GaN High Electron-Mobility Transistors for Power Amplifiers Operating at 71–76 and 81–86 GHz: Impact of Passivation and Gate Recess

We have developed 0.1- $\mu \text{m}$ gate-length InAlN/GaN high electron-mobility transistors (HEMTs) for millimeter-wave (MMW) power applications, particularly at 71–76 and 81–86 GHz bands. The impacts of depth and width of the gate recess groove on electrical performance have been analyzed and compared. Competing passivation technologies, atomic layer deposition (ALD) aluminum oxide (Al2O3) and plasma-enhanced chemical vapor deposition (PECVD) SiN, have also been assessed in terms of dc, pulsed- $IV$ , and high-frequency characteristics. It has been found that while PECVD SiN-passivated HEMTs and the monolithic microwave integrated circuits slightly underperform their ALD Al2O3-passivated counterparts, their MMW power performance can be further boosted with the gate recess due to the improved aspect ratio and scaling characteristics. When biased at a drain voltage of 10 V, a first-pass two-stage power amplifier design based on recessed PECVD SiN-passivated 0.1- $\mu \text{m}$ depletion-mode devices has demonstrated an output power of 1.63 W with a 15% power-added efficiency at 86 GHz.

Depletion-Mode GaN HEMT Q-Spoil Switches for MRI Coils.

Q-spoiling is the process of decoupling an MRI receive coil to protect the equipment and patient. Conventionally, Q-spoiling is performed using a PIN diode switch that draws significant current. In this work, a Q-spoiling technique using a depletion-mode Gallium Nitride HEMT device was developed for coil detuning at both 1.5 T and 3 T MRI. The circuits with conventional PIN diode Q-spoiling and the GaN HEMT device were implemented on surface coils. SNR was measured and compared for all surfaces coils. At both 1.5 T and 3 T, comparable SNR was achieved for all coils with the proposed technique and conventional Q-spoiling. The GaN HEMT device has significantly reduced the required power for Q-spoiling. The GaN HEMT device also provides useful safety features by detuning the coil when unpowered.

0.1-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> Atomic Layer Deposition Al<sub>2</sub>O<sub>3</sub> Passivated InAlN/GaN High Electron-Mobility Transistors for E-Band Power Amplifiers

High-performance 0.1-μm InAlN/GaN high electron-mobility transistors (HEMTs) have been successfully developed for power amplifiers operating at E-band (targeting 71-76 and 81-86-GHz bands). High maximum drain current of 1.75 A/mm and maximum extrinsic transconductance of 0.8 S/mm have been achieved for depletion-mode devices. Enhancement-mode HEMTs have also shown maximum drain current of 1.5 A/mm and maximum extrinsic transconductance of 1 S/mm. The selection of atomic layer deposition aluminum oxide (Al2O3) for device passivation enables a two-terminal breakdown voltage of ~25 V, excellent subthreshold characteristics as well as the pulsed-IV featuring little current collapse for both types of HEMTs. When biased at a drain voltage of 10 V, a first-pass two-stage power amplifier design based on 0.1-μm depletion-mode devices has demonstrated an output power of 1.43 W with 12.7% power-added efficiency at 86 GHz, a level of performance that has been attained previously only by state-of-the-art counterparts based on AlGaN/GaN HEMTs at a much higher drain bias and compression level.

负电荷层对a-IGZO TFT阈值电压的影响

TFT device with In-Ga-Zn-O( IGZO) film as the active layer deposited by pulse DC sputtering was fabricated. An Al2O3 film which was also deposited by sputtering was sandwiched between the active layer and an insulating layer. The Al2O3 acted as a negative charge layer for threshold voltage modulation( Vth). It raised the Vthfrom- 3. 8 V to- 0. 3 V,enhancing the formation of a depletion mode device. The application of Al2O3 as a negative layer can effectively control Vth around 0 V and enhance the stability of the device. Improved device characteristics such as: on / off current ratio( Ion/ Ioff) 109,sub-threshold slope( SS) of 0. 2 V/dec,Vthof- 0. 3 V,and mobility( μ) of 9. 2 cm2/( V·s) were therefore achieved.

Performance of AlGaInP/InGaAs enhancement/depletion-mode pseudomorphic doping-channel field-effect transistors

Direct current and direct-coupled FET logic (DCFL) characteristics of AlGaInP/InGaAs enhancement/depletion-mode pseudomorphic doping-channel field-effect transistors (DCFETs) are demonstrated by experimental results. After wet selectively etching process, the enhancement-mode pseudomorphic DCFET with single doping channel is formed. A large forward gate voltage up to +3 (2.6)V is observed for the depletion-mode (enhancement-mode) device for the presence of a relatively large conduction band discontinuity at Al0.15Ga0.35In0.5P/In0.1Ga0.9As heterojunction. In the depletion-mode device with double doping channels, the drain-to-source saturation voltage is only 0.5V as the VGS is fixed at 0V. A maximum extrinsic transconductance of 235 (274)mS/mm and a threshold voltage of −1.3 (+0.36)V are observed in the depletion-mode (enhancement-mode) device. Furthermore, the noise margins NMH and NML are of 0.108V (0.534V), and 0.390V (0.417V) at a supply voltage of 1.5V (2.0V) in the DCFL application.

A Sub-Critical Barrier Thickness Normally-Off AlGaN/GaN MOS-HEMT

A new high-performance normally-off gallium nitride (GaN)-based metal-oxide-semiconductor high electron mobility transistor that employs an ultrathin subcritical 3 nm thick aluminium gallium nitride (Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.25</sub> Ga <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.75</sub> N) barrier layer and relies on an induced two-dimensional electron gas for operation is presented. Single finger devices were fabricated using 10 and 20 nm plasma-enhanced chemical vapor-deposited silicon dioxide (SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) as the gate dielectric. They demonstrated threshold voltages (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) of 3 and 2 V, and very high maximum drain currents (IDSmax) of over 450 and 650 mA/mm, at a gate voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">GS</sub> ) of 6 V, respectively. The proposed device is seen as a building block for future power electronic devices, specifically as the driven device in the cascode configuration that employs GaN-based enhancement-mode and depletion-mode devices.

DC and RF characteristics of enhancement-mode InAlN/GaN HEMT with fluorine treatment

We report an enhancement-mode InAlN/GaN HEMT using a fluorine plasma treatment. The threshold voltage was measured to be +0.86 V by linear extrapolation from the transfer characteristics. The transconductance is 0 mS/mm at VGS = 0 V and VDS = 5 V, which shows a truly normal-off state. The gate leakage current density of the enhancement-mode device shows two orders of magnitude lower than that of the depletion-mode device. The transfer characteristics of the E-mode InAlN/GaN HEMT at room temperature and high temperature are reported. The current gain cut-off frequency (fT) and the maximum oscillation frequency (fmax) of the enhancement-mode device with a gate length of 0.3 μm were 29.4 GHz and 37.6 GHz respectively, which is comparable with the depletion-mode device. A classical 16 elements small-signal model was deduced to describe the parasitic and the intrinsic parameters of the device.

Novel ESD protection solution for single-ended mixer in GaAs pHEMT technology

This paper develops an improved electrostatic discharge (ESD) protection solution built with a novel dual-gate, depletion-mode pHEMT device in the GaAs technology. The successful implementation of this ESD clamp in a single ended passive RF mixer with a Human Body Model (HBM) ESD protection level of over 1.8kV is also demonstrated. The ESD protected mixer is also shown to maintain its RF integrity with only a minimal degradation in the conversion loss and noise figure.

Flexible protonic/electronic coupled neuron transistors self-assembled on paper substrates for logic applications

Flexible organic/inorganic hybrid and proton/electron coupled neuron transistors are self-assembled on paper substrates at room temperature. Solution-processed chitosan-based proton conductor gate dielectrics show a high electric-double-layer specific gate capacitance, which is favorable for low voltage portable application. High performance logic operations are realized on such flexible neuron transistors depending on the operation modes, i.e., “OR” logic for enhancement-mode device and “AND” logic for depletion-mode device. Proton/electron interfacial coupling in chitosan-gated neuron transistors is promising for the biological and sensing applications.

Enhancement mode InAlGaN/GaN MISHFETs with plasma‐oxidised AlOx/TiOx as gate insulator

AbstractEnhancement mode GaN‐based devices can be realised i.a. by gate recessing or the utilisation of a thin barrier. Yet, as this concept bases upon an increase in barrier capacitance, the application of a gate dielectric causing a capacitance reduction remains as a critical issue. A charge‐free dielectric would shift the threshold voltage to negative values, eventually forming a depletion mode device. However, with an appropriate charge‐containing dielectric, the same threshold voltage as for an HFET could be maintained. Here, a metal stack consisting of Al and Ti on top of a quaternary In0.11Al0.72Ga0.17N barrier was plasma‐oxidised and is shown to form insulated‐gate devices with almost the same threshold voltage as their Schottky gate counterparts. The effects on the threshold voltage are discussed. It is shown that the transconductance improves by more than 80%, record drain current of 860 mA/mm is achieved and the dynamic behaviour dramatically improves. (© 2013 WILEY‐VCH Verlag GmbH &amp; Co. KGaA, Weinheim)

Performance and direct-coupled FET logic applications of InAlAs/InGaAs co-integrated field-effect transistors by 2-D simulation

Based on the InAlAs/InGaAs heterostructure doping-channel field-effect transistors (DCFETs), three co-integrated devices are demonstrated. After removing some material layers, the enhancement/depletion-mode devices and inverter logic were formed. The InAlAs/InGaAs co-integrated structures consist of an enhancement-mode device with single channel and two depletion-mode devices with double and triple channels, respectively. The insertion of an undoped large energy-gap layer between the metal gate and active channels can improve the gate breakdown voltage and turn-on voltage. Besides, by the studied integrated DCFETs two transfer characteristics are implemented for direct-coupled FET logic (DCFL) circuit applications as compared to the previous reports with only single logic transfer characteristic. Consequently, the integrated AlInAs/GaInAs DCFETs provide a promise for signal amplification and multiple inverter logic applications.

Single-Event Transient Sensitivity of InAlSb/InAs/AlGaSb High Electron Mobility Transistors

Experimental evidence confirming single-event transient generation from ion strikes directly into the drain region of an InAlSb/InAs/AlGaSb high electron mobility transistor is presented. A rectifying drain alloy-buffer layer interface is shown to be responsible for the generation of single-event transients far from the active regions of the device. Charge collection in these depletion-mode devices is maximum at threshold, decreasing in both depletion and accumulation. In depletion, direct recombination of radiation-generated electrons at the drain dominates charge collection. In accumulation, the electric field in the channel strongly influences charge collection. In threshold, both source-to-channel charge injection as well as the electric field in the channel are simultaneously high, resulting in more charge collection than depletion and accumulation.