Density Of Interface Defect States Research Articles

Resistive switching and synaptic simulation behaviors of epitaxial ZnO/Nb-doped SrTiO3 heterojunction controlled by the substrate orientation

Zinc oxide (ZnO) films were grown epitaxially on Nb-doped SrTiO3 (NSTO) substrates with different orientations using laser pulse deposition to create the (112¯0)ZnO/(100)NSTO, (0002)ZnO/(110)NSTO and (0002)ZnO/(111)NSTO heterojunctions. Epitaxial ZnO films on the (100) NSTO had two orthorgonal domains, resembling the fourfold symmetry of the (100) NSTO substrate. This good matching between the grown ZnO film and NSTO substrate resulted in a lower growth rate, smoother and denser surface, and a higher density of interface defect states. The interface state density was approximately 4.4 × 1012 eV−1cm−2, which was notably higher than that of the other two heterojunctions. Electrical transport studies revealed that ZnO/(100)NSTO heterojunction demonstrated bipolar resistive switching and negative differential resistance (NDR) due to a higher density of donor interface states from contributions of oxygen vacancies, while both the ZnO/(110)NSTO and ZnO/(111)NSTO heterojunction exhibited typical rectifying behavior. The preliminary investigation into synaptic behaviors suggested that (112¯0) ZnO/(100)NSTO heterojunction holds significant potential in brain-inspired neuromorphic computing systems.

Fabrication of low interface dipole layer on Al2O3/SiO2/Si structure by densification of interfacial layer

Interfacial defects and electrical characteristics were analyzed to confirm the formation of dipole due to the densification of the SiO2 buffer layer and the resulting movement of the flat-band voltage. Through the NAOS, the SiO2 layer was densified without any change in thickness, and the suboxide density after the NAOS decreased from 2.23 × 1014 atoms/cm2 (PE-CVD) to 1.33 × 1014 atoms/cm2 (PE-CVD+NAOS). In addition, both electrical and interfacial defects decreased after NAOS and PMA. From these results, the SiO2 buffer layer through the NAOS was densified and the interface defect state density was reduced. The PE-CVD sample with low atomic density had a dipole layer strength of 0.799 V before PMA, but it was 0.457 V in the case of PE-CVD+NAOS with high atomic density due to the densification of the SiO2 buffer layer. Also, both samples were reduced to 0.488 V and 0.422 V after PMA. Based on this, the leakage current of PE-CVD was measured to be 3.05 × 10−5 A/cm2, and the leakage current of PE-CVD+NAOS was measured that the difference in about four orders of magnitude was 1.64 × 10−9 A/cm2. Through the densification of the SiO2 layer, the interface atomic density increased, and consequently, the dipole layer strength decreased, thereby improving the electrical properties.

Elucidating the origin of external quantum efficiency losses in cuprous oxide solar cells through defect analysis

Heterojunction Cu2O solar cells are an important class of Earth-abundant photovoltaics that can be synthesized by a variety of techniques, including electrochemical deposition (ECD) and thermal oxidation (TO). The latter gives the most efficient solar cells of up to 8.1% reported in the literature, but is limited by low external quantum efficiencies (EQE) in the long wavelength range (490–600 nm). By contrast, ECD Cu2O gives higher short wavelength EQEs of up to 90%. We elucidate the cause of this difference by characterizing and comparing ECD and TO films using impedance spectroscopy and fitting with a lumped circuit model to determine the trap density, followed by simulations. The data indicates that TO Cu2O has a higher density of interface defects, located approximately 0.5 eV above the valence band maximum (NV), and lower bulk defect density thus explaining the lower short wavelength EQEs and higher long wavelength EQEs. This work shows that a route to further efficiency increases of TO Cu2O is to reduce the density of interface defect states.

Nickel Oxide Hole‐Selective Heterocontact for Silicon Solar Cells: Role of SiOx Interlayer on Device Performance

Carrier‐selective contact‐based silicon heterojunction solar cells are fabricated using nickel oxide (NiOx) as a hole‐selective layer by thermal evaporation. The highest power conversion efficiency of ≈15.20% with a chemically grown SiOx interlayer is achieved from a Ag/ITO/NiOx/n‐Si/LiFx/Al cell structure in comparison with ≈12.43% without SiOx. The cells without and with the SiOx layer are analyzed by considering crucial parameters for conversion efficiency, such as minority carriers' diffusion lengths, lifetimes, recombination resistance, and density of interface defect states at the NiOx/n‐Si junction, by studying the dark/light current density–voltage, quantum efficiency, impedance, and parallel conductance characteristics. Device analysis provides evidence for the cell's open‐circuit voltage and short‐circuit current enhancement with the SiOx interlayer. This is due to an improvement in minority carrier lifetimes from ≈8.6 to ≈48.27 μs (photo‐conductance decay analysis), which is also estimated from ≈7.45 to ≈49.20 μs by impedance spectra analysis, increased minority carrier diffusion length from ≈171 to ≈952 μm, and decreased rear surface recombination velocity from ≈1106 to ≈170 cm s−1 (quantum efficiency analysis). These investigations reveal that engineering the n‐Si/LiFx interface by the SiOx interlayer is more important than the NiOx/n‐Si interface because of a thin unintentionally grown SiOx layer during NiOx evaporation simultaneously mediating silicon surface passivation.

Two-dimensional defect mapping of the SiO2/4H−SiC interface

Current generations of 4H-SiC metal-oxide-semiconductor field-effect transistors are still challenged by the high number of defects at the SiO2/SiC interface that limit both the performance and gate reliability of these devices. One potential source of the high density of interface defect states (D-it) is the stepped morphology on commonly used off-axially grown epitaxial surfaces, favoring incomplete oxidation and the formation of defective transition layers. Here we report measurements on intentionally modified 4H-SiC surfaces exhibiting both atomically flat and stepped regions where the generation of interface defects can be directly linked to differences in surface roughness. By combining spatially resolving structural, chemical, optical, and electrical analysis techniques, a strong increase of D-it for stepped surfaces was revealed while regions with an atomically flat SiC surface exhibited close-to-ideal interface properties.

Passivation of Liquid‐Phase Crystallized Silicon With PECVD‐SiNx and PECVD‐SiNx/SiOx

Silicon nitride (SiNx) and silicon oxide (SiOx) grown with plasma‐enhanced chemical vapor deposition are used to passivate the front‐side of liquid‐phase crystallized silicon (LPC‐Si). The dielectric layer/LPC‐Si interface is smooth and layers are well‐defined as demonstrated with transmission electron microscopy. Using electron energy loss spectroscopy a thin silicon oxynitride is detected which is related to oxidation of the SiNx prior to the silicon deposition. The interface defect state density (Dit) and the effective fixed charge density (QIL,eff) are obtained from high‐frequency capacitance‐voltage measurements on developed metal‐insulator‐semiconductor structures based on SiOx/SiNx/LPC‐Si and SiOx/SiNx/SiOx/LPC‐Si sequences. Charge transfer across the SiNx/LPC‐Si interface is observed which does not occur with the thin SiOx between SiNx and LPC‐Si. The SiOx/SiNx/LPC‐Si interface is characterized by QIL,eff > 1012 cm−2 and Dit,MG>1012 eV−1 cm−2. With SiOx/SiNx/SiOx stack, both parameters are around one order of magnitude lower. Based on obtained QIL,eff and Dit(E) and capture cross sections for electrons and holes of σn = 10−14 cm s−1 and σp = 10−16 cm s−1, respectively, a front‐side surface recombination velocity in the range of 10 cm s−1 at both interfaces is determined using the extended Shockley‐Read‐Hall recombination model. Results indicate that field‐effect passivation is strong, especially with SiOx/SiNx stack.

Total photoelectron yield spectroscopy of energy distribution of electronic states density at GaN surface and SiO2/GaN interface

The energy distribution of the electronic state density of wet-cleaned epitaxial GaN surfaces and SiO2/GaN structures has been studied by total photoelectron yield spectroscopy (PYS). By X-ray photoelectron spectroscopy (XPS) analysis, the energy band diagram for a wet-cleaned epitaxial GaN surface such as the energy level of the valence band top and electron affinity has been determined to obtain a better understanding of the measured PYS signals. The electronic state density of GaN surface with different carrier concentrations in the energy region corresponding to the GaN bandgap has been evaluated. Also, the interface defect state density of SiO2/GaN structures was also estimated by not only PYS analysis but also capacitance–voltage (C–V) characteristics. We have demonstrated that PYS analysis enables the evaluation of defect state density filled with electrons at the SiO2/GaN interface in the energy region corresponding to the GaN midgap, which is difficult to estimate by C–V measurement of MOS capacitors.

High-efficiency thin film ZnMgO/ZnO solar cell simulation approach: Temperature dependency, BSF and efficient small signal analysis

Small signal analysis for Al/ZnO/c-Si/Ag heterojunction solar cell structure is investigated in this simulation work. Effect of signal frequency, device temperature and junction interface defect state density on the junction diffusion capacitance and device conductance are thoroughly examined. Built in potential measurement highlights variation from 0.8 to 2.1 eV for the range100 Hz to 8 MHz which showing a good agreement with the practical value. Low temperature (10–100 K) conductance measurement at 2 V biasing results a localised Fermi level state density 9.54 × 1040 cm−3eV−1and evidences variable range hopping conduction. Excellent improvement of short circuit current density and efficiency is observed using MgxZn1-xO window layer. The increase in short circuit current density and efficiency due to the use of the window layer are 31.85 mA cm−2 and 19.17% respectively. For all the study illumination of 400 nm monochromatic light with photon flux 2.8 × 1017 cm−2s−1 and spectral width 10 nm are applied. Uses of 400 nm light is due to study of temperature dependency on open circuit voltage of solar cell. Using 1000 wt/m2 the efficiency of solar cell is enhanced from 19.88% to 23.15%.

Gallium Nitride: Charge Neutrality Level and Interfaces

An analysis of experimental data revealed the dependence of the metal/n-GaN GaN(0001) barrier height on the metal work function, as predicted by the model that takes into account the charge neutrality level of the semiconductor. In case of the metal/p-GaN(Mg) barriers, significant scatter of the corresponding experimental data is observed and pinning of the near-surface Fermi level near E v + 2.5 eV takes place in most structures, which is due to the influence of high density of interface defect states formed during the process of the GaN doping by Mg impurity.

Control of 4H-SiC (0001) Thermal Oxidation Process for Reduction of Interface State Density

We fabricated SiO2/4H-SiC (0001) MOS capacitors with nearly-ideal capacitance-voltage characteristics, simply by the control of thermal oxidation conditions which were selected based on thermodynamic and kinetic considerations of SiC oxidation. The interface with low interface defect state density <1011 cm-2eV-1 for the energy range 0.1 – 0.4 eV below the conduction band of SiC was obtained by thermal oxidation at 1300oC in a ramp-heating furnace with a short rise/fall time, followed by low temperature O2 anneal at 800oC.

Fabrication of SiO2/4H-SiC (0001) interface with nearly ideal capacitance-voltage characteristics by thermal oxidation

We fabricated SiO2/4H-SiC (0001) metal-oxide-semiconductor capacitors with nearly ideal capacitance-voltage characteristics, simply by the control of thermal oxidation conditions which were selected based on thermodynamic and kinetic considerations of SiC oxidation. The interface with low interface defect state density &amp;lt;1011 cm−2 eV−1 for the energy range of 0.1–0.4 eV below the conduction band of SiC was obtained by thermal oxidation at 1300 °C in a ramp-heating furnace with a short rise/fall time, followed by low temperature O2 anneal at 800 °C.

Properties of HfO2/ultrathin SiO2/Si structures and their comparison with Si MOS structures passivated in KCN solution

Electrical, optical and partly structural properties are investigated on very thin ALD HfO2/ultrathin NAOS SiO2/n-type Si structures. An ALD layer was deposited at 250°C and it contains amorphous and crystalline–probably monoclinic HfO2 phases. HfO2 films with both types of structural phases were not stable if thermal treatment above 200°C was applied. On as- prepared samples, deep interface traps with activation energy of ΔW=0.23eV have been determined. After annealing of the structure at 200°C, the traps were partly transformed and a mid-gap level ΔW=0.49eV was detected. FTIR and AFM measurements confirmed presence of HfO2 monoclinic phase in the HfO2 films. On the other side, the density of interface defect states of the structure decreased from approx. 1012eV−1cm−2 to 1011eV−1cm−2 after low temperature annealing of the reference structure. The results are compared with very similar (almost identical) development of interface defect states on the very thin thermal SiO2/Si structure before and after passivation in a 0.1M KCN methanol solution.PACS: 78.55.Qr; 78.66.Jg; 81.16.Pr; 85.40Ls

PECVD-AlOx/SiNx Passivation Stacks on Silicon: Effective Charge Dynamics and Interface Defect State Spectroscopy

The charge dynamics and the interface defect state density of AlOx/SiNx passivation stacks deposited by plasma-enhanced chemical vapor deposition (PECVD) on crystalline silicon (c-Si) wafers are investigated. High frequency (1MHz) capacitance voltage (C-V) measurements were performed on stacks in the as deposited state and after an annealing step. C-V sweeps reveal an initially high negative charge density for the as deposited sample, activated by the thermal budget during SiNx deposition. However, this charge state is unstable and reduced owning to electron detrapping and emission into the c-Si upon applying moderate voltages. In the annealed sample, the AlOx/SiNx stack has a stable negative fixed charge. Both for as deposited and for annealed samples, applying a positive or negative constant gate voltage stress (Vstress) enhances or reduces the negative effective charge density (Qox,eff), respectively. Injection of charges from the c-Si into traps in the AlOx/SiNx stack is identified as the mechanism responsible for this behavior. We conclude that in addition to fixed negative charges trapping of negative charges near the interface is a crucial mechanism contributing to the total effective negative charge of the stack. Their contribution depends on the temperature and duration of the thermal treatment. Additionally, a large Vstress leads to generation of additional Si dangling bond defects over the entire c-Si bang gap at the c-Si/AlOx interface.

About electrical properties of passivated SiO2/Si structures prepared electro-chemically in HClO4 solutions

The contribution mainly presents results obtained on passivated SiO2/Si structures prepared in HClO4 solutions. The cleaned Si (100) wafers were immersed in 1M HClO4 aqueous solutions and oxidized under positive bias. Results obtained on wet chemically prepared SiO2/Si structures are compared with corresponding ones obtained on MOS formed by thermal oxidation at 850°C. Resulting oxide thicknesses of the layer prepared by electrochemical and thermal manners are ∼15nm and ∼7.5nm, respectively. All of prepared SiO2/Si structures were passivated in HCN or KCN solutions. Low density of interface defect states below the level of ∼1011eV−1cm−2 was determined on structures with the SiO2 layer prepared electrochemically, passivated in aqueous HCN solutions, and annealed in vacuum at low temperatures. It has been shown that residual interface electron traps detected by Q-DLTS or C–V method after passivation procedures on electrochemically prepared samples can be partly transformed to mobile and/or immobile charged particles which shift the flat-band voltage of MOS and increase the magnitude of hysteresis of C–V curves.

Passivation of Si-based structures in HCN and KCN solutions

The contribution deals with passivation of surfaces of c-Si and 6H-SiC by formation of very thin SiO2 films in boiling HNO3 solutions and by passivation of a-Si based double and triple layer structures deposited on Corning glass and c-Si by KCN solutions. The structures are investigated by spectroscopic ellipsometry, charge version of DLTS, C–V, FTIR–DRIFT, and by photoluminescence measuremets at 6K. Newly developed 2nd generation of MOS structures prepared on c-Si with an approx. 3nm SiO2 layer gives typical density of interface defect states of 5×1010eV−1cm−2. Real part of complex refractive index of approx. 3nm thick SiO2 layers is about 1.75. Application of HCN solutions to structure approx. 3nm SiO2/Si (applied as the last technological step) leads to remarkable lowering of absorbance in wavelength region 4000cm−1–2500cm−1. This result indicates a decrease of number of non- radiation transitions in the surface region of oxide/Si structures. Such structures have also the lowest density of interface defect states (observed by Q-DLTS). Application of boiling KCN solutions considerably increases amplitudes of photoluminescence signals coming from different double and triple a-Si based layers deposited on Corning glass. We relate this effect predominantly with reduction of non-radiation transitions in excited region of amorphous structures – with passivation of corresponding defect states in a-Si structures in boiling KCN solutions.

Evidence for interface defect states in amorphous Fe–ZnSe heterostructures

Electrical transport measurements on bilayers of Fe and amorphous ZnSe are performed. The samples are grown at low temperatures in order to achieve amorphous layers. The annealing behavior observed with the temperature dependence of the conductivity reveals localized electron states to be present at the interfaces between Fe and ZnSe. The density of interface defect states is found to be N( E F)≈10 13 eV −1 cm 2. These interface states disappear upon annealing at 250 K.

Analysis of TCO/p(a-Si:C:H) heterojunction and its influence on p-i-n a-Si:H solar cell performance

The ASPIN computer simulator, which enables analysis of transparent conducting oxide (TCO)/a-Si:C:H/a-Si:H/TCO heterostructures, was used to examine the influence of different front TCO/p(a-Si:C:H) heterojunctions on TCO/p-i-n/TCO/metal a-Si:H solar cell performance. Separate analysis of TCO/p(a-Si:C:H) structure for both SnO2 and ZnO indicates that the mismatch between the high contact potential and the measured potential barrier at the p-layer surface can be resolved by a large density of interface defect states, causing a steep potential decrease in the interface. Analysis of the detrimental effects of a-Si:C:H chemical oxidation in SnO2/p(a-Si:C:H), which were simulated by the increased surface state density in the a-Si:C:H, showed that the potential barrier in a p-layer with oxidized surface is increased. The impact of both TCO/p(a-Si:C:H) interface states and a-Si:C:H surface states on the photoelectric properties of p-i-n a-Si:H solar cells is discussed, and a possible improvement of Voc is envisaged.