Defect Creation Model Research Articles

Negative bias temperature instability in strained-Si p-MOSFETs

Strained-Si p-channel metal oxide semiconductor field effect transistors (MOSFETs) have become the performance boosters beyond 90 nm technology node. Reliability study of these devices is essential as only a few reports are available on this. In this work, we have explored the degradation mechanisms in these devices due to negative bias temperature instability (NBTI). Device simulation results have been calibrated with reported experimental data and a good agreement is observed. The reliability study of these devices has been performed using the two-stage model for defect creation. Study of the drain current degradation and comparison of threshold voltage shift after stressing between the strained-Si and Si channel p-MOSFETs have been performed. The threshold voltage degradation in strained-Si channel p-MOSFETs is found to be considerably higher than that in the bulk-Si devices due to higher fixed oxide charge and interface trap densities at the strained-Si/SiO2 interface.

Negative bias temperature instability in strained-Si p-MOSFETs

Strained-Si p-channel metal oxide semiconductor field effect transistors (MOSFETs) have become the performance boosters beyond 90 nm technology node. Reliability study of these devices is essential as only a few reports are available on this. In this work, we have explored the degradation mechanisms in these devices due to negative bias temperature instability (NBTI). Device simulation results have been calibrated with reported experimental data and a good agreement is observed. The reliability study of these devices has been performed using the two-stage model for defect creation. Study of the drain current degradation and comparison of threshold voltage shift after stressing between the strained-Si and Si channel p-MOSFETs have been performed. The threshold voltage degradation in strained-Si channel p-MOSFETs is found to be considerably higher than that in the bulk-Si devices due to higher fixed oxide charge and interface trap densities at the strained-Si/SiO2 interface.

(Invited) Stability under Gate Bias Stressing of Amorphous Oxide Thin Film Transistors

Amorphous oxide semiconductors (AOSs) are highly transparent, wide band gap materials with high electron mobility (>= 10 cm2 V–1 s–1), which are suitable for channel layers in thin film transistors (TFTs).1 With the emergence of these materials as the alternative to the incumbent a-Si:H for large area electronics and displays,2 understanding of the stability of these devices becomes vitally important. Stability studies have been reported for the leading AOS material, amorphous indium gallium zinc oxide (a-IGZO) and others such as amorphous zinc tin oxide (a-ZTO), indium zinc oxide and polycrystalline zinc oxide. Various methods such as illumination, gate or drain bias stressing, gate pulsing and constant current stressing have been reported. The deposition technology, choice of gate dielectrics, use of passivation and operation environment can also affect the device stability, as previously reported in a comprehensive review.3 Here, we focus on gate bias stressing – namely positive bias stress (PBS) and negative bias illumination stress (NBIS). We review different experiments and the models used to analyse the threshold voltage (Vth ) shift arising from bias stressing. In particular, the oxygen vacancy migration model that is proposed for the Vth shift in a-IGZO TFTs is discussed and contrasted with the defect creation model used for a-Si:H TFTs.4-6 We will compare the stability under PBS of a-IGZO TFTs with a-ZTO TFTs. These films are deposited by remote-plasma reactive sputtering. Staggered bottom gate architecture TFT are produced using thermal SiO2 as gate dielectric. Typical TFTs operate in enhancement mode with field effect mobility > 10 cm2 V–1 s–1, switching ratio of ~108 and a sub-threshold slope of ~ 0.6 V dec–1. TFTs were subjected to a gate bias stress field of 1MV cm-1 over the initial threshold field and IDS was measured as a function of time up to 80,000 s at temperatures between 65 and 105 °C. The time and temperature dependence of the Vth shift was analysed using the thermalization energy concept, which allows two parameters with some physical interpretation to be extracted: a measure of the energy barrier to the Vth shift process and an associated attempt-to-escape frequency. The extracted parameters of oxide TFTs are also compared to those of a-Si:H TFTs. This work is funded by the Engineering and Physical Sciences Research Council (EP/M013650/1). References 1 K. Nomura, Nature 432 (2004). 2 J. K. Jeong, J. H. Jeong, J. H. Choi, J. S. Im, S. H. Kim, H. W. Yang, K. N. Kang, K. S. Kim, T. K. Ahn, H.-J. Chung, M. Kim, B. S. Gu, J.-S. Park, Y.-G. Mo, H. D. Kim, and H. K. Chung, SID Symposium Digest of Technical Papers 39, 1 (2008). 3 J. F. Conley, in Instabilities in oxide semiconductor transparent thin film transistors, 2009, p. 50. 4 A. J. Flewitt and M. J. Powell, Journal of Applied Physics 115, 134501 (2014). 5 S. C. Deane, R. B. Wehrspohn, and M. J. Powell, Physical Review B 58, 12625 (1998). 6 K. M. Niang, P. M. C. Barquinha, R. F. P. Martins, B. Cobb, M. J. Powell, and A. J. Flewitt, Applied Physics Letters 108, 093505 (2016).

(Invited) Stability under Gate Bias Stressing of Amorphous Oxide Thin Film Transistors

Stability of amorphous zinc tin oxide thin film transistors (TFTs) is investigated under positive bias stressing (PBS) at temperatures between 65 and 105 °C. The time and temperature dependence of the threshold voltage shift is analyzed using a thermalization energy concept. A maximum energy barrier to defect migration of 0.76 eV and the attempt-to-escape frequency of 107 s–1 are extracted. These values are compared with those under PBS of amorphous indium gallium zinc oxide and hydrogenated amorphous silicon TFTs. The oxygen vacancy migration model that was proposed for amorphous oxide semiconductors is contrasted with the defect creation model that was proposed for amorphous silicon.

Effects of channel thickness on electrical properties and stability of zinc tin oxide thin-film transistors

We investigated the effects of channel thickness (tch) on the electrical properties and the bias stress-induced instability of zinc tin oxide (ZTO, Zn : Sn = 4 : 1) thin-film transistors (TFTs). With increasing tch, the electrical properties of the TFTs showed a trend: threshold voltage (Vth) decreased and field-effect mobility (μFE) increased; on the other hand, subthreshold swing and hysteresis characteristics did not show any significant change. The positive bias stress (PBS) test and the following analysis by the stretched-exponential equation revealed that the PBS-induced threshold voltage shift (ΔVth) decreased and the extracted characteristic trapping time (τ) increased with increasing tch. This thickness-dependence of PBS instability cannot be explained by charge trapping/injection model or defect creation model but can be well explained by less ambient effect at the backchannel due to less gate field through a thicker film.

Modelling the light induced metastable effects in amorphous silicon

AbstractWe present results of computer simulations of the light induced degradation of amorphous silicon solar cells. It is now well established that when amorphous silicon is illuminated the density of dangling bond states increases. Dangling bond states produce amphoteric electronic mid‐gap states which act as efficient charge trapping and recombination centres. The increase in dangling bond states causes a decrease in the performance of amorphous silicon solar cells. To show this effect, a modelling approach has been developed which uses the density of localised states with exponentially increasing band‐tails and dangling bond defect states distribution chosen according to the defect pool model. The calculation of the evolution of dangling bond state density during illumination has been achieved through a dynamic scaling relation derived from a defect creation model. The approach considers the amphoteric nature of the dangling bond state and thus accounts for the contributions of the different charge states of the dangling bond during the degradation process. This paper attempts to describe the simulation approach which calculates the defect density as a function of energy, position in the solar cell and illumination time. In excellent agreement with other workers, our simulation results show that the increase in the density of neutral dangling bond states during illumination is higher than of the charged states. (© 2008 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)

Kinetics of ion-beam damage in lithium niobate

The damage kinetics induced by irradiation with a diversity of swift ions (O at 5MeV; F at 5.1MeV; Si at 5, 7.5, and 41MeV; and Cl at 11 and 46MeV) has been investigated in the range of 1012–1015at.∕cm2. It covers from the initial stage where single damage tracks are isolated and well separated, up to the stage where a full amorphous layer is produced. The damage is characterized by the areal fraction of disorder derived from the Rutherford backscattering∕channeling spectra. The data approximately fit an abrupt Avrami-type dependence with fluence. The fluence value at which 50% of the sample surface becomes disordered shows a clear increasing trend with the electronic stopping power of the ion. The trend is consistent with Monte Carlo simulations based on a recent model for defect creation. Moreover, the quantitative agreement for the defect generation rate appears also reasonable.

Effect of channel length on the threshold voltage degradation of hydrogenated amorphous silicon TFTs due to the drain bias stress

The threshold voltage (VT) degradation of hydrogenated amorphous silicon thin film transistors (a-Si:H TFTs) with various channel lengths of 2–100μm has been investigated. In the presence of a drain bias, the VT degradation of a short channel a-Si:H TFT was less than that of a long channel TFT. After 30000s DC bias stressing, the VT shift of a short channel TFT (2μm) was 0.35V, while that of a long channel TFT (10μm) was 0.6V. The short channel effect on the VT degradation under the drain bias was negligible when the channel length exceeded 10μm. The less VT degradation in a short channel a-Si:H TFT can be explained by the defect creation model that the VT shift is proportional to the number of carriers induced in the channel. In the presence of a drain bias, a short channel a-Si:H TFT has the smaller carrier concentration than a long channel TFT, so that a short channel a-Si:H TFT creates less defect states than a long channel TFT. The experiment with different channel widths of 100–500μm showed no remarkable difference as observed in the case of channel length variation.

Bias Stress Stability of Asymmetric Source-Drain a-Si:H Thin Film Transistors

AbstractThe threshold voltage (VT) degradation of asymmetric source-drain a-Si:H TFTs due to the electrical stress has been investigated. In the absence of a drain bias (VG=15V, VD=0V), the threshold voltage (VT) shifts of asymmetric TFTs were similar to that of symmetric TFT. However, in the presence of drain bias (VG=15V, VD=20V), the VT shifts of asymmetric TFTs were less than symmetric TFT. The VT shifts of ‘L’ and ‘J’ shaped TFT were 0.29V, 0.24V respectively, while the VT shift of ‘I’ shaped TFT was 0.42V.The less VT degradation of the asymmetric source-drain a-Si:H TFT compared with the symmetric TFT may be explained by the defect creation model. Since the actual drain width of asymmetric TFT is longer than symmetric TFT at the same W/L ratio, the charge depletion due to the drain bias is larger than that of the asymmetric TFT. Due to the less carrier concentration in the channel, the asymmetric a-Si:H TFT shows the less VT degradation compared with the symmetric TFT.

Threshold voltage instability of amorphous silicon thin-film transistors under constant current stress

We investigate the time-dependent shift in the threshold voltage of amorphous silicon thin-film transistor stressed with constant drain current. We observe a nonsaturating power-law time dependence, which is in contrast to the conventional stretched exponential that saturates at prolonged stress time. The result is consistent with the carrier-induced defect creation model and corroborates the nonlinear dependence of the rate of defect creation on the band-tail carrier density.

Effect of amorphous silicon material properties on the stability of thin film transistors: evidence for a local defect creation model

We present an improved description of the defect creation kinetics in amorphous silicon thin film transistors and analyze in detail the dependence on the key amorphous silicon material properties: Urbach energy, hydrogen content, hydrogen bonding and intrinsic stress. The results support a model for defect creation, involving Si–Si bond breaking, with only local hydrogen bonding rearrangements to stabilize the broken bond, as opposed to models involving long range hydrogen diffusion. On the other hand, defect annealing proceeds by breaking Si–H bonds and long-range diffusion of hydrogen.

Relative importance of the Si–Si bond and Si–H bond for the stability of amorphous silicon thin film transistors

We investigate the mechanism for Si dangling bond defect creation in amorphous silicon thin film transistors as a result of bias stress. We show that the rate of defect creation does not depend on the total hydrogen content or the type of hydrogen bonding in the amorphous silicon. However, the rate of defect creation does show a clear correlation with the Urbach energy and the intrinsic stress in the film. These important results support a localized model for defect creation, i.e., where a Si–Si bond breaks and a nearby H atom switches to stabilize the broken bond, as opposed to models involving the long-range diffusion of hydrogen. Our experimental results demonstrate the importance of optimizing the intrinsic stress in the films to obtain maximum stability and mobility. An important implication is that a deposition process where intrinsic stress can be independently controlled, such as an ion-energy controlled deposition should be beneficial, particularly for deposition temperatures below 300 °C.

Stability of Amorphous Silicon Thin Film Transistors

AbstractDangling bond defects are created during positive bias stress of amorphous silicon thin film transistors and there is an energy barrier between 0.9 and 1 eV for this process. We have studied how this energy barrier depends on the material parameters of the amorphous silicon, namely hydrogen content, hydrogen bonding, Urbach energy and intrinsic, deposition induced stress. We observe no dependence on the hydrogen content or hydrogen bonding type, but we do observe a clear dependence on the Urbach energy and the intrinsic stress. These measurements support a localized model for defect creation involving Si-Si bond breaking and the switching of a neighboring H atom to stabilize the broken bond. These results suggest that stable amorphous silicon TFTs can be obtained at low deposition temperatures by control of the deposition-induced, intrinsic stress.

Defect density of a-Si:H films grown at high deposition rates

The dependence of the Fermi energy, E F, the defect concentration, N DB, and the microstructure of a-Si:H films on the deposition rate have been investigated for sets of samples deposited under different conditions. Film surface topology was studied by atomic force microscopy. While E F remains unchanged for the samples deposited in the coplanar-type diode system, the films prepared in the coaxial-type diode system show a strong E F shift towards the conduction band with increasing deposition rate associated with an increasing N DB. Based on IR absorption and Auger electron spectroscopy data these observations are related to oxygen and nitrogen incorporation. With the supposition that O acts as a donor and negatively charged dangling bonds are created, the results show a good agreement with the hydrogen-mediated defect creation model for a-Si:H.

Neutral electron trap generation under irradiation in reoxidized nitrided gate dielectrics

In this study we report for the first time results on neutral electron trap generation in reoxidised nitrided oxide dielectrics under various radiation doses and bias conditions and compare the results with the conventional oxides. We see very little electron trap creation in RNO dielectrics for radiation doses up to 5 Mrad (Si) and for bias fields up to /spl plusmn/2.5 MV/cm. We explain our results in RNO and oxide dielectrics using a three step defect creation model.

Analysis of Light-Induced Degradation in Amorphous Silicon Alloy Solar Cells and Its Application to Accelerated Test Method

Light-induced degradation in amorphous silicon alloy single-junction solar cells has been studied systematically. The dependence of the light-induced degradation in the conversion efficiency and the other photovoltaic parameters on light intensity and bias voltage has been clarified quantitatively. It has been shown that the light-induced degradation characteristics of the photovoltaic parameters can be described by a single function of certain normalized parameters of the exposure condition. Theoretical background for the experimental results has been clarified by applying a defect creation model modified to the a-Si alloy solar cells. Moreover, using the above single function, we have proposed a new accelerated test method by indoor measurement under the solar simulator instead of outdoor testing under natural sunlight. The validity of the accelerated test method has been confirmed experimentally.

Effect of Light Exposure Conditions on the Light-Induced Degradation in Amorphous Silicon Alloy Solar Cells

ABSTRACTLight-induced changes in current-voltage characteristics of amorphous single-junction solar cells made of silicon alloys, a-SiC, a-Si, and a-SiGe have been studied systematically. The effect of the light intensity and the bias voltage on the light-induced degradation in the conversion efficiency and other photovoltaic parameters has been clarified quantitatively, and it has been shown that the light-induced degradation characteristics of the photovoltaic parameters can be described by a single function of some normalized parameters of exposure condition. Theoretical background for the experimental results is also examined and discussed by applying a defect creation model modified to an active layer of the a-Si alloy solar cells. Utilizing these analytical formula, we propose an accelerated test method by solar simulator indoor measurement instead of natural sunlight outdoor testing.

Light-induced defect creation in amorphous silicon: Single carrier versus excitonic mechanisms

A quantitative explanation is derived for the light-induced degradation of compensated amorphous silicon. The analysis suggests that donor levels in compensated hydrogenated amorphous silicon (a-Si:H) lead to an efficient spatial separation of trapped electrons and holes, thereby preventing excitonic tail-to-tail recombination thought to be responsible for metastable defect creation during illumination. This confirms the original defect creation model which has recently been challenged by single carrier mechanisms invoking dispersive hydrogen motion as the rate-limiting step.

Instability mechanism in hydrogenated amorphous silicon thin-film transistors

The degradation of hydrogenated amorphous silicon under an applied field is studied in an amorphous silicon thin-film transistor. A possible mechanism for metastable defect creation due to trapping of electrons at weak bonds together with a bond-switching event is investigated. The energy for the bond-switching process is assumed to be supplied thermally. The rate equation is set up and it is shown that this new model for defect creation is capable of describing the experimentally observed slow field-effect current transients at various temperatures.

Photo-induced defects and photoconductivity in amorphous silicon

An essential connection between photo-induced defects and photoconductivity in amorphous silicon is discussed within the framework of Street's defect creation model. The excitation intensity dependence and doping level dependence of the photo-induced defect density and photoconductivity are derived on the basis of simple rate equation analysis, and compared with experimental data.