Deep Level Transient Spectroscopy System Research Articles

Single thermal scan digital system for deep level transient spectroscopy.

We have developed a micro-controller based Deep Level Transient Spectroscopy (DLTS) system to identify the deep-level defects in semiconductors. It consists of Arduino-Due, a capacitance meter, and interface circuits. In addition, we have also developed the algorithms needed for the entire signal processing. It is not limited to Arduino-Due but can be implemented using other micro-controllers also. We have used Arduino-Due to generate the filling pulse and monitor the capacitance, temperature, data acquisition, timing control, and signal processing. The sequence of generating the filling pulse, reading the data, and signal processing is controlled digitally rather than by analog sampling circuits and timers. The minimum pulse width generated using Arduino-Due is 50ns; the pulse width generation depends on various hardware and software parameters and their integration. The resolution in reading the data is 0.8 mV/unit. The time delays in reading the data are appropriately taken care of in the system. The whole experiment can be completed in a single temperature cycle within 2-3h. The system is simple, inexpensive, in an easy-to-use platform, and less time-consuming; minimizes possible errors; and improves accuracy. The measurements using the "micro-controller based DLTS system" are verified by fabricating (Au) gold-doped silicon (Si) p-n junction samples (Au is a well-understood defect in Si). Using the Arduino-Due based DLTS system, we calculated the energy, the capture cross section, and the concentration of trap levels. The results are in good agreement with the literature, indicating the versatility of the system.

A new lock-in amplifier-based deep-level transient spectroscopy test and measurement system for solar cells

A new, widely-used, lock-in amplifier-based deep-level transient spectroscopy (DLTS) test and measurement system has been developed that efficiently digitizes and analyzes through conventional DLTS methods. The fundamental principle of DLTS, using the n+p diode, is introduced first. Part of the DLTS system setup is discussed in terms of the accuracy, optimization, and processing of measurement results. The established system is subsequently applied to study deep-level traps in the antimony sulfide (Sb2S3) and the Copper Indium Gallium Selenium (CIGS) thin-film solar cell. One electron trap and one hole trap were found in each of the two solar cells, and the calculated results are within a reasonable range compared with previous reports. It is shown experimentally that the DLTS system can be employed in a variety of test scenarios and the results are fundamentally in agreement with the mainstream system performance.

High-temperature deep-level transient spectroscopy system for defect studies in wide-bandgap semiconductors.

Full investigation of deep defect states and impurities in wide-bandgap materials by employing commercial transient capacitance spectroscopy is a challenge, demanding very high temperatures. Therefore, a high-temperature deep-level transient spectroscopy (HT-DLTS) system was developed for measurements up to 1100 K. The upper limit of the temperature range allows for the study of deep defects and trap centers in the bandgap, deeper than previously reported by DLTS characterization in any material. Performance of the system was tested by carrying out measurements on the well-known intrinsic defects in n-type 4H-SiC in the temperature range 300-950 K. Experimental observations performed on 4H-SiC Schottky diodes were in good agreement with the literature. However, the DLTS measurements were restricted by the operation and quality of the electrodes.

The high-frequency tunnel capacitance overload phenomenon of semiconductor-insulator-semiconductor heterojunction caused by the ultra-thin interfacial layers

The SIS (semiconductor-insulator-semiconductor) structure heterojunction derived from the MOS (metal-oxide- semiconductor) devices, and inherit the advantages of low cost, simple structure, stable performance and high theoretical efficiency, which drew tons of attention for solar cell and integrated circuit applications researches. SIS device consist of TCO (transparent conduction oxide) layer, ultra-thin oxide layer and silicon substrate, in which the carriers can tunnel through the oxide layer when the thickness of the interface oxide layer is reduced to 1–5 nm. Inside the SIS solar cell, the ultra-thin passivation layer has multiple functions including tunneling contact and buffer the crystalline lattice mismatch. Capacitance reflects a device’s ability to charge and discharge, and the capacitance voltage ( CV ) characteristic is critical in the estimate of the passivation quality no matter in the high-low frequency method or DLTS (deep level transient spectroscopy system) method, and the passivation quality manifest as interface state density ( D it). When examining the high frequency (1 MHz) CV characteristic of the SIS which was fabricated by depositing ITO upon n-type silicon directly by RF magnetron sputtering, it is found that once the applied voltage ( V g) exceeds a certain value V T (tunneling voltage), the differential capacitance value of the device would far beyond the range of the instrument and tends to infinity, which can be summarized as tunnel capacitance overload phenomenon (TCOP). As the description and explanation of this phenomenon have not been found in previous studies, the high-frequency TCOP of the SIS heterojunction with ultra-thin interfacial layers was investigated in details in this paper. The current-voltage characteristics of the SIS devices were obtained from the solar simulator and shown good photovoltaic conversion efficiency. The built-in electric field of the SIS with different ITO thickness was obtained by fitting the CV curves, which was measured by the Keysight E4980A CV system. The XPS depth profiling showed that the composition and percentage content of the interface, including In, Sn, O, Si, and the oxide silicon compound of Si2O, SiO, Si2O3, SiO2 which can be summed as SiO x (1≤ x ≤2). The TEM images showed that the thickness of the SiO x layer increases with the thickness of ITO layer, and the V T in TCOP is apparently linked to the SiO x thickness. When the applied V g exceed V T, a huge amount of electrons would enter the E C of the silicon surface, unlike the MOS with thick and well passivated insulator layer, the ultra-thin SiO x layer can’t hold these mass of electrons at the SIS interface, so the electrons would directly tunnel through the SiO x into the ITO layer and the TCOP appears. Capacitance voltage characteristics are critical for estimating the properties of heterojunction interfaces, and high frequency CV is indispensable for measuring the D it. The existence of the TCOP is the main reason why other methods which based on the CV characteristics are difficult to estimate the interface state. But from another point of view, the TCOP is repeatable in the same device, which implied that the solar cells that fabricated by the directly depositing ITO thin films on n-type silicon is stable.

Resonant frequency characterization of MEMS based energy harvesters by harmonic sampling analysis method

This paper presents a new and accurate experimental method based on harmonic distortion analysis to determine the resonant frequency of MEMS devices to be used as energy scavengers or more generally in widespread MEMS-based applications. This technique uses the mechanical–electrical analogy of MEMS variable capacitor acting as a low-pass filter to give access to both resonant frequency and damping factor of the mechanical system through the determination of the filter parameters as the cut-off frequency. Resonant frequencies ranging from 0.8kHz to 5kHz of electrostatic actuated MEMS-based harvesters have been measured by this technique with an uncertainty as low as a few parts in 103 in a good agreement with measurements carried out by using Deep Level Transient Spectroscopy system.

Deep Level Transient Spectroscopy System Designed by LabVIEW

Deep level transient spectroscopy (DLTS) and photo induced current transient spectroscopy (PICTS) are commonly used methods for the identification semiconductor impurities and defects. In this paper, a measurement system of DLTS and PICTS has been developed by LabVIEW. A series of different instruments construct this systems hardware (signal generator; current amplifier; capacitance meter; oscilloscope,etc.) while software is also easy to program by LabVIEW. This system demonstrates high generality for both DLTS and PICTS, and data acquired can be stored or read in computer. By contrast, it is much lower cost comparative to commercial DLTS or PICTS system. Testing result of silicon P+N junction coincides with semiconductor theory research.

Development of Computer Controlled Deep Level Transient Spectroscopy System

A Deep Level Transient Spectroscopy (DLTS) system has been designed and developed in modular form and its performance demonstrated. The system consists of timing controller, data acquisition unit, PID temperature controller, cryostat, capacitance meter, and pulse generator and a PC controller. Modules other than pulse generator and PC controller have been locally designed and fabricated. Dedicated software to run DLTS system, to data acquisition and post-processing / analysis was also developed. The performance of developed DLTS unit was validated through studies on Schottky diodes with known deep levels.

Inexpensive circuit for the measurement of capture cross section of deep level defects in semiconductors

A simple and inexpensive circuit to facilitate the direct measurement of capture cross section, when synchronized with a deep level transient spectroscopy system, is described. It avoids the most commonly encountered problem of loading and distortion of the bias (trap filling) pulses of nanosecond duration in the capture cross-section measurement. The capacitance meter, whose internal circuitry is responsible for the distortion, is connected and disconnected from the rest of the apparatus with the help of simple and low-cost reed relay switches featuring high operating speed and low contact resistance. Sharp bias pulses as small as 30 ns can successfully be applied to the sample with no observable distortion. Finally, a representative measurement is shown to demonstrate the simplicity and high performance of the circuit.

Deep level transient spectroscopy characterization of ferroelectric Pb(Zr,Ti)O3 thin films

Deep level transient spectroscopy (DLTS) has been used to investigate trap levels in sol-gel derived polycrystalline Pb(Zr0.54,Ti0.46)O3 thin films. Metal-ferroelectric-metal capacitor structures 2400 and 3000 Å in thickness were fabricated and characterized using a constant voltage DLTS system. Prominent peaks associated with a single trap level were observed in all samples studied. The activation energy was determined to be 267 meV from DLTS spectra Arrhenius plots. Infrared transmission characterization was performed on PbTiO3 thin films also prepared using sol-gel synthesis. A loss in the transmission at 270±12 meV was observed which we attribute to hole emission from the same trap detected using DLTS.

A novel computer based pseudo-logarithmic capacitance/conductance DLTS system specifically designed for transient analysis

A new inexpensive, simple to construct, PC based deep level transient spectroscopy (DLTS) system has been developed that efficiently digitizes and analyzes capacitance and conductance transients by conventional DLTS methods (boxcar, rectangular, and exponential) as well as by several transient methods (nonlinear least squares, modulation function methods, and correlation method of linear predictive modeling). A unique ‘‘pseudo-logarithmic’’ sample storage scheme allows each transient to be sampled at more than 11 different rates, permitting 3 to 5 decades of time constants to be observed in one thermal scan allowing the resolution of closely spaced defect energy levels. The high system flexibility allows weighting times (or transient observation times) to be selected between <200 μs to 3 days. This is the first report that details the merits, including faster response and recovery times, of using the new Boonton 7200 capacitance meter in a DLTS system. This is also the first reported use of the pseudo-logarithmic sample spacing to enhance the range of time constants observable in a single thermal cycle as well as the first use of selectable resistance values in conjunction with selectable capacitance values to allow the conductance and capacitance to be sampled simultaneously in high resolution mode (<1 fF and <0.01 μS). It is shown experimentally that the transient analysis capability of this system can separate closely spaced deep levels where the conventional DLTS methods fail.

Metallic Impurities in n- and p- Type Silicon: Dlts Studies

ABSTRACTDeep level majority and minority carrier traps in p+/n and n+/p junction diodes have been investigated. The junctions were fabricated on n- and p- type silicon which was intentionally and uniformly doped with heavy metals Cr, Fe, Ni, and Au during Czochralski crystal growth. The activation energies of the traps in these devices has been determined using a computer based Deep Level Transient Spectroscopy system which stores and analyzes entire capacitance-time transients. The capacitance-time data sets have been analyzed using the standard rate-window method as well as by a new algorithm which is able to test for the existence of a single exponential. The new algorithm has shown that only one of the ten traps measured contained a single exponential. Rate-window analysis of all the data sets, however, yielded energy levels based on the expectation of a single-exponential, despite the inherent non-exponentiality of the transients. Implications on the reliability of results obtained by the rate window method have been discussed. Possible reasons for the observed non-exponentiality in the data have been suggested based on a study of simulated data.

Characterization of EL2 in GaAs wafers by scanning isothermal transient spectroscopy

The authors have developed a novel scanning deep level transient spectroscopy system based on laser-excited junction capacitance or current transient measurements under isothermal conditions (scanning isothermal transient spectroscopy or SICTS). By applying the system to the measurement of deep levels in GaAs, they have successfully obtained precise information on the spatial distribution of EL2 in n-type GaAs wafers.

A microcomputer based deep level transient spectroscopy system

A simple and high-performance DLTS system is presented based on an IBM-PC/XT compatible microcomputer. Various DLTS techniques can be operated without changing the hardware. Apart from the DLTS spectra the system is capable of carrying out C-V, C-T, dC/dV-V and Capacitance Transient Digitizing Measurements. Its low cost and simplicity make the system especially suitable for small Laboratories. Experimental data presented permit an evaluation of the system proposed.

System effects in double-channel gated-integrator-based deep-level transient spectroscopy

The effects of the two sampling gate positions, and their widths and the integrator response times on the position, height, and shape of the peaks obtained in a double-channel gated-integrator-based deep-level transient spectroscopy (DLTS) system are evaluated. The best compromise between the sensitivity and the resolution of the DLTS system is shown to be obtained when the ratio of the two sampling gate positions is about 20. An integrator response time of about 100 ms is shown to be suitable for practical values of emission time constants and heating rates generally used.

Application of deep level transient spectroscopy to metal-oxide-semiconductor relaxation transients

A method for determining minority carrier generation lifetimes and hold times in metal-oxide-semiconductor devices is presented. The technique overcomes some of the uncertainties inherent in the commonly used Zerbst lifetime measurement and can be used on very small devices. In the method a deep level transient spectroscopy system is used to separate generation currents of different activation energies, and to provide values for these energies, so indicating the source of the generation at a particular temperature. In the range where generation in the depletion region is dominant, the minority-carrier generation lifetime can be derived. In all cases the data can be directly related to the ‘‘hold’’ time of a metal-oxide-semiconductor capacitor.

A new sequential four-rate-window DLTS system

A deep-level transient spectroscopy (DLTS) system is described that permits four simultaneous sequential DLTS spectra to be obtained during a single thermal scan. Using a commercial capacitance meter, a self-contained low-cost versatile unit has been designed that gives a signal-to-noise ratio better than 100 dB, baseline suppression, a resolution better than 0.5 fF, and a response time lower than 100 μs. The DLTS system uses a novel ramp generator to drive the sample temperature controller. This provides the facility to change the scan temperature range without loss of precision. The application of this system to measure the Au acceptor level in Si and Te-related traps (DX centers) in GaAlAs (x=0.65) is described.

Fast computer-controlled deep level transient spectroscopy system for versatile applications in semiconductors

A fast computer-controlled and fully automated deep level transient spectroscopy (DLTS) system is described. Various DLTS techniques can be operated without changing the hardware. Simultaneous data acquisition and data processing considerably reduces the measurement time. The sensitivity of the system is increased by digital compensation of the sample capacitance and by averaging of a high number of transients. All the trap parameters are determined during one temperature scan.

Deep levels in zinc phosphide

Deep majority-carrier traps have been studied by means of deep level transient spectroscopy (DLTS) in as-grown Zn3P2 polycrystals (p-type) grown either by sublimation or by iodine chemical transport using an automated digital DLTS system. Three main deep hole traps are present in both kinds of Zn3P2: hole traps with activation energy of 0.20±0.01 eV 0.36±0.005 eV, and 0.73±0.01 eV from the top of the valence band. In a few sublimation-grown samples a 0.48±0.02 eV hole trap is detected. The concentration of these levels, however, exhibits a very strong dependence on the thermal history of the samples, since Mg from the Schottky contact easily diffuses into the bulk above 50 °C and affects the concentration of the levels.

COMBINED ELECTRON MICROSCOPICAL AND DLTS (ESP, DSLTS) INVESTIGATIONS IN SEMICONDUCTORS

COMBINED ELECTRON MICROSCOPICAL AND DLTS (ESP, DSLTS) INVESTIGATIONS IN SEMICONDUCTORS

A novel method to detect nonexponential transients in deep level transient spectroscopy

In conventional Deep Level Transient Spectroscopy (DLTS) measurements, the analysis of the results is based upon the assumption of an exponential current or capacitance transient. We present experimental and computational results on a novel experimental method for determining when the assumption of exponentiality is not satisfied by the sample under study. The measurement may be performed without any changes in the conventional double-boxcar DLTS system.