In many applications it is required to have a system for non-integer sampling rate conversion (SRC), which supports any decimation factor, and provides enough attenuation for aliasing and imaging signal components. A good example case is a software radio receiver, where the ratio of sampling rate just after A/D converter and symbol rate for a supported standard may be a ratio of two large mutually prime numbers. In a digital mobile receiver, it is very important to reduce the power consumption. The power consumption in context of SRC can be reduced by designing a system that has low rate of multiplication and addition operations. This paper introduces a novel non-integer decimation method. The proposed structure is a combination of an FIR filter and a polynomial-based interpolation filter. For the special case based on a cascaded integrator-comb (CIC) filter and simple polynomial-based interpolation filter, the proposed combination has a very efficient implementation structure. The results shown in this paper indicate that the computational complexity and multiplication rate can be reduced compared to the earlier solutions.