Decimation Factor Research Articles

Design and Multiplierless Realization of Maximally Flat Sharpened-CIC Compensators

Polynomial sharpening is an efficient technique for improving folding band response of cascaded-integrator-comb (CIC) decimation filters. However, the sharpening of folding bands results in a high passband droop, which is intolerable in many applications. The droop can be reduced by connecting a symmetric finite-impulse-response filter called compensator in the cascade with the sharpened CIC (SCIC) filter. This brief presents a method for the design of such compensators, which is based on maximally flat error criterion. The compensator’s coefficients are obtained by solving a linear system of equations which is formed using a straightforward procedure. The coefficients obtained generally take real values. However, we show that for the SCIC filters incorporating integer or sum of powers of two (SPT) polynomial coefficients, and whose decimation factors are expressed as powers of two, the coefficients of corresponding maximally flat compensators are integers or SPT representable. For these types of SCIC filters, the optimum multiplierless structures of the compensators with three and five coefficients are described.

Statistical properties of quantisation noise in analogue‐to‐digital converter with oversampling and decimation

This study presents the analysis of statistical parameters of the output quantisation noise amplitude distribution in the analogue-to-digital converter (ADC) with oversampling and decimation. Hypothesis was tested that quantisation noise amplitudes on the output of the system have a Gaussian distribution. To test this hypothesis, Chi-squared statistical test was performed with parameter estimation based on grouped data. Simulation models were made for two types of ADCs: classical b-bit and sigma–delta. Various realisations of decimation filters were used as well as various values of the decimation factor. Based on the number of cases in which the hypothesis was rejected, the significance of the test was determined, i.e. the deviation from the ideal Gaussian distribution was quantified. Results of this research can prove to be useful in system design process, where accurate knowledge of the quantisation noise statistical model parameters is required. This study presents general procedure for analysing the amplitude distribution of the quantisation noise, which can easily be implemented on other modified models of the ADC with oversampling.

Development of a Low-Complexity, Cost-Effective Digital Beamformer Architecture for High-Frequency Ultrasound Imaging

This paper presents a low-complexity, cost-effective digital beamformer architecture for a high-frequency ultrasound imaging system. The proposed beamformer uses a lookup table and linear interpolation methods for computing the dynamic receive focusing delays and a postfiltering technique to minimize hardware complexity. In the postfiltering technique, channel radio-frequency data having the same fractional delay (i.e., 16f0 resolution) are aggregated prior to interpolation. Thus, only four polyphase structure filters are required in the developed beamformer. In addition, a quadrature bandpass filter that generates an analytic signal is utilized as an interpolation filter; this allows decimation during beam formation and a reduction in computational complexity. The proposed method was evaluated through a 20- [Formula: see text] wire phantom experiment, and the -6-dB lateral and axial resolutions obtained therein were measured and compared with those obtained using a conventional method. The same lateral (165 [Formula: see text]) and axial (80 [Formula: see text]) resolutions at a depth of 5.6 mm were obtained using both the methods, and the proposed method could reduce the beamforming points (i.e., computational complexity) by a factor of the decimation factor (≥4). Images from an excised bovine eye were captured; they showed that the proposed beamformer identified fine anatomical structures such as cornea or iris without compromising the spatial resolution and reduced the computational complexity.

A Hybrid Coefficient Decimation- Interpolation Based Reconfigurable Low Complexity Filter Bank for Cognitive Radio

Non uniform channelization is a crucial task in cognitive radio receivers for obtaining separate channels from the digitized wideband input signal at different intervals of time. The two main requirements in the channelizer are reconfigurability and low complexity. In this paper, a reconfigurable architecture based on a combination of Improved Coefficient Decimation Method (ICDM) and Coefficient Interpolation Method (CIM) is proposed. The proposed Hybrid Coefficient Decimation-Interpolation Method (HCDIM) based filter bank (FB) is able to realize the same number of channels realized using (ICDM) but with a maximum decimation factor divided by the interpolation factor (L), which leads to less deterioration in stop band attenuation (SA). The proposed architecture is able to realize a greater number of sub-bands locations. The proposed (HCDIM) based (FB) shows an inherent low complexity offered by the (CIM) technique when compared with the alternative FBs. The reduction in the number of multiplications is by 50.77% compared with ICDM in non-uniform channelization, while the reduction in the number of multiplications is about 59.64% over the discrete Fourier transform (DFTFB) and 31.19% over ICDM based FB in uniform channelization.
 

Novel Multiplierless Wideband Comb Compensator with High Compensation Capability

This paper proposes a novel multiplierless comb compensation filter, which has the absolute passband deviation less than 0.1 dB in the wide passband. The compensator consists of a cascade of two simple filter sections, both operating at a low rate. The magnitude characteristics of the two-component filters are synthesized as sinewave functions, in which the main design parameters correspond to the amplitudes of sinewave functions. A systematic procedure is followed to select synthesis parameters, which depend only on the number of cascaded comb filters. In particular, they are independent of the decimation factor. Comparisons with comb compensators from the literature illustrate the benefits of the proposed design.

On simple comb zero rotation: Rouche’s theorem approach

ABSTRACTThis paper presents the method for increased attenuation in comb-folding bands by using a simple comb zero rotation on the unit circle in the complex z-plane. The rotations of the zeros of the comb filter on the unit circle are achieved by adding and subtracting a positive constant to a comb-system function. Even and odd parities of the length (or decimation factor) of the comb filter are discussed separately. The resulting filter is a multiplierless, linear-phase filter with the increased widths of the comb-folding bands relative to the original comb filter. Efficient structures and the discussion how to choose the parameters of design are also provided. Finally, the comparisons, with some existing methods based on comb rotation, are also included.

Low‐complexity method for primary synchronisation in the third generation partnership project long term evolution downlink system

In this study, the authors propose a low-complexity method for symbol synchronisation in the third generation partnership project long term evolution (LTE) downlink system. The authors introduce the lowest sampling frequency of a receiver for synchronisation purposes. Using a low sampling frequency at the receiver means that the digital signal is decimated and a lower number of processing samples is needed. This results in reducing the computational complexity. It is also shown that this advantage comes at the cost of signal-to-noise ratio degradation and insertion of a systematic error in synchronisation that can be avoided by choosing a proper decimation factor. A thorough analysis is also conducted for all possible sampling frequencies that reduce the computational complexity of LTE cell search. To show the validity of the authors’ method, they implemented an LTE primary synchroniser in C++ using GNU Radio libraries and prepared a software-based radio modem, tested in different conditions. Some Monte-Carlo simulations are carried out to compare the proposed method with other low-complexity methods. These comparisons show the suggested method is faster than available techniques in literatures.

Special Issue on the 57th International Midwest Symposium on Circuits and Systems

This special issue contains extended papers of the 57th International Midwest Symposium on Circuits and Systems, selected by the Guest Editors based on reviewers’ comments, attendees paper grading and session chair recommendations. The International Midwest Symposium on Circuits and Systems is the oldest Circuits and Systems Symposium sponsored by the IEEE CAS Society. This conference contributes to its strong history by reporting the latest research results and innovations in the field of circuits and systems through Distinguished Speakers featuring the newest innovations relevant to this field and shedding light on its evolution towards breaching the gaps among technologies. MWSCAS-2014 received 336 paper submissions from 32 countries. The papers were evaluated by a minimum of three reviewers. Among all these contributions, a subset of these papers were invited for this special issue. The invited papers went through a peer review process consisting of world recognized experts in related fields. After a long journey, 15 papers were finally accepted. In the first paper, Tripurari et al., propose a wide-band RF channelizer architecture that splits the 0.6-9 GHz input spectrum in seven channels of 1.2 GHz each. The architecture enables multi-Gbps aggregate data reception with the property of agile switching between channels. The average power consumption is only 435 mW while achieving a dynamic range between 58 and 63 dB. Two compact switchless dual-band load networks for class-E power amplifier (PA) operating at 800 and 1900 MHz are reported by Li et al. The PA with transformer-based load network achieves an outstanding power added efficiency of 68.6 % at low band and 62.6 % at high band at an output power of 37.8 and 36.7 dBm, respectively. The LC-based PA shows a similar PAE of 68.3 and 60 % at low band and high band, respectively. A MIMO satellite communication system with accelerated dual paths (ADP) asynchronous design authored by Che et al., reports an asynchronous design approach for multiple input multiple output satellite communication systems. Authors employ an ADP design; the data flow between the two paths, the increase the reliability of the system by circumventing transient faults induced delay. The proposed design can decrease the delay overhead of the entire system from 43.5 to 19.8 % at the fault rate of 400/clock cycle. Ming et al., present a receiveside circuitry that merges the cancellation of both near-end and far-end crosstalk (NEXT/FEXT) and can automatically adapt to different channel environments. The techniques are demonstrated in a prototype fabricated in a 65-nm CMOS process demonstrating effective crosstalk cancellation at 10 Gb/s. Optimal two-stage comb decimators are reported by Salgado et.al. Authors show how to choose the decimation factor of the first stage in order to get simultaneously the best possible power reduction with optimal area tradeoff, in a comparison with a single cascade integrator-comb architecture. The issues related to susceptibility to supply noise in class D amplifiers are analyzed by He and coauthors. In this paper, the class D PSRR is analytically & Jose Silva-Martinez jose-silva-martinez@tamu.edu

Low power two-stage comb decimation structures for high decimation factors

This paper presents power and area analysis of two-stage comb-based decimation structures for high decimation factors. The first stage is either in a recursive form cascaded-integrator-comb (CIC) or in a non-recursive form, while the second stage is in a recursive form. The proposed structures are compared with a single CIC structure. We demonstrated how to choose the decimation factor of the first stage in order to get simultaneously the highest possible power reduction and the lowest possible area increase, in a comparison with a single CIC structure. Additionally, the modified two-stage structure with an increased attenuation and a reduced power consumption is presented. Analysis is supported by MATLAB simulations and validated by the VHDL implementations.

Reassignment and synchrosqueezing for general time–frequency filter banks, subsampling and processing

In this contribution, we extend the reassignment method (RM) and synchrosqueezing transform (SST) to arbitrary time–frequency localized filters and, in the first case, arbitrary decimation factors. A sufficient condition for the invertibility of the SST is provided. RM and SST are techniques for deconvolution of short-time Fourier and wavelet representations. In both methods, the partial phase derivatives of a complex-valued time–frequency representation are used to determine the instantaneous frequency and group delay associated to the individual representation coefficients. Subsequently, the coefficient energy is reassigned to the determined position. Combining RM and frame theory, we propose a processing scheme that benefits both from the improved localization of the reassigned representation and the frame properties of the underlying complex-valued representation. This scheme is particularly interesting for applications that require low redundancy not achievable by an invertible SST.

Lth Band Filter Design and Performance Analysis for WIMAX Application

Filters which are generally used for equalization of video signals, are an essential part of communication systems. In this paper two Nyquist filters have been compared and analyzed having different L-bands. Its implementation can be easily found in the developing communication systems, but here results are claimed for WIMAX applications. The proposed design and analysis have been developed with the help of MATLAB with same order, sampling frequency, transition width and roll off factor as per the WIMAX specifications. The filters are then decimated by a decimation factor of 4. The cost implementation of both has been taken into consideration and a result is drawn which concludes that Nyquist filter two bands is much more cost effective as compared to the Nyquist filter with three bands.

AN ANALYSIS TO DESIGN MERGED DELAY TRANSFORMED IIR DOWN SAMPLER FILTER: AN EFFICIENT DOWN SAMPLER FILTER ARCHITECTURE

An efficient architecture of Down Sampler Filter using Merged Delay Transformed Technique in terms of cost reduction and increase throughput has been proposed. The stability analysis of Merged Delay Transformed filters, finite word length effect on Transformed filters as well as conventional filters and peak error between the output from transformed IIR filters and from conventional filters have been investigated on the basis of commercially available software and mathematical calculations. The Butterworth, Chebyshev-1, Chebyshev-2 and Elliptic filters have been considered in this paper for the sake of comparison. The simulation results show that 84.59%, 73.56% and 50.83%&78.71%, 73.85% and 51.89% reduction in cost can be achieved with different specifications by using the proposed scheme when it is compared with conventional FIR filter, conventional IIR filter and conventional polyphase IIR filter, respectively. It has been elaborated that the stability of transformed IIR Decimation filters will not disturb as the Decimation Factor M increases. It is also shown that the transformed Elliptic filter is more stable and the transformed Chebyshev-2 filter is a marginally stable filter. The simulation results show that the peak error is in the range of 10 -10 to 10 -17 which increases with an increase in order of the filter. On the basis of simulation results and mathematical calculations, it is shown that the decomposition of higher order system into 1 st order and 2 nd order systems using parallel implementation architecture with Merged Delay Transform increases the processing rate of the filter and a reduction in the cost of implementation as well as peak error.

Increasing the noise immunity of signal processing units of telecommunications on the basis of the modified synchronization schemes

The paper presents mathematical models formalizing analytical description of the synthesis filters polyphasic device synchronization signal processing blocks of telecommunications. A device synchronization of telecommunications using polyphasic and polyphase filters. The peculiarity of these schemes is that they contain only three multiplications. It was determined that the fractional change speeds when interpolation and decimation factors are low enough effective filters polyphasic interpolators Farrow, who can effectively arbitrary (irrational) resampling. A simulation scheme of information transmission channel using polyphase interpolation solutions. It is shown that this approach allows for structural synthesis device clock synchronization, enhance immunity signal processing blocks and get the advantage of the modified scheme for a given level of probability of bit errors. Experimentally, the use of cubic Lagrange interpolators in the circuit block synchronization signal processing with 16QAM (experimental conditions) allows you to gain at 1.4 dB for BER = 10-4, modified interpolation scheme and agreed multiphase filtering scheme allow you to gain at 3 dB for BER = 10-4 and modified interpolation device at 3.4 dB Performance interpolation device primarily for high values .

Improved Maximally Flat Wideband CIC Compensation Filter using Sharpening Technique

paper presents the design and implementation of sharpening of maximally flat cascaded integrator comb compensation filters. The modified sharpened cascaded integrator comb compensation filter is used to improve magnitude response and gain. For wide-band compensation fourth-order linear phase filters is considered. The decimation factor of CIC filter is D and number of adders are depends upon decimation factor D. The compensation filter is a multiplier less design which works at low rate. The comparison within some methods reported in the literature is provided.

Multirate Charge-Domain Filter Design for RF-Sampling Multi-Standard Receiver

This paper proposes a reconfigurable decimator architecture for a multi-standard receiver front-end. This architecture is based on direct radio-frequency bandpass sampling and analog discrete-time multirate signal processing. The overall front-end consists of a low-noise amplifier followed by a tunable charge-domain sampler, a reconfigurable decimator, and an analog-to-digital converter. The proposed decimator is constructed as a cascade of four switched-capacitor filtering stages. The frequency responses and the decimation factors of these stages are digitally controllable thus enabling high reconfigurability. The advantages of the proposed design are a high image rejection, a low overall implementation complexity, and high flexibility. The feasibility of the design is evaluated by computer simulations.

Analysis of decimation techniques to improve computational efficiency of a frequency-domain evaluation approach for real-time hybrid simulation

Accurate actuator tracking is critical to achieve reliable real-time hybrid simulation results for earthquake engineering research. The frequency-domain evaluation approach provides an innovative way for more quantitative post-simulation evaluation of actuator tracking errors compared with existing time domain based techniques. Utilizing the Fast Fourier Transform the approach analyzes the actuator error in terms of amplitude and phrase errors. Existing application of the approach requires using the complete length of the experimental data. To improve the computational efficiency, two techniques including data decimation and frequency decimation are analyzed to reduce the amount of data involved in the frequency-domain evaluation. The presented study aims to enhance the computational efficiency of the approach in order to utilize it for future on-line actuator tracking evaluation. Both computational simulation and laboratory experimental results are analyzed and recommendations on the two decimation factors are provided based on the findings from this study.

Design of two-stage nonrecursive rotated comb decimation filters with droop compensation and multiplierless architecture

This paper proposes a class of decimation filters with reduced passband signal distortion and improved spurious signal rejection across the folding bands. These filters are well-suited to decimation of oversampled digital signals processed by wideband digital receivers and ΣΔ AD converters. The total decimation factor is split between two stages of decimation and zero rotation in a nonrecursive form is applied at the lower rate in order to reduce the computational complexity of the proposed filters. We also address a framework to implement multiplierless filters and to compensate for the passband droop introduced by this class of filters. For increased flexibility, we generalize the transfer function by allowing different orders between the two stages of decimation.The paper presents many examples to clearly describe the design procedure. Comparisons are also given with the goal of contrasting the magnitude responses of the proposed filters with the ones of three other techniques recently proposed in the literature, as well as with classical comb filters.

A simple commutativity condition for block decimators and expanders

Commutativity rules play an essential role when building multirate signal processing systems. In this paper, we focus on the interchangeability of block decimators and expanders. We, formally, prove that commutativity between these two operators is possible if and only if the data blocks are of an equal length corresponding to the greatest common divisor of the integer decimation and expansion factors.

A method to initialize free parameters in lattice structure of arbitrary-length linear phase perfect reconstruction filter bank

The optimization of the free parameters in the lattice structure of linear phase perfect reconstruction filter bank (LPPRFB) is commonly highly nonlinear, therefore the free parameters should be carefully initialized. Such methods have been published for constrained-length LPPRFB (CLLPPRFB), i.e. LPPRFB with filter length MK, where M is the decimation factor and K is an integer. In contrast to CLLPPRFB, arbitrary-length LPPRFB (ALLPPRFB) [i.e. LPPRFB with filter length MK+β, where β is an integer between 0 and M] provides more choices of filter banks, offering better trade-off between filter length and filter performance. Nevertheless, as far as we know there is no systematic study on initializing the free parameters in the lattice structure of ALLPPRFB, and the required method cannot be easily generalized from those for CLLPPRFB. To address this issue, an initialization method will be described in this paper that initializes a longer ALLPPRFB by a shorter one, and the length difference between the longer and the shorter filter banks can be any number allowed by an ALLPPRFB system. The efficiency of the proposed method will be shown by design examples and image compression experiments.

Rate Switching Filters: Model and Efficient Approximation

A filter model is proposed, allowing for the realization of a digital structure that computes a decimated version of the output signal. Each time the sampling rate is switched, pre-calculated coefficients are loaded by the processor in parallel to computing a filter state that fits the new rate. Sufficient conditions for the existence of the new state are given: holding these conditions, the sampling rate can be varied at runtime without introducing spurious transients in the output signal. The equivalence between the proposed filter model and existing polyphase networks for the efficient computation of decimated signals is discussed. If the input is null, the rate-switching structure performs a fraction of the computations that equals the decimation factor. Otherwise, the same efficiency can be achieved by linearly interpolating in between decimated input values, at the cost of introducing an error in the output signal. Particularly in the second-order case, an efficient rate-switching structure can be figured out capable of producing an error-free output also in presence of an input which is not null.