dB Dynamic Range Research Articles

A Two-Electrode, Double-Pulsed Sensor Readout Circuit for Cardiac Troponin I Measurement

This paper presents a pulse-stimulus sensor readout circuit for use in cardiovascular disease examinations. The sensor is based on a gold nanoparticle plate with an antibody post-modification. The proposed system utilizes gated pulses to detect the biomarker Cardiac Troponin I in an ionic solution. The characteristic of the electrostatic double-layer capacitor generated by the analyte is related to the concentration of Cardiac Troponin I in the solvent. After sensing by the transistor, a current-to-frequency converter (I-to-F) and delay-line-based time-to-digital converter (TDC) convert the information into a series of digital codes for further analysis. The design is fabricated in a 0.18-μm standard CMOS process. The chip occupies an area of 0.92 mm2 and consumes 125 μW. In the measurements, the proposed circuit achieved a 1.77 Hz/pg-mL sensitivity and 72.43 dB dynamic range.

A Switched-MOSFET Programmable Low-Voltage Filter

This paper describes a digitally programmable low-voltage low-power analogue filter that can be used in hearing-aid circuits. The filter employs the recently introduced switched-MOSFET technique, a sampled-data technique suitable for low supply voltage operation since it avoids the conduction gap of the switches and does not need any dedicated process. The filter was implemented using the DIMES 1.6μm CMOS process and achieves 64 dB dynamic range. The total current consumption, drawn from a 2.2V supply, equals 93μA.

A geophone-based and low-cost data acquisition and analysis system designed for microtremor measurements

Abstract. The commercial data acquisition instruments designed for three-component microtremor measurements are usually very expensive devices. In this paper, a low-cost, computer-aided, and geophone-based system designed to record, monitor, and analyze three-component microtremor data is presented. This proposed system is not a simple data acquisition system. It is also an integrated system developed to interpret the microtremor data using the horizontal-to-vertical spectral ratio (H ∕ V) method without any external software. Therefore, the H ∕ V peak frequency and amplitude can be easily estimated using this system. The proposed system has several features such as a 200 Hz sampling frequency, approximately 72 dB dynamic range, text data format, and data analysis tools. This system consists of a graphical user interface developed by using the .NET Framework 4.5.2 and external hardware that includes signal conditioning circuits, voltage converter circuit, external analog-to-digital converter, and Arduino Uno board. The proposed system uses low-cost vertical and horizontal geophones with a 4.5 Hz natural frequency to measure three-component microtremor data. The developed software undertakes many tasks such as communication between the external hardware and computer, transferring, monitoring, and recording the seismic data to the computer, and interpretation of the recorded data using the Nakamura method. Channel consistency and internal noise measurement tests were performed to demonstrate the accuracy and precision of the proposed system. The proposed system was compared to a commercial triaxial digital seismograph, and satisfactory results were obtained. The developed system is a completely open-source and open-hardware system and can be easily used in academic studies conducted by researchers and university students who are interested in seismic ambient noise analysis.

Linearity Measurements on a 5G mmWave Fiber Wireless IFoF Fronthaul Link With Analog RF Beamforming and 120° Degrees Steering

Towards the 5G millimeter Wave (mmWave) era, analog transport offers a spectrally efficient scheme for converged Fiber Wireless (FiWi) networks. Signal integrity is traditionally considered as a limiting factor due to various non-linearities attributed to the microwave photonic link, expected to be further exacerbated by the RF-chain of beamforming Phased Array Antennas (PAAs). The letter proposes the end-to-end evaluation of FiWi analog links as unified communication channels rather than separately for the radio or optical part, presenting a link with a 32-element 60 GHz PAA, 1 m V-band distance, 10 km fiber and 10 dB dynamic range. The measurements reveal a third order Intercept Point (IIP3) of 4.8 dBm, compared to 22.8 dBm exclusively for the optics, pinpointing the V-band radio as the main source of degradation rather than the microwave photonic link. Single user uplink is also benchmarked using 300 Mbd QPSK, 250 16-QAM and 100 Mbd 32-QAM, achieving data-rate up to 1 Gb/s and beamsteering of 120° degrees.

DC-100 kHz Tunable Readout IC for Impedance Spectroscopy and Amperometric Measurement of Electrochemical Sensors.

This paper presents a low-noise, front-end sensor IC that includes both AC impedance spectroscopy and DC amperometric measurement capabilities for electrochemical and biosensor applications. A common-gate current buffer topology is proposed that supports both current-mode and voltage-mode sensor signals to allow an input frequency range from DC to 100 kHz. Low-noise operation is achieved across a wide input frequency range using tunable high-pass and low-pass frequency response. In addition, an incremental delta-sigma modulator with embedded frequency response analysis serves as both on-chip impedance analyzer and current-driven analog-to-digital converter. Implemented using a 0.18 μm CMOS process, this work achieves 45 fA/√Hz input current noise density at 1 kHz. Input dynamic range exceeding 80 dB is achieved up to 10 kHz bandwidth, with a maximum of 104 dB dynamic range at 10 Hz.

Development of Reliable, High Performance WLCSP for BSI CMOS Image Sensor for Automotive Application.

To meet the urgent market demand for small package size and high reliability performance for automotive CMOS image sensor (CIS) application, wafer level chip scale packaging (WLCSP) technology using through silicon vias (TSV) needs to be developed to replace current chip on board (COB) packages. In this paper, a WLCSP with the size of 5.82 mm × 5.22 mm and thickness of 850 μm was developed for the backside illumination (BSI) CIS chip using a 65 nm node with a size of 5.8 mm × 5.2 mm. The packaged product has 1392 × 976 pixels and a resolution of up to 60 frames per second with more than 120 dB dynamic range. The structure of the 3D package was designed and the key fabrication processes on a 12” inch wafer were investigated. More than 98% yield and excellent optical performance of the CIS package was achieved after process optimization. The final packages were qualified by AEC-Q100 Grade 2.

Measurements of the angle-dependent reflectivity of plasma-facing components and assessment of the impact on the estimations of coverage of the IVVS measurements of the ITER VV

Abstract The In-Vessel Viewing System (IVVS) is a metrology instrument designed for deployment inside the ITER Vacuum Vessel (VV) to assess any damage, erosion or displacements of the Plasma-Facing Components (PFCs) through the lifetime of the ITER experiment. The latest developments of the IVVS have identified the Incidence-Angle-Dependent Reflectivity (IADR) of the PFCs to be critical to the assessment of the coverage of the IVVS within the VV. Some ITER PFC prototypes have now been manufactured and a specific instrument has been developed to measure their IADR on site, in an IVVS-like geometry with 100 dB dynamic range. This work presents the first measurements of manufactured ITER PFCs’ IADR together with an assessment of the impact of the IADR on the effective coverage of the viewing channel of the IVVS operating through amplitude-modulated lidar.

ErAs:In(Al)GaAs photoconductor-based time domain system with 4.5 THz single shot bandwidth and emitted terahertz power of 164 µW.

Superlattice structures of In(Al)GaAs with localized ErAs trap centers feature excellent material properties for terahertz (THz) generation and detection. The carrier lifetime of these materials as emitter and receiver has been measured as 1.76 ps and 0.39 ps, respectively. Packaged photoconductors driven by a 1550 nm, 90 fs commercial Toptica "TeraFlash pro" system feature a 4.5 THz single shot bandwidth with more than 60 dB dynamic range. The emitted THz power of the ErAs:In(Al)GaAs emitter versus laser power has been recorded with a pyroelectric detector calibrated by the Physikalisch Technische Bundesanstalt (PTB). The maximum power was 164 µW at a laser power of 42 mW and a bias of 200 V.

A 25Gbaud PAM-4 Linear Burst-Mode Receiver With Analog Gain- and Offset Control in 0.25μm SiGe:C BiCMOS

We present a burst-mode receiver (BMRx) whose architecture and design is optimized for linear operation up to 25Gbaud modulation rates. The linear burst-mode receiver (LBMRx) consists of a fixed-gain transimpedance amplifier, followed by a three-stage post-amplifier and a 50-ohm output buffer. The gain of the post-amplifier stages and dc-offsets of the datapath can be quickly adjusted from one burst to the next through combined feedforward (providing rapid settling) and feedback (providing accurate gain and offset control) automatic-gain-control (AGC) and automatic-offset-control (AOC) loops. When receiving 25G NRZ and assembled with a PIN photodetector, a sensitivity of −18.1 dBm and overload of at least 3.5 dBm was measured at a bit-error-rate (BER) of 1E−2, thus supporting a 21.6 dB input dynamic range. When receiving 4-level pulse amplitude modulation (PAM-4), a sensitivity of −11.4 dBm and overload of at least 4.4 dBm was measured at a low-density-parity-check (LDPC) BER reference of 1E−2, supporting 15.8 dB dynamic range. Between −10 up to 3.5 dBm the LBMRx also features internal start-of-burst (SOB) and end-of-burst (EOB) detection. Over the specified input dynamic range, the total harmonic distortion (THD) remains below 5%. The receiver was designed in a 0.25 $\mu \text{m}$ SiGe:C BiCMOS technology, occupying an area of $1.32\times 1.05$ mm2 and consumes 280 mW from a 2.5 V supply. This LBMRx can be used as front-end for new upcoming passive optical networks (PONs) that may require, e.g., electronic equalization (to overcome bandwidth limitations of opto-electronic components) or dispersion compensation; or may be used to support advanced modulation formats requiring linear operation.

Digital background calibration technique for pipelined SAR ADCs with detect‐and‐switching algorithm

A digital background calibration technique for pipelined successive approximation register (SAR) analogue-to-digital converters (ADCs) with detect-and-switching (DAS) algorithm is proposed. The DAS algorithm exploits basic combinational logic to detect the first-stage conversion results, thereby determining whether to inject a random dithering signal. So as to reduce the amplifier's output swing and avoid the saturation of the second stage, the amplitude of the injected dithering signal is reduced by only injecting the capacitor mismatch into first-stage residue voltage. By executing the DAS-based calibration in the background, capacitor mismatch and inter-stage gain are obtained. Simulation results show that the signal to noise and distortion ratio is improved from 42.4 to 59.3 dB and spurious-free dynamic range is increased from 50.6 to 79.1 dB with calibration.

Fast Acquisition Tunable High-Resolution Photon-Counting OTDR

A 15 dB dynamic range and 4.6 cm spatial resolution tunable photon-counting optical time-domain reflectometer (PC-OTDR) is presented along with a Field Programmable Gate Array (FPGA)-based detection management system that allows several regions of the fiber to be interrogated by the same optical pulse, increasing the data acquisition rate when compared to previous solutions. The optical pulse generation is implemented by a tunable figure-8 passive mode-locked laser providing pulses with the desired bandwidth and center wavelength for WDM applications in the C-band. The acquisition rate is limited by the afterpulse effect and dead time of the employed gated avalanche single-photon detectors. The devised acquisition system not only allows for centimeter-resolution monitoring of fiber links as long as 12 km in under 20 minutes but is also readily adapted to any other photon-counting strategy for increased acquisition rate. The system provides a 20-fold decrease in acquisition times when compared with state-of-the-art solutions, allowing affordable times in centimeter-resolution long-distance fiber measurements.

A CMOS Read-Out IC for Cyanobacteria Detection With 40 nApp Sensitivity and 45-dB Dynamic Range

This paper presents a low-power high-sensitivity CMOS read-out integrated circuit (ROIC) realized in a 0.13 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$ {\mu }\text{m}$ </tex-math></inline-formula> CMOS technology for cyanobacteria detection and monitoring with the current sensing capability of nano-ampere levels. The proposed CMOS ROIC consists of a current-conveyor transimpedance amplifier (CC-TIA) and a 9 bit successive approximation register (SAR) analog-to-digital converter (ADC). Electrically measured results of the proposed ROIC demonstrate 98.6 dB <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> transimpedance gain, 1.19 pA/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\surd $ </tex-math></inline-formula> Hz noise current spectral density, and 1.8 mA current consumption from a single 1.2 V supply. The ROIC can precisely recover the digital output codes corresponding to the input current levels of 40 nA <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> ~ 7.2 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu$ </tex-math></inline-formula> A <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">pp</sub> (i.e., 45 dB dynamic range). Optical experiments utilizing a 405 nm wavelength laser source and a low-cost PIN-photodiode confirm the fluorescence intensity with respect to the quantity of cyanobacteria, demonstrating that the normalized voltage (QD <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">655</sub> /QD <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">565</sub> ) is a linear function of the mcyD gene copy numbers. The CMOS ROIC chip occupies the area of 1.1 <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times$ </tex-math></inline-formula> 2.0 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

Novel test field diversity method for demonstrating magnetic resonance imaging safety of active implantable medical devices

Electromagnetic (EM) radiofrequency (RF) safety testing of elongated active implantable medical devices (AIMD) during magnetic resonance imaging (MRI) requires an RF response model of the implant to assess a wide range of exposure conditions. The model must be validated using a sufficiently large set of incident tangential electric field () conditions that provide diversified exposure. Until now, this procedure was very time consuming and often resulted in poorly defined conditions. In this paper, we propose a test field diversity (TFD) validation method that provides more diverse exposure conditions of high fidelity, thereby decreasing the number of implant routings to be tested. The TFD method is based on the finding that the amplitude and phase of along a single lead path in a cylindrical phantom can be sufficiently varied by changing the polarization of the incident 64 and 128 MHz magnetic fields inside standard birdcage test coils. The method is validated, its benefits are demonstrated, and an uncertainty budget is developed. First, the numerically determined field conditions were experimentally verified. The RF transfer function of a 90 cm long spinal cord stimulator was successfully validated with the TFD approach and excitation conditions that cover a > 10 dB dynamic range of RF-heating enhancement factors (for identical trajectory-averaged incident field strength). The new TFD method yields an improved and reliable validation of the AIMD RF response model with low uncertainty, i.e. < 1.5 dB, for both 1.5 and 3.0 T evaluations.

HATS: A Ground-Based Telescope to Explore the THz Domain

The almost unexplored frequency window from submillimeter to mid-infrared (mid-IR) may bring new clues about the particle acceleration and transport processes and the atmospheric thermal response during solar flares. Because of its technical complexity and the special atmospheric environment needed, observations at these frequencies are very sparse. The High Altitude THz Solar Photometer (HATS) is a full-Sun ground-based telescope designed to observe the continuum from the submillimeter to the mid-IR. It has a 457-mm spherical mirror with the sensor in its primary focus. The sensor is a Golay cell with high sensitivity in a very wide frequency range. The telescope has a polar mount, and a custom-built data acquisition system based on a 32 ksamples per second, 24 bits (72 dB dynamic range), 8 channels analog-to-digital board. Changing only the composition of the low- and band-pass filters in front of the Golay cell, the telescope can be setup to detect very different frequency bands; making the instrument very versatile. In this article we describe the telescope characteristics and its development status. Moreover, we give estimates of the expected fluxes during flares.

Expanding Bias-instability of MEMS Silicon Oscillating Accelerometer Utilizing AC Polarization and Self-Compensation.

This paper presents a MEMS (Micro-Electro-Mechanical System) Silicon Oscillating Accelerometer (SOA) with AC (alternating current) polarization to expand its bias-instability limited by the up-converted 1/f noise from front-end transimpedance amplifier (TIA). In contrast to the conventional DC (direct current) scheme, AC polarization breaks the trade-off between input transistor gate size and white noise floor of TIA, a relative low input loading capacitance can be implemented for low noise consideration. Besides, a self-compensation technique combining polarization source and reference in automatic-gain-control (AGC) is put forward. It cancels the 1/f noise and drift introduced by the polarization source itself, which applies to both DC and AC polarization cases. The experimental result indicates the proposed AC polarization and self-compensation strategy expand the bias-instability of studied SOA from 2.58 μg to 0.51 μg with a full scale of ± 30 g, a 155.6 dB dynamic range is realized in this work.

12 bit 3.072 GS/s 32‐way time‐interleaved pipelined ADC with digital background calibration for wideband fully digital receiver application in 65 nm complementary metal–oxide–semiconductor

The performance of a wideband receiver is highly dependent on the performance of the analogue-to-digital converter (ADC) used. Such applications require ADCs to operate at ultra-high speeds with high accuracy for inputs ranging from 40 MHz - 1 GHz. Conventional solutions either use filters and mixers to extract the frequency of interest and convert it using a low-speed ADC or use a single ultra-high-speed flash converter. Both of these solutions consume ultra-high power and require complex circuitry, which expands exponentially with the converter resolution. In this work, a 12 bit 3.072 GS/s time-interleaved pipeline ADC is proposed. In total, 32 pipeline ADCs, each with a sampling rate of 96 MS/s, are interleaved in the time domain to achieve an overall sampling rate of 3.072 GS/s. In addition to the potential energy-saving capabilities of a time-interleaving structure, the circuit adopts amplifier sharing in sample-and-hold circuits, further improving the power efficiency. To account for interleaving mismatch, the circuit uses a pure background calibration technique, maintaining the system linearity and spectral efficiency. The proposed design achieves signal-to-noise-and-distortion ratio of 53.65 dB and spurious-free dynamic range (SFDR) of 69.04 dB while consuming 820 mW of power at a 1.2 V supply, resulting in a figure-of-merit of 0.67 pJ/conv-step.

Fully Depleted, Trench-Pinned Photo Gate for CMOS Image Sensor Applications.

Tackling issues of implantation-caused defects and contamination, this paper presents a new complementary metal–oxide–semiconductor (CMOS) image sensor (CIS) pixel design concept based on a native epitaxial layer for photon detection, charge storage, and charge transfer to the sensing node. To prove this concept, a backside illumination (BSI), p-type, 2-µm-pitch pixel was designed. It integrates a vertical pinned photo gate (PPG), a buried vertical transfer gate (TG), sidewall capacitive deep trench isolation (CDTI), and backside oxide–nitride–oxide (ONO) stack. The designed pixel was fabricated with variations of key parameters for optimization. Testing results showed the following achievements: 13,000 h+ full-well capacity with no lag for charge transfer, 80% quantum efficiency (QE) at 550-nm wavelength, 5 h+/s dark current at 60 °C, 2 h+ temporal noise floor, and 75 dB dynamic range. In comparison with conventional pixel design, the proposed concept could improve CIS performance.

A 10-Bits 50-MS/s SAR ADC Based on Area-Efficient and Low-Energy Switching Scheme

This paper presents a 10-bits successive approximation register analog-to-digital converter (SAR ADC) for low-power applications. The input signals are multiplied by two because the dual sampling technique is used during the sampling phase. In this design, a comparator circuit with four input terminals was also applied to implement a fully differential capacitive digital-to-analog converter (CDAC). Simultaneously, by employing an area-efficient and low-energy switching scheme for the capacitive digital-to-analog converter, the average switching energy can be reduced significantly. The proposed design also achieved a reduction in the number of the capacitors and the controlled switches compared with those required in the conventional SAR ADC design. A prototype had been designed and implemented using TSMC 90-nm CMOS 1P9M technology. The measurement results showed that differential nonlinearity and integral nonlinearity of 0.36 least significant bit (LSB) and 0.45 LSB, respectively. At a sampling rate of 50-MS/s with a single 1.2-V power supply, the power consumption was $664~\mu \text{W}$ . This design also achieved a signal-to-noise-and-distortion ratio of 57.6 dB and spurious-free dynamic range of 65.8 dB at the input frequency of 5-MHz. The ADC core occupied an active area of $102\times 235\,\,\mu \text{m}^{2}$ .

A Coarse-Fine VCO-ADC for MEMS Microphones With Sampling Synchronization by Data Scrambling

This letter presents a mostly digital analog-to-digital converter implemented with voltage-controlled oscillators that can directly interface a capacitive MEMS microphone. The ADC is based on two ring oscillators and a coarse-line counting circuitry. Coarse and line counters are synchronized using a novel data scrambling technique to mitigate metastability and timing errors. This method enables a very low power consumption in the digital post-processing circuit. The proposed ADC, prototyped in 130-nm CMOS, achieves 73.8 dB-A of signal-to-noise and distortion ratio (SNDR) peak and 97 dB of dynamic range (DR) in a 20-kHz BW, while consuming 240 μW from the 1.5-V/1.2-V power supplies. In a reduced power mode (8 kHz BW) with relaxed oscillation parameters, it reaches 66.4 dB-A of SNDR peak and 93 dB of DR with a power consumption of only 77 μW.

A CMOS RF BeiDou-1 Transceiver for Regional Positioning and Short Message Service Applications

This paper presents a fully integrated CMOS radio-frequency (RF) transceiver for BeiDou-1, a radio determination satellite service system which can provide regional positioning and short message service. The proposed transceiver incorporates a low-IF receiver and a BPSK transmitter to realize a dual-way communication between users and the central control station via satellites. The receiver (RX) RF front-end down-converts the 2491.75 MHz RF signals to a 12.24 MHz IF band with a bandwidth of 8.16 MHz. The complex band-pass filter utilizes passive compensation technique to compensate the phase lag and achieve in-band flatness. The 4.08 Mchip/s baseband signal alternatively selects one of the differential 1615.68 MHz local signals to achieve BPSK modulation for the transmitter (TX). Besides, on-chip low dropout regulators adopt improved power supply rejection ratio techniques by integrating active filtering to obtain stable 1.5 V supply voltages. The transceiver is fabricated in a 130 nm CMOS technology and occupies an area of 5.88 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> with electrostatic discharge circuitry and pads included. The RX channel achieves a 106 dB maximum voltage gain with a 65 dB dynamic range, a 4.95 dB noise figure and a 46 dB image rejection ratio. The output power for the TX ranges from -10 dBm to 5 dBm, with a phase error less than 1.5 degree.