Abstract
This letter presents a mostly digital analog-to-digital converter implemented with voltage-controlled oscillators that can directly interface a capacitive MEMS microphone. The ADC is based on two ring oscillators and a coarse-line counting circuitry. Coarse and line counters are synchronized using a novel data scrambling technique to mitigate metastability and timing errors. This method enables a very low power consumption in the digital post-processing circuit. The proposed ADC, prototyped in 130-nm CMOS, achieves 73.8 dB-A of signal-to-noise and distortion ratio (SNDR) peak and 97 dB of dynamic range (DR) in a 20-kHz BW, while consuming 240 μW from the 1.5-V/1.2-V power supplies. In a reduced power mode (8 kHz BW) with relaxed oscillation parameters, it reaches 66.4 dB-A of SNDR peak and 93 dB of DR with a power consumption of only 77 μW.
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