CUDA Implementation Research Articles

Parallel cuda implementation of conflict detection for application to airspace deconfliction

Methods for maintaining separation between aircraft in the current airspace system rely heavily on human operators. A conflict is an event in which two or more aircraft experience a loss of minimum allowable separation. Interest has grown in developing more advanced automation tools to predict when a traffic conflict is going to occur and to assist in its resolution. The term air space deconfliction is used to describe the resolution of conflicts after they have been predicted or detected. Due to the computationally intensive character of conflict detection and airspace deconfliction, as well as their data parallel nature, they are naturally amenable to parallel processing. This work discusses a parallel implementation of a conflict detection algorithm for application to airspace deconfliction. It uses the NVIDIA Quadro FX 5800 and the Tesla C1060 graphical processing units (GPUs) in conjunction with the Compute Unified Device Architecture (CUDA) hardware/software architecture. Details of the implementation are discussed, including the use of streams for asynchronous programming and the use of multiple GPUs. The performance of the parallel implementation is compared to that of an equivalent sequential version and shown to exhibit improvement in execution time. Recommendations are provided to further improve performance of the algorithm.

Yet another Hybrid Strategy for Auto-tuning SpMV on GPUs

Sparse matrix-vector multiplication (SpMV) is a key linear algebra algorithm and is widely used in many application domains. Besides multi-core architecture, there is also extensive research focusing on accelerating SpMV on many-core Graphics Processing Units (GPUs). SpMV computations have many indirect and irregular memory accesses, and load imbalance could occur while mapping computations onto single-instruction, multiple-data (SIMD) GPUs. SpMV is highly memory bandwidth-bound, though GPUs have massive computational resources, the performance of SpMV on GPUs is still unsatisfying. In this paper, we present a new hybrid strategy for auto-tuning SpMV on GPUs. Our strategy combines the advantages of row-major storage and column-major storage. Like many other strategies, we reordered a given sparse matrix according to row lengths in decreasing order. In order to be more adaptive and efficient, we proposed a new hybrid Blocked CSR and JDS (BCJ) format based on original CSR and JDS. BCJ splits a sparse matrix into a denser part and a sparser part after reordering and uses different kernels to process the corresponding part. And we proposed corresponding auto-tuning framework to help transforming matrix and launching kernels according to the sparsity characteristics of the matrix. A CUDA implementation of BCJ outperforms the original formats significantly on a broad range of unstructured sparse matrices.

Interactive Disassembly Planning for Complex Objects

AbstractWe present an approach for the automatic generation, interactive exploration and real‐time modification of disassembly procedures for complex, multipartite CAD data sets. In order to lift the performance barriers prohibiting interactive disassembly planning, we run a detailed analysis on the input model to identify recurring part constellations and efficiently determine blocked part motions in parallel on the GPU. Building on the extracted information, we present an interface for computing and editing extensive disassembly sequences in real‐time while considering user‐defined constraints and avoiding unstable configurations. To evaluate the performance of our C++/CUDA implementation, we use a variety of openly available CAD data sets, ranging from simple to highly complex. In contrast to previous approaches, our work enables interactive disassembly planning for objects which consist of several thousand parts and require cascaded translations during part removal.

A direct tridiagonal solver based on Givens rotations for GPU architectures

g-Spike, a parallel algorithm for solving general nonsymmetric tridiagonal systems for the GPU, and its CUDA implementation are described. The solver is based on the Spike framework, applying Givens rotations and QR factorization without pivoting. It also implements a low-rank modification strategy to compute the Spike DS decomposition even when the partitioning defines singular submatrices along the diagonal. The method is also used to solve the reduced system resulting from the Spike partitioning. Numerical experiments with problems of high order indicate that g-Spike is competitive in runtime with existing GPU methods, and can provide acceptable results when other methods cannot be applied or fail.

Attract-Repulse Fireworks Algorithm and its CUDA Implementation Using Dynamic Parallelism

Fireworks Algorithm (FWA) is a recently developed Swarm Intelligence Algorithm (SIA), which has been successfully used in diverse domains. When applied to complicated problems, many function evaluations are needed to obtain an acceptable solution. To address this critical issue, a GPU-based variant (GPU-FWA) was proposed to greatly accelerate the optimization procedure of FWA. Thanks to the active studies on FWA and GPU computing, many advances have been achieved since GPU-FWA. In this paper, a novel GPU-based FWA variant, Attract-Repulse FWA (AR-FWA), is proposed. AR-FWA introduces an efficient adaptive search mechanism (AFW Search) and a non-uniform mutation strategy for spark generation. Compared to the state-of-the-art FWA variants, AR-FWA can greatly improve the performance on complicated multimodal problems. Leveraging the edge-cutting dynamic parallelism mechanism provided by CUDA, AR-FWA can be implemented on the GPU easily and efficiently.

Performance Analysis of Multi-GPU Implementations of Krylov-Subspace Methods Applied to FEA of Electromagnetic Phenomena

We present a comparison of performances of various graphic processing unit (GPU)-CUDA implementations of preconditioned Krylov-subspace methods, showing the impact of using a multi-GPU configuration. We aim to show that this resource allows the massively parallelized solution of large-scale real-world problems in state-of-the-art desktop PCs, since it overcomes the low-memory capacity of a single GPU, while still providing significant speedups when compared with either the usual sequential execution on a single-core CPU or an OpenMP implementation with four cores. The methods were selected based on their suitability to solve large-scale systems of equations arising from the 3-D finite-element analysis of open-bound earth current diffusion problems, both in steady state and under time-harmonic loading. In the latter, an ungauged harmonic edge-element formulation using the magnetic vector potential and the electric scalar potential was used. As the preconditioners suitable to this case, based on incomplete factorizations, are not appropriate for parallelization, we propose a hybrid CPU-GPU scheme to solve such problems, which still exhibits a competitive performance in low-cost PC desktops.

Improving Map-Reduce for GPUs with cache

Applications need specific or custom optimisations to completely exploit the compute capabilities of the underlying hardware. This is often a very tedious task for the programmer. Moreover, many of these applications do not scale well with data size. The Map-Reduce MR framework provides a high level of abstraction to map these applications onto the distributed/parallel architectures, but with a large performance penalty. We analyse a state-of-the-art MR framework to assess its performance penalty. The primary objective of this work is to reduce the performance gap between MR and native compute unified device architecture CUDA implementation of the applications onlyCUDA. This work reports deployment of three applications on graphics processor units GPUs using MR framework. We study the performance of these applications on modern GPUs with different cache configurations. The results show that the performance of the applications with MR framework does not decline much if the reconfigurable cache of modern GPUs is utilised properly. We show penalty reduction of 5×, 6.45× and 15.87× for SmithWaterman SW algorithm, N-body NB simulation, and Blowfish BF algorithm, respectively.

A CUDA Implementation of the All-Pairs N-Body Algorithm

Removed due to plagiarism

A model-driven blocking strategy for load balanced sparse matrix–vector multiplication on GPUs

Sparse Matrix–Vector multiplication (SpMV) is one of the key operations in linear algebra. Overcoming thread divergence, load imbalance and un-coalesced and indirect memory access due to sparsity and irregularity are challenges to optimizing SpMV on GPUs.In this paper we present a new Blocked Row–Column (BRC) storage format with a two-dimensional blocking mechanism that addresses these challenges effectively. It reduces thread divergence by reordering and blocking rows of the input matrix with nearly equal number of non-zero elements onto the same execution units (i.e., warps). BRC improves load balance by partitioning rows into blocks with a constant number of non-zeros such that different warps perform the same amount of work. We also present an approach to optimize BRC performance by judicious selection of block size based on sparsity characteristics of the matrix.A CUDA implementation of BRC outperforms NVIDIA CUSP and cuSPARSE libraries and other state-of-the-art SpMV formats on a range of unstructured sparse matrices from multiple application domains. The BRC format has been integrated with PETSc, enabling its use in PETSc’s solvers. Furthermore, when partitioning the input matrix, BRC achieves near linear speedup on multiple GPUs.

GPU Accelerated Self-Organizing Map for High Dimensional Data

The self-organizing map (SOM) model is an effective technique applicable in a wide range of areas, such as pattern recognition and image processing. In the SOM model, the most time-consuming procedure is the training process. It consists of two time-consuming parts. The first part is the calculation of the Euclidean distances between training vectors and codevectors. The second part is the update of the codevectors with the pre-defined neighborhood structure. This paper proposes a graphics processing unit (GPU) algorithm that accelerates these two parts using the graphics rendering ability of GPUs. The distance calculation is implemented in the form of matrix multiplication with compute shader, while the update process is treated as a point-rendering process with vertex shader and fragment shader. Experimental results show that our algorithm runs much faster than previous CUDA implementations, especially for the large neighborhood case. Also, our method can handle the case with large codebook size and high dimensional data.

High-performance implementations and large-scale validation of the link-wise artificial compressibility method

The link-wise artificial compressibility method (LW-ACM) is a recent formulation of the artificial compressibility method for solving the incompressible Navier–Stokes equations. Two implementations of the LW-ACM in three dimensions on CUDA enabled GPUs are described. The first one is a modified version of a state-of-the-art CUDA implementation of the lattice Boltzmann method (LBM), showing that an existing GPU LBM solver might easily be adapted to LW-ACM. The second one follows a novel approach, which leads to a performance increase of up to 1.8× compared to the LBM implementation considered here, while reducing the memory requirements by a factor of 5.25. Large-scale simulations of the lid-driven cubic cavity at Reynolds number Re=2000 were performed for both LW-ACM and LBM. Comparison of the simulation results against spectral elements reference data shows that LW-ACM performs almost as well as multiple-relaxation-time LBM in terms of accuracy.

A low-cost-memory CUDA implementation of the conjugate gradient method applied to globally supported radial basis functions implicits

Hermitian radial basis functions implicits is a method capable of reconstructing implicit surfaces from first-order Hermitian data. When globally supported radial functions are used, a dense symmetric linear system must be solved. In this work, we aim at exploring and computing a matrix-free implementation of the Conjugate Gradients Method on the GPU in order to solve such linear system. The proposed method parallelly rebuilds the matrix on demand for each iteration. As a result, it is able to compute the Hermitian-based interpolant for datasets that otherwise could not be handled due to the high memory demanded by their linear systems.

Parallel tempering simulation of the three-dimensional Edwards–Anderson model with compact asynchronous multispin coding on GPU

Monte Carlo simulations of the Ising model play an important role in the field of computational statistical physics, and they have revealed many properties of the model over the past few decades. However, the effect of frustration due to random disorder, in particular the possible spin glass phase, remains a crucial but poorly understood problem. One of the obstacles in the Monte Carlo simulation of random frustrated systems is their long relaxation time making an efficient parallel implementation on state-of-the-art computation platforms highly desirable. The Graphics Processing Unit (GPU) is such a platform that provides an opportunity to significantly enhance the computational performance and thus gain new insight into this problem. In this paper, we present optimization and tuning approaches for the CUDA implementation of the spin glass simulation on GPUs. We discuss the integration of various design alternatives, such as GPU kernel construction with minimal communication, memory tiling, and look-up tables. We present a binary data format, Compact Asynchronous Multispin Coding (CAMSC), which provides an additional 28.4% speedup compared with the traditionally used Asynchronous Multispin Coding (AMSC). Our overall design sustains a performance of 33.5 ps per spin flip attempt for simulating the three-dimensional Edwards–Anderson model with parallel tempering, which significantly improves the performance over existing GPU implementations.

Large-scale parallelization based on CPU and GPU cluster for cosmological fluid simulations

We present our parallel implementation for large-scale cosmological simulations of 3D supersonic fluids based on CPU and GPU clusters. Our developments are based on a CPU code named WIGEON. It is shown that, compared to the original sequential Fortran code, a speedup of 19–31 (depending on the specific GPU card) can be achieved on single GPU. Furthermore, our results show that the pure MPI parallelization scales very well up to 10 thousand CPU cores. In addition, a hybrid CPU/GPU parallelization scheme is introduced and a detailed analysis of the speedup and the scaling on the different number of CPU/GPU units are presented (up to 256 GPU cards due to computing resource limitation). Our high scalability and speedup rely on the domain decomposition approach, optimization of the algorithm and a series of techniques to optimize the CUDA implementation, especially in the memory access pattern on GPU. We believe this hybrid MPI+CUDA code can be an excellent candidate for 10 Peta-scale computing and beyond.

水面の品質と計算速度のための流体シミュレーションと可視化

A mesh-free method MPS is implemented for fluid simulation. A Marching Cubes method is applied to obtain the free surface of the fluid which is represented by particles. We used a cubic spline instead of the weight function to map particle data into the scalar field in 3D space. The method shows smoothness in surface representation. Then we give a CUDA implementation of both the simulation part and the rendering part, and for performance consideration, a novel method for neighbor particle searching is given. We finally get a near real-time outcome running at a frame rate of 30fps.

Advances in Multi-GPU Smoothed Particle Hydrodynamics Simulations

We present a multi-GPU version of GPUSPH, a CUDA implementation of fluid-dynamics models based on the smoothed particle hydrodynamics (SPH) numerical method. The SPH is a well-known Lagrangian model for the simulation of free-surface fluid flows; it exposes a high degree of parallelism and has already been successfully ported to GPU. We extend the GPU-based simulator to run simulations on multiple GPUs simultaneously, to obtain a gain in speed and overcome the memory limitations of using a single device. The computational domain is spatially split with minimal overlapping and shared volume slices are updated at every iteration of the simulation. Data transfers are asynchronous with computations, thus completely covering the overhead introduced by slice exchange. A simple yet effective load balancing policy preserves the performance in case of unbalanced simulations due to asymmetric fluid topologies. The obtained speedup factor (up to 4.5x for 6 GPUs) closely follows the expected one (5x for 6 GPUs) and it is possible to run simulations with a higher number of particles than would fit on a single device. We use the Karp-Flatt metric to formally estimate the overall efficiency of the parallelization.

CUDA programs for the GPU computing of the Swendsen–Wang multi-cluster spin flip algorithm: 2D and 3D Ising, Potts, and XY models

We present sample CUDA programs for the GPU computing of the Swendsen–Wang multi-cluster spin flip algorithm. We deal with the classical spin models; the Ising model, the q-state Potts model, and the classical XY model. As for the lattice, both the 2D (square) lattice and the 3D (simple cubic) lattice are treated. We already reported the idea of the GPU implementation for 2D models (Komura and Okabe, 2012). We here explain the details of sample programs, and discuss the performance of the present GPU implementation for the 3D Ising and XY models. We also show the calculated results of the moment ratio for these models, and discuss phase transitions. Program summaryProgram title: SWspinCatalogue identifier: AERM_v1_0Program summary URL:http://cpc.cs.qub.ac.uk/summaries/AERM_v1_0.htmlProgram obtainable from: CPC Program Library, Queen’s University, Belfast, N. IrelandLicensing provisions: Standard CPC licence, http://cpc.cs.qub.ac.uk/licence/licence.htmlNo. of lines in distributed program, including test data, etc.: 5632No. of bytes in distributed program, including test data, etc.: 14688Distribution format: tar.gzProgramming language: C, CUDA.Computer: System with an NVIDIA CUDA enabled GPU.Operating system: System with an NVIDIA CUDA enabled GPU.Classification: 23.External routines: NVIDIA CUDA Toolkit 3.0 or newerNature of problem:Monte Carlo simulation of classical spin systems. Ising, q-state Potts model, and the classical XY model are treated for both two-dimensional and three-dimensional lattices.Solution method:GPU-based Swendsen–Wang multi-cluster spin flip Monte Carlo method. The CUDA implementation for the cluster-labeling is based on the work by Hawick et al. [1] and that by Kalentev et al. [2].Restrictions:The system size is limited depending on the memory of a GPU.Running time:For the parameters used in the sample programs, it takes about a minute for each program. Of course, it depends on the system size, the number of Monte Carlo steps, etc.

Communication Optimization for Multi GPU Implementation of Smith-Waterman Algorithm

GPU parallelism for real applications can achieve enormous performance gain. CPU-GPU Communication is one of the major bottlenecks that limit this performance gain. Among several libraries developed so far to optimize this communication, DyManD (Dynamically Managed Data) provides better communication optimization strategies and achieves better performance on a single GPU. SmithWaterman is a well known algorithm in the field of computational biology for finding functional similarities in a protein database. CUDA implementation of this algorithm speeds up the process of sequence matching in the protein database. When input databases are large, multi-GPU implementation gives better performance than single GPU implementation. Since this algorithm acts upon large databases, there is need for optimizing CPU-GPU communication. DyManD implementation provides efficient data management and communication optimization only for single GPU. For providing communication optimization on multiple GPUs, an approach of combining DyManD with a multi-threaded framework called GPUWorker was proposed. Our contribution in this work is to propose an optimized CUDA implementation of this algorithm on multiple GPUs i.e., GPUWorker-DyManD which reduces the communication overhead between CPU and multiple GPUs. This implementation combines DyManD functionality with GPUWorker for optimizing communication. The performance gain obtained for the GPUWorker-DyManD implementation of this algorithm over default multi-GPU implementation is 3.5x.

A parallel lattice Boltzmann method for large eddy simulation on multiple GPUs

To improve the simulation efficiency of turbulent fluid flows at high Reynolds numbers with large eddy dynamics, a CUDA-based simulation solution of lattice Boltzmann method for large eddy simulation (LES) using multiple graphics processing units (GPUs) is proposed. Our solution adopts the "collision after propagation" lattice evolution way and puts the misaligned propagation phase at global memory read process. The latest GPU platform allows a single CPU thread to control up to four GPUs that run in parallel. In order to make use of multiple GPUs, the whole working set is evenly partitioned into sub-domains. We implement Smagorinsky model and Vreman model respectively to verify our multi-GPU solution. These two LES models have different relaxation time calculation behavior and lead to different CUDA implementation characteristics. The implementation based on Smagorinsky model achieves 190 times speedup over the sequential implementation on CPU, while the implementation based on Vreman model archives more than 90 times speedup. The experimental results show that the parallel performance of our multi-GPU solution scales very well on multiple GPUs. Therefore large-scale (up to 10,240 $$\times $$ × 10,240 lattices) LES---LBM simulation becomes possible at a low cost, even using double-precision floating point calculation.

CUDA-enabled Sparse Matrix–Vector Multiplication on GPUs using atomic operations

Existing formats for Sparse Matrix–Vector Multiplication (SpMV) on the GPU are outperforming their corresponding implementations on multi-core CPUs. In this paper, we present a new format called Sliced COO (SCOO) and an efficient CUDA implementation to perform SpMV on the GPU using atomic operations. We compare SCOO performance to existing formats of the NVIDIA Cusp library using large sparse matrices. Our results for single-precision floating-point matrices show that SCOO outperforms the COO and CSR format for all tested matrices and the HYB format for all tested unstructured matrices on a single GPU. Furthermore, our dual-GPU implementation achieves an efficiency of 94% on average. Due to the lower performance of existing CUDA-enabled GPUs for atomic operations on double-precision floating-point numbers the SCOO implementation for double-precision does not consistently outperform the other formats for every unstructured matrix. Overall, the average speedup of SCOO for the tested benchmark dataset is 3.33 (1.56) compared to CSR, 5.25 (2.42) compared to COO, 2.39 (1.37) compared to HYB for single (double) precision on a Tesla C2075. Furthermore, comparison to a Sandy-Bridge CPU shows that SCOO on a Fermi GPU outperforms the multi-threaded CSR implementation of the Intel MKL Library on an i7-2700 K by a factor between 5.5 (2.3) and 18 (12.7) for single (double) precision. Source code is available at https://github.com/danghvu/cudaSpmv.