Cube Network Research Articles

Multicommodity flows in simple multistage networks

AbstractIn this paper, we consider the integral multicommodity flow problem on directed graphs underlying two classes of multistage interconnection networks. In one direction, we consider three‐stage networks. Using existing results on (g, f)‐factors of bipartite graphs, we show sufficient and necessary conditions for the existence of a solution when the network has at most two secondary switches. In contrast, the problem is shown to be NP‐complete if the network has three or more secondaries. In a second direction, we introduce a recursive class of networks that includes multistage hypercubic networks (such as the omega network, the indirect binary n‐cube, and the generalized cube network) as a proper subset. Networks in the new class may have an arbitrary number of stages. Moreover, each stage may contain identical switches of any arbitrary size. The notion of extrastage networks is extended to the new class, and the problem is shown to have polynomial time solutions on r‐stage networks where r = 3 or where each link has a unit capacity and r ≥ 3. The latter result implies an efficient algorithm for deciding admissible permutations on conventional extrastage hypercubic networks. In contrast, we show that the multicommodity flow problem is NP‐complete on extrastage networks, even if r = 6, each link has an integral capacity ≤ 3, and all flow demands are equal.

The Application of Metamodeling to Interconnection Network Analysis

Metamodeling is demonstrated as a methodology to accurately and concisely characterize the behavior of parallel processing interconnection networks. A set of mathematical metamodels are derived from a discrete event simulation model and then used to predict and compare the performance of interconnection networks. To illustrate the development and the application of metamodels, models for the multistage cube network, the single stage cube network (hypercube), and the llliac IV mesh-type network are formulated. These models, validated using empirical data from earlier studies, provide compact mathematical relations between packet delay time, message load, and switch size for each interconnection architecture. This approach provides insight into the complexities of network performance and uses simulation as the experimental vehicle for theoretical development. We show the comparison of network performance and conclude that the use of simulation as a means to estimate mathematical models is beneficial and consistent with experimental evidence. Our metamodels for performance prediction establish a basis for future comparisons that can be directly applied by other researchers. The models give the designer of a parallel processing system additional insight for choosing the interconnection network which best suits the application needs. INFORMS Journal on Computing, ISSN 1091-9856, was published as ORSA Journal on Computing from 1989 to 1995 under ISSN 0899-1499.

Optimal communication channel utilization for matrix transposition and related permutations on binary cubes

We present optimal schedules for permutations in which each node sends one or several unique messages to every other node. With concurrent communication on all channels of every node in binary cube networks, the number of element transfers in sequence for K elements per node is K 2 , irrespective of the number of nodes over which the data set is distributed. For a succession of s permutations within disjoint subcubes of d dimensions each, our schedules yield min ( K 2 +(s−1)d,(s+3)d, K 2 +2d) exchanges in sequence. The algorithms can be organized to avoid indirect addressing in the internode data exchanges, a property that increases the performance on some architectures. For message-passing communication libraries, we present a blocking procedure that minimizes the number of block transfers while preserving the utilization of the communication channels. For schedules with optimal channel utilization, the number of block transfers for a binary d-cube is d. The maximum block size for K elements per node is ⌈ K (2d) ⌉.

Binary Cube Emulation of Butterfly Networks Encoded by Gray Code

We present algorithms for binary cube networks that emulate butterfly network computations on binary-reflected Gray-coded data in the same time complexity as that required for binary-coded data. The code conversion required for the emulation with binary-reflected Gray-coded data is either performed in local memories or through concurrent exchanges. The emulation of a butterfly network with one or two rows mapped to each binary cube node requires n communication cycles on an n-cube. For more than two rows per node, one additional communication cycle is required for every pair of rows, with concurrent communication on all channels of every node. The encoding upon completion can be either binary, or binary-reflected Gray code, or any combination thereof, without affecting the communication complexity.

The Full-Cube topology: Properties and routing

This paper presents the Full-Cube, a versatile cube network built by merging the Cube and Complementary-Cube (Co-Cube) networks. Compared to the Hypercube, the Full-Cube has double the number of links while maintaining the same number of nodes. Some of the properties of a 2 n -node Full-Cube are: an [ n 2 ] diameter, O( n2 n ) link cost, considerably more redundant paths connecting any two nodes than the Hypercube leading to a higher tolerance of link faults, and a significantly larger number of partitions into subcubes. Furthermore, for practical hypercube sizes, the average internode distance of the cube, which directly affects the message communication time, is shown to be reduced by approximately 20–35% in the Full-Cube. Like the Hypercube, the Full-Cube offers extendability and a fixed node complexity, and simple distributed one-to-one and multicast routing algorithms. We discuss the properties of the Full-Cube and present distributed routing algorithms for one-to-one and multicast communication.

Adding multiple-fault tolerance to generalized cube networks

Generalized cube networks are limited to single-fault tolerance with respect to permutation connections. The vector space approach presented here yields many fault-tolerance schemes that can tolerate two and three faults. In each scheme, redundant switches and links are added to networks and interconnected in certain ways. These redundancies are represented by a matrix called the redundancy matrix. A fault-free network without redundancy is represented by an identity matrix. As faulty switches and links are discovered, the remaining switches and links are remapped to establish an intact network. The remapping is analogous to converting an invertible redundancy matrix back to an identity matrix. >

Predicting Performance and Selecting Modes of Parallelism: A Case Study Using Cyclic Reduction on Three Parallel Machines

Mapping cyclic reduction, a known approach for the parallel solution of tridiagonal and block tridiagonal systems of equations, onto the MasPar MP-1, nCUBE 2, and PASM parallel processing systems is discussed. Each of these represents a different mode of parallelism that can be used in the design of supercomputers. The MasPar MP-1 is a commercially available SIMD system with near-neighbor and multiplexed-multistage communications networks, the nCUBE 2 is a commercially available MIMD system with a partitionable hypercube communication network, and PASM is an experimental partitionable-SIMD/MIMD mixed-mode machine with a partitionable multistage cube network. Specific issues addressed here are SIMD/MIMD trade-offs, the effect on execution time of increasing the number of processors used, the impact of the interprocessor communications network on performance, the importance of predicting algorithm performance as a function of the mapping used, and the advantages of a partitionable system. Analytical results are validated by experimentation on all three machines.

All-To-All Broadcast and Applications On the Connection Machine

An all-to-all broadcast algorithm that exploits concur rent communication on all channels of the Connection Machine system CM-200 binary cube network is de scribed. Issues in integrating a physical all-to-all broad cast between processing nodes into a language envi ronment using a global address space are discussed. Timings for the physical broadcast between nodes and for the virtual broadcast are given. The peak data transfer rate for the physical broadcast on a CM-200 is 5.9 gigabytes/sec, and the peak rate for the virtual broadcast is 31 gigabytes/sec. Array reshaping is an effective performance optimization technique. An ex ample is given where reshaping improved perfor mance by a factor of 7 by reducing the amount of local data motion. We also show how to exploit symmetry for computation of an interaction matrix using the all- to-all broadcast function. Further optimizations are suggested for N-body-type calculations. Using the all- to-all broadcast function, a peak rate of 9.3 GFLOPS/ sec has been achieved for the N-body computations in 32-bit precision on a 2,048 node Connection Machine system CM-200.

Performance modeling of distributed memory architectures

We provide performance models for several primitive operations on data structures distributed over memory units interconnected by a Boolean cube network. In particular, we model single-source and multiple-source concurrent broadcasting or reduction, concurrent gather and scatter operations, shifts along several axes of multidimensional arrays, and emulation of butterfly networks. We also show how the processor configuration, the data aggregation, and the encoding of the address space affect the performance for two important basic computations: the multiplication of arbitrarily shaped matrices and the Fast Fourier Transform. We also give an example of the performance behavior for local matrix operations for a processor with a single path to local memory and a set of processor registers. The analytic models are verified by measurements on the Connection Machine Model CM-2.

Fault-tolerant reconfigurable architecture for robot kinematics and dynamics computations

Efficient parallel algorithms for computing the kinematics, dynamics, and Jacobian of manipulators and their corresponding inverses are discussed and analyzed, and their characteristics are identified based on the type and degree of parallelism, uniformity of the operations, fundamental operations, data dependencies, and communication requirements. Most of the algorithms for robotic computations possess highly regular properties and some common structures, especially the linear recursive structure. They are well-suited to be implemented on a single-instruction-stream-multiple-data-stream (SIMD) computer with reconfigurable interconnection networks. A reconfigurable dual-network SIMD machine with internal direct feedback that best matches these characteristics has been designed. To achieve high efficiency in the computation of robotics algorithms on the proposed parallel machine, a generalized cube interconnection network is proposed. A centralized network switch control scheme is developed to support the pipeline timing of this machine. To maintain high reliability in the overall system, a fault-tolerant generalized cube network is designed to improve the original network. >

The B-network: a multistage interconnection network with backward links

A multistage interconnection network (MIN) for multiprocessor systems is proposed. The proposed MIN, called the B-network, uses backward links to provide backward paths for the requests blocked at switches or memory due to contentions. The gamma network is known to contain a cube network (specifically, the inverse omega network) as a substructure. The B-network is obtained from the gamma network by preserving the cube structure but reversing the direction of all other links. These backward links are used as alternate paths for requests blocked due to path or memory contentions. The B-network can be controlled by the simple destination tag control algorithm; packets navigating through the B-network, using both regular forward links and backward links, can reach their destinations under the destination tag control. The performance of the B-network is analyzed under the uniform traffic model and compared to various networks of interest. It is shown that the B-network surpasses the performance of the gamma network, the crossbar switch, and single-buffered MINs based on (2*2) switches, while having the same hardware complexity as the gamma network.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A distributed management scheme for partitionable parallel computers

A distributed scheme for dynamic partitioning is investigated. Distributed procedures to split a subsystem and to combine subsystems are presented. The correctness of each of these two procedures is shown, and the complexity is analyzed. The procedures are applicable to parallel computers that use interconnection networks, such as hypercube, omega, multistage cube, and extra-stage cube networks.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The PM221 interconnection network

A scheme based on the standard multiplier recoding technique that enables the use of (5*5) switches for PM2I networks is presented. The connections between switching stages are based on the modified PM2I functions, and are called plus-minus-2/sup 2i/ (PM22I); hence, these networks are called the PM22I networks. Since the number of switching stages in the PM22I networks is one-half of those in the PM2I networks, with a moderate increase in the switch size from (3*3) to (5*5), these networks provide similar design tradeoffs availability by the (2*2) and (4*4) cube networks. >

Using the multistage cube network topology in parallel supercomputers

A critical component of any large-scale parallel processing system is the interconnection network that provides a means for communication along the system's processors and memories. Attributes of the multistage cube topology that have made it an effective basis for interconnection networks and the subject of much ongoing research are reviewed. These attributes include O(N log/sub 2/N) cost for an N-input/output network, decentralized control, a variety of implementation options, good data-permuting capability to support single-instruction-stream/multiple-data-stream (SIMD) parallelism, good throughput to support multiple-instruction-stream/multiple-data-stream (MIMD) parallelism, and ability to be partitioned into independent subnetworks to support reconfigurable systems. Examples of existing systems that use multistage cube networks are considered. The multistage cube topology can be converted into a single-stage network by associating with each switch in the network a processor (and a memory). Properties of systems that use the multistage cube network in this way are examined.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Design and analysis of dynamic redundancy networks

The dynamic redundancy (DR) network is investigated in relation to fault-tolerant design for multistage interconnection network (MIN) based systems. The DR network can tolerate faults in the network and support a system to tolerate processing element (PE) faults without degradation by adding spare PEs, while retaining the full capability of a multistage cube network. A variation of the DR network, the reduced DR network, is also considered, that can be implemented more cost effectively than the DR while retaining most of the advantages of the DR. The reliabilities of DR-based systems with one spare PE and the reliabilities of systems with no spare PEs are estimated and compared, and the effect of adding multiple spare PEs is analyzed. >

How robust is the n-cube?

The n -cube network is called faulty if it contains any faulty processor or any faulty link. For any number k we want to compute the minimum number f(n, k) of faults which is necessary for an adversary to make every ( n − k )-dimensional subcube faulty. Reversely formulated: The existence of an ( n − k )-dimensional non-faulty subcube can be guaranteed, if there are less than f(n, k) faults in the n -cube. In this paper several lower and upper bounds for f(n, k) are derived such that the resulting gaps are “small.” For instance if k ≥ 2 is constant, then f(n, k) = θ(logn). Especially for k = 2 and large n : f(n, 2) ∈ [[α n ⌉]: [α n ]⌉ + 2], where α n =logn + ½ log log n + ½. Or if k = ω(log log n ) then 2 k < f(n, k) < 2 (1 + ɛ)k , with ɛ chosen arbitrarily small. The aforementioned upper bounds are obtained by analysing the behaviour of an adversary who makes “worst-case” distributions of a given number of faulty processors. For k = 2 the “worst-case” distribution is obtained constructively. In the general case the constructive methods presented in this paper lead to a (rather “bad”) upper bound which can be significantly improved by probabilistic arguments. The bounds mentioned above change if the notions are relativized with respect to some given parallel fault-checking procedure P . In this case only subcubes which are possible outputs of P must be made faulty by the adversary. The notion of directed chromatic index is defined in order to analyse the case k = 2. Relations between the directed chromatic index and the chromatic number are derived, which are of interest in their own right.

Graph theoretic reliability analysis for the Boolean n cube networks

Two graph-theoretic results concerning Boolean n-cube network reliability are presented. First, a simple formula for the number of spanning trees of the Boolean n-cube network is derived. As a result, the reliability function for large failure rate can be readily computed. Second, the Boolean n-cube network is proved to have the super-line-connectivity property. Thus the number of line-disconnecting sets (a set of lines the removal of which results in a disconnected or trivial graph) or order lambda for the Boolean n-cube network is equal to 2/sup n/.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

On the design of a new arbitration network

An arbitration network with an unequal number of inputs and outputs (8 × 4) is described. The binary n-cube networks, (ESC) extra stage cube network, and various redundant networks like gamma network, are N × N networks and have an equal number of inputs and outputs. The network described is re-arrangeable and achieves all possible permutations. It is self-routing with a simple routing tag. The fault tolerance properties of the network are discussed. The interconnection networks are suitable for VLSI implementation.

The forwarding index of communication networks

A network is defined as an undirected graph and a routing which consists of a collection of simple paths connecting every pair of vertices in the graph. The forwarding index of a network is the maximum number of paths passing through any vertex in the graph. Thus it corresponds to the maximum amount of forwarding done by any node in a communication network with a fixed routing. For a given number of vertices, each having a given degree constraint, we consider the problem of finding networks that minimize the forwarding index. Forwarding indexes are calculated' for cube networks and generalized de Bruijn networks. General bounds are derived which show that de Bruijn networks are asymptotically optimal. Finally, efficient techniques for building large networks with small forwarding indexes out of given component networks are presented and analyzed.

An introduction to the multistage cube family of interconnection networks

The interconnection network in large-scale parallel/distributed supercomputer systems is a crucial component. Three networks are overviewed here. Multistage cube networks represent an important family of networks, which includes the omega, n-cube, multistage shuffle-exchange, delta, baseline, SW-banyan, and Generalized Cube. This family has been used or proposed for use in such systems as staran, pasm, Ultracomputer, the BBN Butterfly, the IBM RP3, and data-flow machines. The multistage cube topology, distributed routing control, and ability to be partitioned into independent subnetworks are examined. The Extra Stage Cube (ESC), a single-fault-tolerant multistage cube network, is described. The structure, control, and partitionability of the ESC, and how it functions when multiple faults occur, are presented. The Dynamic Redundancy (DR) network, a fault-tolerant multistage cube network that supports the incorporation of spare processors for fault tolerance, is discussed. Its structure, control, and partitionability into single-fault-tolerant subnetworks are explained.